221 lines
7.9 KiB
C
221 lines
7.9 KiB
C
#include "panel/epd_gdew042t2.h"
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#include "panel/epd_gdew042t2_lut.h"
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#include "epd_private.h"
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#define DTM1 0x10
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#define DTM2 0x13
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static uint8_t epd_gdew042t2_init_sequence_bw[] = {
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0x04, 0x01, 0x03, 0x00, 0x2B, 0x2B, // PWR setting
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0x03, 0x06, 0x17, 0x17, 0x17, // Boost
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};
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static uint8_t epd_gdew042t2_init_sequence_gs[] = {
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0x05, 0x01, 0x03, 0x00, 0x2B, 0x2B, 0x13, // PWR setting
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0x03, 0x06, 0x17, 0x17, 0x17, // Boost
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};
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static uint8_t epd_gdew042t2_init_sequence_bw_2[] = {
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0x02, 0x00, 0xBF, 0x0D, // Panel settings
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0x01, 0x30, 0x3C, // PLL
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0x04, 0x61, 0x01, 0x90, 0x01, 0x2C, // Resolution
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0x01, 0x82, 0x28, // VCOM DC
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0x01, 0x50, 0x97, // VCOM/Data Interval
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};
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static uint8_t epd_gdew042t2_init_sequence_gs_2[] = {
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0x01, 0x00, 0x3F, // Panel settings
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0x01, 0x30, 0x3C, // PLL
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0x04, 0x61, 0x01, 0x90, 0x01, 0x2C, // Resolution
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0x01, 0x82, 0x12, // VCOM DC
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0x01, 0x50, 0x97, // VCOM/Data Interval
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};
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static epd_ret_t epd_gdew042t2_write_lut(epd_gdew042t2_t *epd) {
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uint8_t tx_buf[45];
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tx_buf[0] = 0x20; // Write VCOM LUT
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memcpy(&tx_buf[1], gdew042t2_lut[epd->mode].VCOM, 44);
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EPD_ERROR_CHECK(epd->cb.write_command_cb(epd->user_data, tx_buf, 45));
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tx_buf[0] = 0x21; // Write WW LUT
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memcpy(&tx_buf[1], gdew042t2_lut[epd->mode].WW, 42);
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EPD_ERROR_CHECK(epd->cb.write_command_cb(epd->user_data, tx_buf, 42));
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tx_buf[0] = 0x22; // Write BW LUT
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memcpy(&tx_buf[1], gdew042t2_lut[epd->mode].BW, 42);
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EPD_ERROR_CHECK(epd->cb.write_command_cb(epd->user_data, tx_buf, 42));
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tx_buf[0] = 0x23; // Write WB LUT
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memcpy(&tx_buf[1], gdew042t2_lut[epd->mode].WB, 42);
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EPD_ERROR_CHECK(epd->cb.write_command_cb(epd->user_data, tx_buf, 42));
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tx_buf[0] = 0x24; // Write BB LUT
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memcpy(&tx_buf[1], gdew042t2_lut[epd->mode].BB, 42);
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EPD_ERROR_CHECK(epd->cb.write_command_cb(epd->user_data, tx_buf, 42));
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if (epd->mode == EPD_GDEW042T2_MODE_GS) {
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tx_buf[0] = 0x25; // Write mysterious WW2 LUT
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memcpy(&tx_buf[1], gdew042t2_lut[epd->mode].WW, 42);
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EPD_ERROR_CHECK(epd->cb.write_command_cb(epd->user_data, tx_buf, 42));
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}
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return EPD_OK;
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}
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static epd_ret_t epd_gdew042t2_init(epd_gdew042t2_t *epd) {
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EPD_ASSERT(epd);
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EPD_ASSERT(epd->cb.reset_cb);
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EPD_ASSERT(epd->cb.write_command_cb);
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EPD_ASSERT(epd->cb.poll_busy_cb);
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EPD_ERROR_CHECK(epd->cb.reset_cb(epd->user_data));
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// Pre power-on settings
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if (epd->mode != EPD_GDEW042T2_MODE_GS) {
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EPD_ERROR_CHECK(epd_common_execute_sequence(&epd->cb, epd->user_data, epd_gdew042t2_init_sequence_bw,
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sizeof(epd_gdew042t2_init_sequence_bw)));
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} else {
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EPD_ERROR_CHECK(epd_common_execute_sequence(&epd->cb, epd->user_data, epd_gdew042t2_init_sequence_gs,
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sizeof(epd_gdew042t2_init_sequence_gs)));
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}
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// Issue power on command
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uint8_t tx_buf[2] = {0x04, 0x00};
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EPD_ERROR_CHECK(epd->cb.write_command_cb(epd->user_data, tx_buf, 0x01));
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EPD_ERROR_CHECK(epd->cb.poll_busy_cb(epd->user_data));
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// Post power-on settings
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if (epd->mode != EPD_GDEW042T2_MODE_GS) {
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EPD_ERROR_CHECK(epd_common_execute_sequence(&epd->cb, epd->user_data, epd_gdew042t2_init_sequence_bw_2,
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sizeof(epd_gdew042t2_init_sequence_bw_2)));
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} else {
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EPD_ERROR_CHECK(epd_common_execute_sequence(&epd->cb, epd->user_data, epd_gdew042t2_init_sequence_gs_2,
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sizeof(epd_gdew042t2_init_sequence_gs_2)));
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}
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return EPD_OK;
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}
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/**
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* @brief Enable partial mode for UC8176 IC
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* and set partial mode window.
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*
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* @param epd pointer to epd_gdew042t2_t
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* @param coord pointer to epd_coord_t
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* @return epd_ret_t EPD_OK for success, EPD_FAIL for error.
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*/
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static epd_ret_t epd_gdew042t2_partial(epd_gdew042t2_t *epd, epd_coord_t *coord) {
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EPD_ASSERT(epd);
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EPD_ASSERT(epd->cb.write_command_cb);
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// Partial In
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uint8_t tx_buf[10] = {0x91, 0x00};
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EPD_ERROR_CHECK(epd->cb.write_command_cb(epd->user_data, tx_buf, 1));
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// Partial window
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tx_buf[0] = 0x90;
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tx_buf[1] = (coord->x_start >> 8U) & 0x01U;
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tx_buf[2] = coord->x_start & 0xF8U; // Bank number, last 3 LSBs must be zero.
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tx_buf[3] = (coord->x_end >> 8U) & 0x01U;
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tx_buf[4] = coord->x_end & 0xF8U; // Same as above.
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tx_buf[5] = (coord->y_start >> 8U) & 0x01U;
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tx_buf[6] = coord->y_start & 0xFFU;
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tx_buf[7] = (coord->y_end >> 8U) & 0x01U;
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tx_buf[8] = coord->y_end & 0xFFU;
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tx_buf[9] = 0x01; // Only scan partial area.
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EPD_ERROR_CHECK(epd->cb.write_command_cb(epd->user_data, tx_buf, 10));
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return EPD_OK;
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}
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/**
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* @brief Issue UC8176 DTM1 or DTM2 command, with payload data and stop command.
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*
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* @param epd pointer to epd_gdew042t2_t
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* @param dtm_num DTM1 or DTM2
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* @param data payload pixel data
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* @param len payload data length, calculated as bytes
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* @return epd_ret_t EPD_OK for success, EPD_FAIL for error.
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*/
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static epd_ret_t epd_gdew042t2_dtm(epd_gdew042t2_t *epd, uint8_t dtm_num, uint8_t *data, uint32_t len) {
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EPD_ASSERT(epd);
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EPD_ASSERT(epd->cb.write_command_cb);
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uint8_t tx_buf[2] = {dtm_num};
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// Issue DTM1 or DTM2 command
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EPD_ERROR_CHECK(epd->cb.write_command_cb(epd->user_data, tx_buf, 0x01));
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// Send data
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EPD_ERROR_CHECK(epd->cb.write_data_cb(epd->user_data, data, len));
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// Issue DSP command.
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tx_buf[0] = 0x11;
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EPD_ERROR_CHECK(epd->cb.write_command_cb(epd->user_data, tx_buf, 0x01));
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return EPD_OK;
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}
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/**
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* @brief Issue display update command and enter deep-sleep mode.
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* Deep-sleep mode can only exits with a hardware reset.
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* @param epd pointer to epd_gdew042t2_t
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* @return epd_ret_t EPD_OK for success, EPD_FAIL for error.
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*/
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static epd_ret_t epd_gdew042t2_update_and_sleep(epd_gdew042t2_t *epd) {
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EPD_ASSERT(epd);
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EPD_ASSERT(epd->cb.write_command_cb);
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EPD_ASSERT(epd->cb.delay_cb);
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// Issue DRF command
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uint8_t tx_buf[2] = {0x12, 0x00};
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EPD_ERROR_CHECK(epd->cb.write_command_cb(epd->user_data, tx_buf, 0x01));
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// Delay 100ms and wait for busy
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EPD_ERROR_CHECK(epd->cb.delay_cb(epd->user_data, 100));
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EPD_ERROR_CHECK(epd->cb.poll_busy_cb(epd->user_data));
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// Issue POF command
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tx_buf[0] = 0x02;
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EPD_ERROR_CHECK(epd->cb.write_command_cb(epd->user_data, tx_buf, 0x01));
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EPD_ERROR_CHECK(epd->cb.poll_busy_cb(epd->user_data));
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// Issue DSLP command
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tx_buf[0] = 0x07;
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tx_buf[1] = 0xA5;
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EPD_ERROR_CHECK(epd->cb.write_command_cb(epd->user_data, tx_buf, 0x02));
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return EPD_OK;
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}
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/**
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* @brief Initialize display, upload frame buffer and refresh.
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* Then goes to deep-sleep mode to conserve power.
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* This is the only function needs to be called by the user.
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*
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* @param epd pointer to epd_gdew042t2_t
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* @param coord pointer to epd_coord_t, x_start or x_end MUST be wrapped to 8 pixel boundaries.
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* @param data1 bw data or old data array
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* @param data2 bw data or new data array
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* @return epd_ret_t EPD_OK for success, EPD_FAIL for error.
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*/
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epd_ret_t epd_gdew042t2_upload(epd_gdew042t2_t *epd, epd_coord_t *coord, uint8_t *data1, uint8_t *data2) {
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EPD_ERROR_CHECK(epd_gdew042t2_init(epd));
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EPD_ERROR_CHECK(epd_gdew042t2_write_lut(epd));
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EPD_ERROR_CHECK(epd_gdew042t2_partial(epd, coord));
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uint8_t bank_start = coord->x_start / 8; // Wrap to bank
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uint8_t bank_end = coord->x_end / 8; // Wrap to bank
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uint32_t tx_len = (bank_end - bank_start + 1) * (coord->y_end - coord->y_start + 1);
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if (epd->mode != EPD_GDEW042T2_MODE_BW) {
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EPD_ERROR_CHECK(epd_gdew042t2_dtm(epd, DTM1, data1, tx_len));
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}
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EPD_ERROR_CHECK(epd_gdew042t2_dtm(epd, DTM2, data2, tx_len));
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EPD_ERROR_CHECK(epd_gdew042t2_update_and_sleep(epd));
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return EPD_OK;
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}
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