generated from Embedded_Projects/AliOS_DevKit_Template
215 lines
5.7 KiB
C
215 lines
5.7 KiB
C
/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file stm32l4xx_it.c
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* @brief Interrupt Service Routines.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2023 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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#include "stm32l4xx_it.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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/* USER CODE END Includes */
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/* Private typedef -----------------------------------------------------------*/
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/* USER CODE BEGIN TD */
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/* USER CODE END TD */
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/* Private define ------------------------------------------------------------*/
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/* USER CODE BEGIN PD */
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/* USER CODE END PD */
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/* Private macro -------------------------------------------------------------*/
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/* USER CODE BEGIN PM */
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/* USER CODE END PM */
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/* Private variables ---------------------------------------------------------*/
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/* USER CODE BEGIN PV */
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/* USER CODE END PV */
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/* Private function prototypes -----------------------------------------------*/
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/* USER CODE BEGIN PFP */
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void app_tusb_irq_handler(void);
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/* USER CODE END PFP */
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/* Private user code ---------------------------------------------------------*/
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/* External variables --------------------------------------------------------*/
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extern DMA_HandleTypeDef hdma_memtomem_dma1_channel4;
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extern DMA_HandleTypeDef hdma_spi1_tx;
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extern TIM_HandleTypeDef htim7;
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/* USER CODE BEGIN EV */
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/* USER CODE END EV */
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/******************************************************************************/
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/* Cortex-M4 Processor Interruption and Exception Handlers */
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/******************************************************************************/
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/**
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* @brief This function handles Non maskable interrupt.
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*/
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void NMI_Handler(void)
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{
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/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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/* USER CODE END NonMaskableInt_IRQn 0 */
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/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
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while (1)
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{
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}
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/* USER CODE END NonMaskableInt_IRQn 1 */
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}
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/**
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* @brief This function handles Hard fault interrupt.
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*/
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void HardFault_Handler(void)
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{
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/* USER CODE BEGIN HardFault_IRQn 0 */
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/* USER CODE END HardFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_HardFault_IRQn 0 */
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/* USER CODE END W1_HardFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Memory management fault.
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*/
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void MemManage_Handler(void)
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{
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/* USER CODE BEGIN MemoryManagement_IRQn 0 */
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/* USER CODE END MemoryManagement_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
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/* USER CODE END W1_MemoryManagement_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Prefetch fault, memory access fault.
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*/
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void BusFault_Handler(void)
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{
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/* USER CODE BEGIN BusFault_IRQn 0 */
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/* USER CODE END BusFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_BusFault_IRQn 0 */
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/* USER CODE END W1_BusFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Undefined instruction or illegal state.
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*/
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void UsageFault_Handler(void)
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{
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/* USER CODE BEGIN UsageFault_IRQn 0 */
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/* USER CODE END UsageFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
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/* USER CODE END W1_UsageFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Debug monitor.
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*/
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void DebugMon_Handler(void)
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{
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/* USER CODE BEGIN DebugMonitor_IRQn 0 */
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/* USER CODE END DebugMonitor_IRQn 0 */
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/* USER CODE BEGIN DebugMonitor_IRQn 1 */
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/* USER CODE END DebugMonitor_IRQn 1 */
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}
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/******************************************************************************/
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/* STM32L4xx Peripheral Interrupt Handlers */
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/* Add here the Interrupt Handlers for the used peripherals. */
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/* For the available peripheral interrupt handler names, */
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/* please refer to the startup file (startup_stm32l4xx.s). */
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/******************************************************************************/
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/**
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* @brief This function handles DMA1 channel3 global interrupt.
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*/
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void DMA1_Channel3_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Channel3_IRQn 0 */
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/* USER CODE END DMA1_Channel3_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_spi1_tx);
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/* USER CODE BEGIN DMA1_Channel3_IRQn 1 */
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/* USER CODE END DMA1_Channel3_IRQn 1 */
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}
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/**
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* @brief This function handles DMA1 channel4 global interrupt.
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*/
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void DMA1_Channel4_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Channel4_IRQn 0 */
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/* USER CODE END DMA1_Channel4_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_memtomem_dma1_channel4);
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/* USER CODE BEGIN DMA1_Channel4_IRQn 1 */
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/* USER CODE END DMA1_Channel4_IRQn 1 */
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}
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/**
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* @brief This function handles TIM7 global interrupt.
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*/
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void TIM7_IRQHandler(void)
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{
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/* USER CODE BEGIN TIM7_IRQn 0 */
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/* USER CODE END TIM7_IRQn 0 */
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HAL_TIM_IRQHandler(&htim7);
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/* USER CODE BEGIN TIM7_IRQn 1 */
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/* USER CODE END TIM7_IRQn 1 */
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}
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/* USER CODE BEGIN 1 */
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void OTG_FS_IRQHandler(void) {
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app_tusb_irq_handler();
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}
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/* USER CODE END 1 */
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