Added GPIO interface.
continuous-integration/drone/push Build is passing Details

Signed-off-by: Yilin Sun <imi415@imi.moe>
This commit is contained in:
Yilin Sun 2023-05-29 23:39:34 +08:00
parent 0b44bc5754
commit 26a7a36a69
Signed by: imi415
GPG Key ID: 17F01E106F9F5E0A
4 changed files with 105 additions and 5 deletions

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@ -1,6 +1,7 @@
#ifndef MPYATE_HOST_H
#define MPYATE_HOST_H
#include <stdbool.h>
#include <stdint.h>
typedef enum {
@ -8,6 +9,13 @@ typedef enum {
ATE_RET_FAIL,
} ate_ret_t;
typedef enum {
ATE_GPIO_MODE_OUTPUT_PP,
ATE_GPIO_MODE_OUTPUT_OD,
ATE_GPIO_MODE_INPUT,
ATE_GPIO_MODE_AF,
} ate_gpio_mode_t;
typedef ate_ret_t (*ate_i2c_read_t)(void *handle, uint8_t *data, uint8_t len);
typedef ate_ret_t (*ate_i2c_write_t)(void *handle, uint8_t *data, uint8_t len);
@ -23,5 +31,8 @@ typedef struct {
} ate_t;
ate_ret_t ate_init(ate_t *ate);
ate_ret_t ate_gpio_init(ate_t *ate, uint8_t pin, ate_gpio_mode_t mode);
ate_ret_t ate_gpio_read(ate_t *ate, uint8_t pin, bool *value);
ate_ret_t ate_gpio_write(ate_t *ate, uint8_t pin, bool value);
#endif // MPYATE_HOST_H

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@ -1,11 +1,19 @@
#ifndef MPYATE_COMMANDS_H
#define MPYATE_COMMANDS_H
#define ATE_REG_CTRL 0x00U
#define ATE_REG_VER 0xFEU
#define ATE_REG_ID 0xFFU
#define ATE_REG_CFG 0x00U
#define ATE_REG_CTRL_RST_Pos 15
#define ATe_REG_CTRL_RST_Msk (1U << ATE_REG_CTRL_RST_Pos)
#define ATE_REG_GPIO_CFG 0x10U
#define ATE_REG_GPIO_DATA_OUT 0x11U
#define ATE_REG_GPIO_DATA_IN 0x92U
#define ATE_REG_VER 0xFEU
#define ATE_REG_ID 0xFFU
#define ATE_REG_CFG_RST_Pos 15
#define ATe_REG_CFG_RST_Msk (1U << ATE_REG_CFG_RST_Pos)
#define ATE_REG_GPIO_CFG_MODE_Pos 0
#define ATE_REG_GPIO_CFG_MODE_Msk (3U << ATE_REG_GPIO_CFG_MODE_Pos)
#endif // MPYATE_COMMANDS_H

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@ -26,6 +26,59 @@ ate_ret_t ate_init(ate_t *ate) {
return ret;
}
ate_ret_t ate_gpio_init(ate_t *ate, uint8_t pin, ate_gpio_mode_t mode) {
ate_ret_t ret = ATE_RET_SUCCESS;
uint16_t pin_cfg;
ret = ate_read_register(ate, ATE_REG_GPIO_CFG, &pin_cfg);
if (ret != ATE_RET_SUCCESS) {
return ret;
}
pin_cfg &= ~(ATE_REG_GPIO_CFG_MODE_Msk << (2 * pin));
pin_cfg |= (mode << (2 * pin));
ret = ate_write_register(ate, ATE_REG_GPIO_CFG, pin_cfg);
return ret;
}
ate_ret_t ate_gpio_read(ate_t *ate, uint8_t pin, bool *value) {
ate_ret_t ret = ATE_RET_SUCCESS;
uint16_t pin_data;
ret = ate_read_register(ate, ATE_REG_GPIO_DATA_IN, &pin_data);
if (ret != ATE_RET_SUCCESS) {
return ret;
}
if (pin_data & (1U << pin)) {
*value = true;
} else {
*value = false;
}
return ret;
}
ate_ret_t ate_gpio_write(ate_t *ate, uint8_t pin, bool value) {
ate_ret_t ret = ATE_RET_SUCCESS;
uint16_t pin_data;
ret = ate_read_register(ate, ATE_REG_GPIO_DATA_IN, &pin_data);
if (ret != ATE_RET_SUCCESS) {
return ret;
}
pin_data &= ~(1U << pin);
if (value) {
pin_data |= (1U << pin);
}
ret = ate_write_register(ate, ATE_REG_GPIO_DATA_OUT, pin_data);
return ret;
}
static ate_ret_t ate_read_id(ate_t *ate, uint16_t *id) {
return ate_read_register(ate, ATE_REG_ID, id);
}

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@ -31,6 +31,34 @@ int main(void) {
printf("ATE initialized.\r\n");
bool pin_value = false;
if(ate_gpio_read(&s_ate, 0, &pin_value) != ATE_RET_SUCCESS) {
printf("Failed to read GPIO value\r\n");
goto dead_loop;
}
if(ate_gpio_write(&s_ate, 0, 1) != ATE_RET_SUCCESS) {
printf("Failed to write pin.\r\n");
goto dead_loop;
}
if(ate_gpio_init(&s_ate, 0, ATE_GPIO_MODE_OUTPUT_PP) != ATE_RET_SUCCESS) {
printf("Failed to config pin.");
goto dead_loop;
}
if(ate_gpio_read(&s_ate, 0, &pin_value) != ATE_RET_SUCCESS) {
printf("Failed to read GPIO value\r\n");
goto dead_loop;
}
printf("GPIO value: %d\r\n", pin_value);
dead_loop:
for (;;) {