/********************************** (C) COPYRIGHT ******************************* * File Name : startup_ch32v30x_D8C.s * Author : WCH * Version : V1.0.0 * Date : 2021/06/06 * Description : CH32V307-CH32V305 vector table for eclipse toolchain. * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. * SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ .section .vectors,"ax",@progbits .global _start .align 4 .option push .option norvc _start: j Reset_Handler /* Go! */ /** * The only mode WCH didn't break is MODE 0, non-vectored exception. * We place the jump table here, but processed by software. * */ _vectors: j Exception_Handler /* 0: Exception */ j Default_Handler /* 1: Reserved */ j NMI_Handler /* 2: NMI */ j Default_Handler /* 3: Reserved */ j Default_Handler /* 4: Reserved */ j Default_Handler /* 5: Reserved */ j Default_Handler /* 6: Reserved */ j Default_Handler /* 7: Reserved */ j Default_Handler /* 8: Reserved */ j Default_Handler /* 9: Reserved */ j Default_Handler /* 10: Reserved */ j Default_Handler /* 11: Reserved */ j SysTick_Handler /* 12: SysTick */ j Default_Handler /* 13: Reserved */ j SW_Handler /* 14: Software */ j Default_Handler /* 15: Reserved */ j WWDG_IRQHandler /* 16: Window Watchdog */ j PVD_IRQHandler /* 17: PVD through EXTI Line detect */ j TAMPER_IRQHandler /* 18: TAMPER */ j RTC_IRQHandler /* 19: RTC */ j FLASH_IRQHandler /* 20: Flash */ j RCC_IRQHandler /* 21: RCC */ j EXTI0_IRQHandler /* 22: EXTI Line 0 */ j EXTI1_IRQHandler /* 23: EXTI Line 1 */ j EXTI2_IRQHandler /* 24: EXTI Line 2 */ j EXTI3_IRQHandler /* 25: EXTI Line 3 */ j EXTI4_IRQHandler /* 26: EXTI Line 4 */ j DMA1_Channel1_IRQHandler /* 27: DMA1 Channel 1 */ j DMA1_Channel2_IRQHandler /* 28: DMA1 Channel 2 */ j DMA1_Channel3_IRQHandler /* 29: DMA1 Channel 3 */ j DMA1_Channel4_IRQHandler /* 30: DMA1 Channel 4 */ j DMA1_Channel5_IRQHandler /* 31: DMA1 Channel 5 */ j DMA1_Channel6_IRQHandler /* 32: DMA1 Channel 6 */ j DMA1_Channel7_IRQHandler /* 33: DMA1 Channel 7 */ j ADC1_2_IRQHandler /* 34: ADC1_2 */ j USB_HP_CAN1_TX_IRQHandler /* 35: USB HP and CAN1 TX */ j USB_LP_CAN1_RX0_IRQHandler /* 36: USB LP and CAN1RX0 */ j CAN1_RX1_IRQHandler /* 37: CAN1 RX1 */ j CAN1_SCE_IRQHandler /* 38: CAN1 SCE */ j EXTI9_5_IRQHandler /* 39: EXTI Line 9..5 */ j TIM1_BRK_IRQHandler /* 40: TIM1 Break */ j TIM1_UP_IRQHandler /* 41: TIM1 Update */ j TIM1_TRG_COM_IRQHandler /* 42: TIM1 Trigger and Commutation */ j TIM1_CC_IRQHandler /* 43: TIM1 Capture Compare */ j TIM2_IRQHandler /* 44: TIM2 */ j TIM3_IRQHandler /* 45: TIM3 */ j TIM4_IRQHandler /* 46: TIM4 */ j I2C1_EV_IRQHandler /* 47: I2C1 Event */ j I2C1_ER_IRQHandler /* 48: I2C1 Error */ j I2C2_EV_IRQHandler /* 49: I2C2 Event */ j I2C2_ER_IRQHandler /* 50: I2C2 Error */ j SPI1_IRQHandler /* 51: SPI1 */ j SPI2_IRQHandler /* 52: SPI2 */ j USART1_IRQHandler /* 53: USART1 */ j USART2_IRQHandler /* 54: USART2 */ j USART3_IRQHandler /* 55: USART3 */ j EXTI15_10_IRQHandler /* 56: EXTI Line 15..10 */ j RTCAlarm_IRQHandler /* 57: RTC Alarm through EXTI Line */ j USBWakeUp_IRQHandler /* 58: USB Wakeup from suspend */ j TIM8_BRK_IRQHandler /* 59: TIM8 Break */ j TIM8_UP_IRQHandler /* 60: TIM8 Update */ j TIM8_TRG_COM_IRQHandler /* 61: TIM8 Trigger and Commutation */ j TIM8_CC_IRQHandler /* 62: TIM8 Capture Compare */ j RNG_IRQHandler /* 63: RNG */ j FSMC_IRQHandler /* 64: FSMC */ j SDIO_IRQHandler /* 65: SDIO */ j TIM5_IRQHandler /* 66: TIM5 */ j SPI3_IRQHandler /* 67: SPI3 */ j UART4_IRQHandler /* 68: UART4 */ j UART5_IRQHandler /* 69: UART5 */ j TIM6_IRQHandler /* 70: TIM6 */ j TIM7_IRQHandler /* 71: TIM7 */ j DMA2_Channel1_IRQHandler /* 72: DMA2 Channel 1 */ j DMA2_Channel2_IRQHandler /* 73: DMA2 Channel 2 */ j DMA2_Channel3_IRQHandler /* 74: DMA2 Channel 3 */ j DMA2_Channel4_IRQHandler /* 75: DMA2 Channel 4 */ j DMA2_Channel5_IRQHandler /* 76: DMA2 Channel 5 */ j ETH_IRQHandler /* 77: ETH */ j ETH_WKUP_IRQHandler /* 78: ETH WakeUp */ j CAN2_TX_IRQHandler /* 79: CAN2 TX */ j CAN2_RX0_IRQHandler /* 80: CAN2 RX0 */ j CAN2_RX1_IRQHandler /* 81: CAN2 RX1 */ j CAN2_SCE_IRQHandler /* 82: CAN2 SCE */ j OTG_FS_IRQHandler /* 83: OTGFS */ j USBHSWakeup_IRQHandler /* 84: USBHS Wakeup */ j USBHS_IRQHandler /* 85: USBHS */ j DVP_IRQHandler /* 86: DVP */ j UART6_IRQHandler /* 87: UART6 */ j UART7_IRQHandler /* 88: UART7 */ j UART8_IRQHandler /* 89: UART8 */ j TIM9_BRK_IRQHandler /* 90: TIM9 Break */ j TIM9_UP_IRQHandler /* 91: TIM9 Update */ j TIM9_TRG_COM_IRQHandler /* 92: TIM9 Trigger and Commutation */ j TIM9_CC_IRQHandler /* 93: TIM9 Capture Compare */ j TIM10_BRK_IRQHandler /* 94: TIM10 Break */ j TIM10_UP_IRQHandler /* 95: TIM10 Update */ j TIM10_TRG_COM_IRQHandler /* 96: TIM10 Trigger and Commutation */ j TIM10_CC_IRQHandler /* 97: TIM10 Capture Compare */ j DMA2_Channel6_IRQHandler /* 98: DMA2 Channel 6 */ j DMA2_Channel7_IRQHandler /* 99: DMA2 Channel 7 */ j DMA2_Channel8_IRQHandler /* 100: DMA2 Channel 8 */ j DMA2_Channel9_IRQHandler /* 101: DMA2 Channel 9 */ j DMA2_Channel10_IRQHandler /* 102: DMA2 Channel 10 */ j DMA2_Channel11_IRQHandler /* 103: DMA2 Channel 11 */ .option pop Reset_Handler: .option push .option norelax la gp, __global_pointer$ .option pop la sp, _eusrstack copy_data: /* Load data section from flash to RAM */ la a0, _sidata la a1, _sdata la a2, _edata bgeu a1, a2, clear_bss loop_copy_data: lw t0, (a0) sw t0, (a1) addi a0, a0, 4 addi a1, a1, 4 bltu a1, a2, loop_copy_data clear_bss: /* Clear bss section */ la a0, _sbss la a1, _ebss bgeu a0, a1, setup_interrupts loop_clear_bss: sw zero, (a0) addi a0, a0, 4 bltu a0, a1, loop_clear_bss setup_interrupts: li t0, 0x1f csrw 0xbc0, t0 /* Enable nested and hardware stack */ /* li t0, 0x1f */ /* For MRS proprietary GCC compilers */ /* Enable nested interrupt, disable hardware stack */ li t0, 0x1e /* Refer to RISC-V4 PFIC manual */ csrw 0x804, t0 /* FS: Initial, MPP: M mode, MPIE: EN, MIE: EN */ li t0, 0x3888 csrs mstatus, t0 la t0, _vectors ori t0, t0, 0 /* Non-vectored exception handling */ csrw mtvec, t0 /* Use standard RISC-V exception model. */ jal SystemInit jal main dead_loop: j dead_loop Exception_Handler: csrr t0, mcause ble t0, x0, Interrupt_Handler /* Check interrupt */ li t1, 11 /* Find an M mode ecall (11) */ beq t1, t0, Ecall_M_Handler li t1, 8 beq t1, t0, Ecall_U_Handler j Fault_Handler Interrupt_Handler: /* Home made vector table */ slli t0, t0, 2 la t1, _vectors add t1, t1, t0 jr t1