diff --git a/BSP/Debug/debug.c b/BSP/Debug/debug.c index 82c3df5..1460455 100644 --- a/BSP/Debug/debug.c +++ b/BSP/Debug/debug.c @@ -168,26 +168,3 @@ __attribute__((used)) int _write(int fd, char *buf, int size) return size; } - -/********************************************************************* - * @fn _sbrk - * - * @brief Change the spatial position of data segment. - * - * @return size: Data length - */ -void *_sbrk(ptrdiff_t incr) -{ - extern char _end[]; - extern char _heap_end[]; - static char *curbrk = _end; - - if ((curbrk + incr < _end) || (curbrk + incr > _heap_end)) - return NULL - 1; - - curbrk += incr; - return curbrk - incr; -} - - - diff --git a/BSP/Ld/Link.ld b/BSP/Ld/Link.ld index 083e0e9..f32f5a5 100644 --- a/BSP/Ld/Link.ld +++ b/BSP/Ld/Link.ld @@ -18,59 +18,45 @@ MEMORY SECTIONS { - .init : + .vectors : { - _sinit = .; . = ALIGN(4); - KEEP(*(SORT_NONE(.init))) + KEEP(*(SORT_NONE(.vectors))) . = ALIGN(4); - _einit = .; } >FLASH - .vector : - { - *(.vector); - . = ALIGN(64); - } >FLASH - .text : { . = ALIGN(4); + _stext = .; + *(.text) *(.text.*) + *(.gnu.linkonce.t.*) *(.rodata) *(.rodata*) - *(.glue_7) - *(.glue_7t) - *(.gnu.linkonce.t.*) - . = ALIGN(4); - } >FLASH + *(.gnu.linkonce.r.*) - .fini : - { - KEEP(*(SORT_NONE(.fini))) . = ALIGN(4); + _etext = .; } >FLASH - PROVIDE( _etext = . ); - PROVIDE( _eitcm = . ); - .preinit_array : { - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP (*(.preinit_array)) - PROVIDE_HIDDEN (__preinit_array_end = .); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); } >FLASH - .init_array : + .init_array : { - PROVIDE_HIDDEN (__init_array_start = .); - KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*))) - KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors)) - PROVIDE_HIDDEN (__init_array_end = .); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*))) + KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors)) + PROVIDE_HIDDEN (__init_array_end = .); } >FLASH - .fini_array : + .fini_array : { PROVIDE_HIDDEN (__fini_array_start = .); KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*))) @@ -78,31 +64,16 @@ SECTIONS PROVIDE_HIDDEN (__fini_array_end = .); } >FLASH - .ctors : + .ctors : { - /* gcc uses crtbegin.o to find the start of - the constructors, so we make sure it is - first. Because this is a wildcard, it - doesn't matter if the user does not - actually link against crtbegin.o; the - linker won't look for a file to match a - wildcard. The wildcard also means that it - doesn't matter which directory crtbegin.o - is in. - */ KEEP (*crtbegin.o(.ctors)) KEEP (*crtbegin?.o(.ctors)) - /* We don't want to include the .ctor section from - the crtend.o file until after the sorted ctors. - The .ctor section from the crtend file contains the - end of ctors marker and it must be last - */ - KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) } >FLASH - .dtors : + .dtors : { KEEP (*crtbegin.o(.dtors)) KEEP (*crtbegin?.o(.dtors)) @@ -111,55 +82,47 @@ SECTIONS KEEP (*(.dtors)) } >FLASH - .dalign : - { - . = ALIGN(4); - PROVIDE(_data_vma = .); - } >RAM AT>FLASH - - .dlalign : - { - . = ALIGN(4); - PROVIDE(_data_lma = .); - } >FLASH AT>FLASH + _sidata = LOADADDR(.data); .data : { - *(.gnu.linkonce.r.*) + . = ALIGN(4); + _sdata = .; + *(.data .data.*) *(.gnu.linkonce.d.*) - . = ALIGN(8); - PROVIDE( __global_pointer$ = . + 0x800 ); *(.sdata .sdata.*) - *(.sdata2.*) - *(.gnu.linkonce.s.*) - . = ALIGN(8); - *(.srodata.cst16) - *(.srodata.cst8) - *(.srodata.cst4) - *(.srodata.cst2) *(.srodata .srodata.*) + *(.gnu.linkonce.s.*) + . = ALIGN(4); - PROVIDE( _edata = .); + _edata = .; } >RAM AT>FLASH + . = ALIGN(16); + PROVIDE( __global_pointer$ = . ); + .bss : { . = ALIGN(4); - PROVIDE( _sbss = .); - *(.sbss*) + _sbss = .; + + *(.sbss) + *(.sbss.*) *(.gnu.linkonce.sb.*) - *(.bss*) + *(.bss) + *(.bss.*) *(.gnu.linkonce.b.*) - *(COMMON*) + *(COMMON) + . = ALIGN(4); - PROVIDE(_ebss = .); + _ebss = .; } >RAM .heap_stack : { . = ALIGN(8); - PROVIDE(_end = .); + _end = .; PROVIDE(end = . ); . = . + __heap_size; diff --git a/BSP/Peripheral/src/ch32v30x_eth.c b/BSP/Peripheral/src/ch32v30x_eth.c index 46e128b..6500ca0 100644 --- a/BSP/Peripheral/src/ch32v30x_eth.c +++ b/BSP/Peripheral/src/ch32v30x_eth.c @@ -1285,7 +1285,6 @@ FlagStatus ETH_GetSoftwareResetStatus(void) { bitstatus = RESET; } - printf("ETH->DMABMR is:%08lx\n", ETH->DMABMR); return bitstatus; } diff --git a/BSP/Startup/startup_ch32v30x_D8.S b/BSP/Startup/startup_ch32v30x_D8.S index 97f8262..26f2b73 100644 --- a/BSP/Startup/startup_ch32v30x_D8.S +++ b/BSP/Startup/startup_ch32v30x_D8.S @@ -8,366 +8,177 @@ * SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ - .section .init,"ax",@progbits - .global _start - .align 1 +.section .vectors,"ax",@progbits +.global _start +.align 4 _start: - j handle_reset - .word 0x00000013 - .word 0x00000013 - .word 0x00000013 - .word 0x00000013 - .word 0x00000013 - .word 0x00000013 - .word 0x00000013 - .word 0x00000013 - .word 0x00000013 - .word 0x00000013 - .word 0x00000013 - .word 0x00000013 - .word 0x00100073 - .section .vector,"ax",@progbits - .align 1 -_vector_base: - .option norvc; - .word _start - .word 0 - .word NMI_Handler /* NMI */ - .word HardFault_Handler /* Hard Fault */ - .word 0 - .word Ecall_M_Mode_Handler /* Ecall M Mode */ - .word 0 - .word 0 - .word Ecall_U_Mode_Handler /* Ecall U Mode */ - .word Break_Point_Handler /* Break Point */ - .word 0 - .word 0 - .word SysTick_Handler /* SysTick */ - .word 0 - .word SW_Handler /* SW */ - .word 0 - /* External Interrupts */ - .word WWDG_IRQHandler /* Window Watchdog */ - .word PVD_IRQHandler /* PVD through EXTI Line detect */ - .word TAMPER_IRQHandler /* TAMPER */ - .word RTC_IRQHandler /* RTC */ - .word FLASH_IRQHandler /* Flash */ - .word RCC_IRQHandler /* RCC */ - .word EXTI0_IRQHandler /* EXTI Line 0 */ - .word EXTI1_IRQHandler /* EXTI Line 1 */ - .word EXTI2_IRQHandler /* EXTI Line 2 */ - .word EXTI3_IRQHandler /* EXTI Line 3 */ - .word EXTI4_IRQHandler /* EXTI Line 4 */ - .word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */ - .word DMA1_Channel2_IRQHandler /* DMA1 Channel 2 */ - .word DMA1_Channel3_IRQHandler /* DMA1 Channel 3 */ - .word DMA1_Channel4_IRQHandler /* DMA1 Channel 4 */ - .word DMA1_Channel5_IRQHandler /* DMA1 Channel 5 */ - .word DMA1_Channel6_IRQHandler /* DMA1 Channel 6 */ - .word DMA1_Channel7_IRQHandler /* DMA1 Channel 7 */ - .word ADC1_2_IRQHandler /* ADC1_2 */ - .word USB_HP_CAN1_TX_IRQHandler /* USB HP and CAN1 TX */ - .word USB_LP_CAN1_RX0_IRQHandler /* USB LP and CAN1RX0 */ - .word CAN1_RX1_IRQHandler /* CAN1 RX1 */ - .word CAN1_SCE_IRQHandler /* CAN1 SCE */ - .word EXTI9_5_IRQHandler /* EXTI Line 9..5 */ - .word TIM1_BRK_IRQHandler /* TIM1 Break */ - .word TIM1_UP_IRQHandler /* TIM1 Update */ - .word TIM1_TRG_COM_IRQHandler /* TIM1 Trigger and Commutation */ - .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ - .word TIM2_IRQHandler /* TIM2 */ - .word TIM3_IRQHandler /* TIM3 */ - .word TIM4_IRQHandler /* TIM4 */ - .word I2C1_EV_IRQHandler /* I2C1 Event */ - .word I2C1_ER_IRQHandler /* I2C1 Error */ - .word I2C2_EV_IRQHandler /* I2C2 Event */ - .word I2C2_ER_IRQHandler /* I2C2 Error */ - .word SPI1_IRQHandler /* SPI1 */ - .word SPI2_IRQHandler /* SPI2 */ - .word USART1_IRQHandler /* USART1 */ - .word USART2_IRQHandler /* USART2 */ - .word USART3_IRQHandler /* USART3 */ - .word EXTI15_10_IRQHandler /* EXTI Line 15..10 */ - .word RTCAlarm_IRQHandler /* RTC Alarm through EXTI Line */ - .word 0 - .word TIM8_BRK_IRQHandler /* TIM8 Break */ - .word TIM8_UP_IRQHandler /* TIM8 Update */ - .word TIM8_TRG_COM_IRQHandler /* TIM8 Trigger and Commutation */ - .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ - .word RNG_IRQHandler /* RNG */ - .word FSMC_IRQHandler /* FSMC */ - .word SDIO_IRQHandler /* SDIO */ - .word TIM5_IRQHandler /* TIM5 */ - .word SPI3_IRQHandler /* SPI3 */ - .word UART4_IRQHandler /* UART4 */ - .word UART5_IRQHandler /* UART5 */ - .word TIM6_IRQHandler /* TIM6 */ - .word TIM7_IRQHandler /* TIM7 */ - .word DMA2_Channel1_IRQHandler /* DMA2 Channel 1 */ - .word DMA2_Channel2_IRQHandler /* DMA2 Channel 2 */ - .word DMA2_Channel3_IRQHandler /* DMA2 Channel 3 */ - .word DMA2_Channel4_IRQHandler /* DMA2 Channel 4 */ - .word DMA2_Channel5_IRQHandler /* DMA2 Channel 5 */ - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word OTG_FS_IRQHandler /* OTGFS */ - .word 0 - .word 0 - .word 0 - .word UART6_IRQHandler /* UART6 */ - .word UART7_IRQHandler /* UART7 */ - .word UART8_IRQHandler /* UART8 */ - .word TIM9_BRK_IRQHandler /* TIM9 Break */ - .word TIM9_UP_IRQHandler /* TIM9 Update */ - .word TIM9_TRG_COM_IRQHandler /* TIM9 Trigger and Commutation */ - .word TIM9_CC_IRQHandler /* TIM9 Capture Compare */ - .word TIM10_BRK_IRQHandler /* TIM10 Break */ - .word TIM10_UP_IRQHandler /* TIM10 Update */ - .word TIM10_TRG_COM_IRQHandler /* TIM10 Trigger and Commutation */ - .word TIM10_CC_IRQHandler /* TIM10 Capture Compare */ - .word DMA2_Channel6_IRQHandler /* DMA2 Channel 6 */ - .word DMA2_Channel7_IRQHandler /* DMA2 Channel 7 */ - .word DMA2_Channel8_IRQHandler /* DMA2 Channel 8 */ - .word DMA2_Channel9_IRQHandler /* DMA2 Channel 9 */ - .word DMA2_Channel10_IRQHandler /* DMA2 Channel 10 */ - .word DMA2_Channel11_IRQHandler /* DMA2 Channel 11 */ + j Reset_Handler /* Go! */ - .option rvc; + .align 8 + .option push + .option norvc +_vectors: + .word Fault_Handler /* 0: Exception */ + .word Default_Handler /* 1: Reserved */ + .word NMI_Handler /* 2: NMI */ + .word Default_Handler /* 3: Reserved */ + .word Default_Handler /* 4: Reserved */ + .word Ecall_M_Handler /* 5: M mode Ecall */ + .word Default_Handler /* 6: Reserved */ + .word Default_Handler /* 7: Reserved */ + .word Ecall_U_Handler /* 8: U mode Ecall */ + .word Default_Handler /* 9: Reserved */ + .word Default_Handler /* 10: Reserved */ + .word Default_Handler /* 11: Reserved */ + .word SysTick_Handler /* 12: SysTick */ + .word Default_Handler /* 13: Reserved */ + .word SW_Handler /* 14: Software */ + .word Default_Handler /* 15: Reserved */ + .word WWDG_IRQHandler /* 16: Window Watchdog */ + .word PVD_IRQHandler /* 17: PVD through EXTI Line detect */ + .word TAMPER_IRQHandler /* 18: TAMPER */ + .word RTC_IRQHandler /* 19: RTC */ + .word FLASH_IRQHandler /* 20: Flash */ + .word RCC_IRQHandler /* 21: RCC */ + .word EXTI0_IRQHandler /* 22: EXTI Line 0 */ + .word EXTI1_IRQHandler /* 23: EXTI Line 1 */ + .word EXTI2_IRQHandler /* 24: EXTI Line 2 */ + .word EXTI3_IRQHandler /* 25: EXTI Line 3 */ + .word EXTI4_IRQHandler /* 26: EXTI Line 4 */ + .word DMA1_Channel1_IRQHandler /* 27: DMA1 Channel 1 */ + .word DMA1_Channel2_IRQHandler /* 28: DMA1 Channel 2 */ + .word DMA1_Channel3_IRQHandler /* 29: DMA1 Channel 3 */ + .word DMA1_Channel4_IRQHandler /* 30: DMA1 Channel 4 */ + .word DMA1_Channel5_IRQHandler /* 31: DMA1 Channel 5 */ + .word DMA1_Channel6_IRQHandler /* 32: DMA1 Channel 6 */ + .word DMA1_Channel7_IRQHandler /* 33: DMA1 Channel 7 */ + .word ADC1_2_IRQHandler /* 34: ADC1_2 */ + .word USB_HP_CAN1_TX_IRQHandler /* 35: USB HP and CAN1 TX */ + .word USB_LP_CAN1_RX0_IRQHandler /* 36: USB LP and CAN1RX0 */ + .word CAN1_RX1_IRQHandler /* 37: CAN1 RX1 */ + .word CAN1_SCE_IRQHandler /* 38: CAN1 SCE */ + .word EXTI9_5_IRQHandler /* 39: EXTI Line 9..5 */ + .word TIM1_BRK_IRQHandler /* 40: TIM1 Break */ + .word TIM1_UP_IRQHandler /* 41: TIM1 Update */ + .word TIM1_TRG_COM_IRQHandler /* 42: TIM1 Trigger and Commutation */ + .word TIM1_CC_IRQHandler /* 43: TIM1 Capture Compare */ + .word TIM2_IRQHandler /* 44: TIM2 */ + .word TIM3_IRQHandler /* 45: TIM3 */ + .word TIM4_IRQHandler /* 46: TIM4 */ + .word I2C1_EV_IRQHandler /* 47: I2C1 Event */ + .word I2C1_ER_IRQHandler /* 48: I2C1 Error */ + .word I2C2_EV_IRQHandler /* 49: I2C2 Event */ + .word I2C2_ER_IRQHandler /* 50: I2C2 Error */ + .word SPI1_IRQHandler /* 51: SPI1 */ + .word SPI2_IRQHandler /* 52: SPI2 */ + .word USART1_IRQHandler /* 53: USART1 */ + .word USART2_IRQHandler /* 54: USART2 */ + .word USART3_IRQHandler /* 55: USART3 */ + .word EXTI15_10_IRQHandler /* 56: EXTI Line 15..10 */ + .word RTCAlarm_IRQHandler /* 57: RTC Alarm through EXTI Line */ + .word Default_Handler /* 58: Reserved */ + .word TIM8_BRK_IRQHandler /* 59: TIM8 Break */ + .word TIM8_UP_IRQHandler /* 60: TIM8 Update */ + .word TIM8_TRG_COM_IRQHandler /* 61: TIM8 Trigger and Commutation */ + .word TIM8_CC_IRQHandler /* 62: TIM8 Capture Compare */ + .word RNG_IRQHandler /* 63: RNG */ + .word FSMC_IRQHandler /* 64: FSMC */ + .word SDIO_IRQHandler /* 65: SDIO */ + .word TIM5_IRQHandler /* 66: TIM5 */ + .word SPI3_IRQHandler /* 67: SPI3 */ + .word UART4_IRQHandler /* 68: UART4 */ + .word UART5_IRQHandler /* 69: UART5 */ + .word TIM6_IRQHandler /* 70: TIM6 */ + .word TIM7_IRQHandler /* 71: TIM7 */ + .word DMA2_Channel1_IRQHandler /* 72: DMA2 Channel 1 */ + .word DMA2_Channel2_IRQHandler /* 73: DMA2 Channel 2 */ + .word DMA2_Channel3_IRQHandler /* 74: DMA2 Channel 3 */ + .word DMA2_Channel4_IRQHandler /* 75: DMA2 Channel 4 */ + .word DMA2_Channel5_IRQHandler /* 76: DMA2 Channel 5 */ + .word Default_Handler /* 77: Reserved */ + .word Default_Handler /* 78: Reserved */ + .word Default_Handler /* 79: Reserved */ + .word Default_Handler /* 80: Reserved */ + .word Default_Handler /* 81: Reserved */ + .word Default_Handler /* 82: Reserved */ + .word OTG_FS_IRQHandler /* 83: OTGFS */ + .word Default_Handler /* 84: Reserved */ + .word Default_Handler /* 85: Reserved */ + .word Default_Handler /* 86: Reserved */ + .word UART6_IRQHandler /* 87: UART6 */ + .word UART7_IRQHandler /* 88: UART7 */ + .word UART8_IRQHandler /* 89: UART8 */ + .word TIM9_BRK_IRQHandler /* 90: TIM9 Break */ + .word TIM9_UP_IRQHandler /* 91: TIM9 Update */ + .word TIM9_TRG_COM_IRQHandler /* 92: TIM9 Trigger and Commutation */ + .word TIM9_CC_IRQHandler /* 93: TIM9 Capture Compare */ + .word TIM10_BRK_IRQHandler /* 94: TIM10 Break */ + .word TIM10_UP_IRQHandler /* 95: TIM10 Update */ + .word TIM10_TRG_COM_IRQHandler /* 96: TIM10 Trigger and Commutation */ + .word TIM10_CC_IRQHandler /* 97: TIM10 Capture Compare */ + .word DMA2_Channel6_IRQHandler /* 98: DMA2 Channel 6 */ + .word DMA2_Channel7_IRQHandler /* 99: DMA2 Channel 7 */ + .word DMA2_Channel8_IRQHandler /* 100: DMA2 Channel 8 */ + .word DMA2_Channel9_IRQHandler /* 101: DMA2 Channel 9 */ + .word DMA2_Channel10_IRQHandler /* 102: DMA2 Channel 10 */ + .word DMA2_Channel11_IRQHandler /* 103: DMA2 Channel 11 */ +.option pop - .section .text.vector_handler, "ax", @progbits - .weak NMI_Handler /* NMI */ - .weak HardFault_Handler /* Hard Fault */ - .weak Ecall_M_Mode_Handler /* Ecall M Mode */ - .weak Ecall_U_Mode_Handler /* Ecall U Mode */ - .weak Break_Point_Handler /* Break Point */ - .weak SysTick_Handler /* SysTick */ - .weak SW_Handler /* SW */ - .weak WWDG_IRQHandler /* Window Watchdog */ - .weak PVD_IRQHandler /* PVD through EXTI Line detect */ - .weak TAMPER_IRQHandler /* TAMPER */ - .weak RTC_IRQHandler /* RTC */ - .weak FLASH_IRQHandler /* Flash */ - .weak RCC_IRQHandler /* RCC */ - .weak EXTI0_IRQHandler /* EXTI Line 0 */ - .weak EXTI1_IRQHandler /* EXTI Line 1 */ - .weak EXTI2_IRQHandler /* EXTI Line 2 */ - .weak EXTI3_IRQHandler /* EXTI Line 3 */ - .weak EXTI4_IRQHandler /* EXTI Line 4 */ - .weak DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */ - .weak DMA1_Channel2_IRQHandler /* DMA1 Channel 2 */ - .weak DMA1_Channel3_IRQHandler /* DMA1 Channel 3 */ - .weak DMA1_Channel4_IRQHandler /* DMA1 Channel 4 */ - .weak DMA1_Channel5_IRQHandler /* DMA1 Channel 5 */ - .weak DMA1_Channel6_IRQHandler /* DMA1 Channel 6 */ - .weak DMA1_Channel7_IRQHandler /* DMA1 Channel 7 */ - .weak ADC1_2_IRQHandler /* ADC1_2 */ - .weak USB_HP_CAN1_TX_IRQHandler /* USB HP and CAN1 TX */ - .weak USB_LP_CAN1_RX0_IRQHandler /* USB LP and CAN1RX0 */ - .weak CAN1_RX1_IRQHandler /* CAN1 RX1 */ - .weak CAN1_SCE_IRQHandler /* CAN1 SCE */ - .weak EXTI9_5_IRQHandler /* EXTI Line 9..5 */ - .weak TIM1_BRK_IRQHandler /* TIM1 Break */ - .weak TIM1_UP_IRQHandler /* TIM1 Update */ - .weak TIM1_TRG_COM_IRQHandler /* TIM1 Trigger and Commutation */ - .weak TIM1_CC_IRQHandler /* TIM1 Capture Compare */ - .weak TIM2_IRQHandler /* TIM2 */ - .weak TIM3_IRQHandler /* TIM3 */ - .weak TIM4_IRQHandler /* TIM4 */ - .weak I2C1_EV_IRQHandler /* I2C1 Event */ - .weak I2C1_ER_IRQHandler /* I2C1 Error */ - .weak I2C2_EV_IRQHandler /* I2C2 Event */ - .weak I2C2_ER_IRQHandler /* I2C2 Error */ - .weak SPI1_IRQHandler /* SPI1 */ - .weak SPI2_IRQHandler /* SPI2 */ - .weak USART1_IRQHandler /* USART1 */ - .weak USART2_IRQHandler /* USART2 */ - .weak USART3_IRQHandler /* USART3 */ - .weak EXTI15_10_IRQHandler /* EXTI Line 15..10 */ - .weak RTCAlarm_IRQHandler /* RTC Alarm through EXTI Line */ - .weak TIM8_BRK_IRQHandler /* TIM8 Break */ - .weak TIM8_UP_IRQHandler /* TIM8 Update */ - .weak TIM8_TRG_COM_IRQHandler /* TIM8 Trigger and Commutation */ - .weak TIM8_CC_IRQHandler /* TIM8 Capture Compare */ - .weak RNG_IRQHandler /* RNG */ - .weak FSMC_IRQHandler /* FSMC */ - .weak SDIO_IRQHandler /* SDIO */ - .weak TIM5_IRQHandler /* TIM5 */ - .weak SPI3_IRQHandler /* SPI3 */ - .weak UART4_IRQHandler /* UART4 */ - .weak UART5_IRQHandler /* UART5 */ - .weak TIM6_IRQHandler /* TIM6 */ - .weak TIM7_IRQHandler /* TIM7 */ - .weak DMA2_Channel1_IRQHandler /* DMA2 Channel 1 */ - .weak DMA2_Channel2_IRQHandler /* DMA2 Channel 2 */ - .weak DMA2_Channel3_IRQHandler /* DMA2 Channel 3 */ - .weak DMA2_Channel4_IRQHandler /* DMA2 Channel 4 */ - .weak DMA2_Channel5_IRQHandler /* DMA2 Channel 5 */ - .weak OTG_FS_IRQHandler /* OTGFS */ - .weak UART6_IRQHandler /* UART6 */ - .weak UART7_IRQHandler /* UART7 */ - .weak UART8_IRQHandler /* UART8 */ - .weak TIM9_BRK_IRQHandler /* TIM9 Break */ - .weak TIM9_UP_IRQHandler /* TIM9 Update */ - .weak TIM9_TRG_COM_IRQHandler /* TIM9 Trigger and Commutation */ - .weak TIM9_CC_IRQHandler /* TIM9 Capture Compare */ - .weak TIM10_BRK_IRQHandler /* TIM10 Break */ - .weak TIM10_UP_IRQHandler /* TIM10 Update */ - .weak TIM10_TRG_COM_IRQHandler /* TIM10 Trigger and Commutation */ - .weak TIM10_CC_IRQHandler /* TIM10 Capture Compare */ - .weak DMA2_Channel6_IRQHandler /* DMA2 Channel 6 */ - .weak DMA2_Channel7_IRQHandler /* DMA2 Channel 7 */ - .weak DMA2_Channel8_IRQHandler /* DMA2 Channel 8 */ - .weak DMA2_Channel9_IRQHandler /* DMA2 Channel 9 */ - .weak DMA2_Channel10_IRQHandler /* DMA2 Channel 10 */ - .weak DMA2_Channel11_IRQHandler /* DMA2 Channel 11 */ +.section .text,"ax",@progbits +Reset_Handler: -NMI_Handler: 1: j 1b -HardFault_Handler: 1: j 1b -Ecall_M_Mode_Handler: 1: j 1b -Ecall_U_Mode_Handler: 1: j 1b -Break_Point_Handler: 1: j 1b -SysTick_Handler: 1: j 1b -SW_Handler: 1: j 1b -WWDG_IRQHandler: 1: j 1b -PVD_IRQHandler: 1: j 1b -TAMPER_IRQHandler: 1: j 1b -RTC_IRQHandler: 1: j 1b -FLASH_IRQHandler: 1: j 1b -RCC_IRQHandler: 1: j 1b -EXTI0_IRQHandler: 1: j 1b -EXTI1_IRQHandler: 1: j 1b -EXTI2_IRQHandler: 1: j 1b -EXTI3_IRQHandler: 1: j 1b -EXTI4_IRQHandler: 1: j 1b -DMA1_Channel1_IRQHandler: 1: j 1b -DMA1_Channel2_IRQHandler: 1: j 1b -DMA1_Channel3_IRQHandler: 1: j 1b -DMA1_Channel4_IRQHandler: 1: j 1b -DMA1_Channel5_IRQHandler: 1: j 1b -DMA1_Channel6_IRQHandler: 1: j 1b -DMA1_Channel7_IRQHandler: 1: j 1b -ADC1_2_IRQHandler: 1: j 1b -USB_HP_CAN1_TX_IRQHandler: 1: j 1b -USB_LP_CAN1_RX0_IRQHandler: 1: j 1b -CAN1_RX1_IRQHandler: 1: j 1b -CAN1_SCE_IRQHandler: 1: j 1b -EXTI9_5_IRQHandler: 1: j 1b -TIM1_BRK_IRQHandler: 1: j 1b -TIM1_UP_IRQHandler: 1: j 1b -TIM1_TRG_COM_IRQHandler: 1: j 1b -TIM1_CC_IRQHandler: 1: j 1b -TIM2_IRQHandler: 1: j 1b -TIM3_IRQHandler: 1: j 1b -TIM4_IRQHandler: 1: j 1b -I2C1_EV_IRQHandler: 1: j 1b -I2C1_ER_IRQHandler: 1: j 1b -I2C2_EV_IRQHandler: 1: j 1b -I2C2_ER_IRQHandler: 1: j 1b -SPI1_IRQHandler: 1: j 1b -SPI2_IRQHandler: 1: j 1b -USART1_IRQHandler: 1: j 1b -USART2_IRQHandler: 1: j 1b -USART3_IRQHandler: 1: j 1b -EXTI15_10_IRQHandler: 1: j 1b -RTCAlarm_IRQHandler: 1: j 1b -TIM8_BRK_IRQHandler: 1: j 1b -TIM8_UP_IRQHandler: 1: j 1b -TIM8_TRG_COM_IRQHandler: 1: j 1b -TIM8_CC_IRQHandler: 1: j 1b -RNG_IRQHandler: 1: j 1b -FSMC_IRQHandler: 1: j 1b -SDIO_IRQHandler: 1: j 1b -TIM5_IRQHandler: 1: j 1b -SPI3_IRQHandler: 1: j 1b -UART4_IRQHandler: 1: j 1b -UART5_IRQHandler: 1: j 1b -TIM6_IRQHandler: 1: j 1b -TIM7_IRQHandler: 1: j 1b -DMA2_Channel1_IRQHandler: 1: j 1b -DMA2_Channel2_IRQHandler: 1: j 1b -DMA2_Channel3_IRQHandler: 1: j 1b -DMA2_Channel4_IRQHandler: 1: j 1b -DMA2_Channel5_IRQHandler: 1: j 1b -OTG_FS_IRQHandler: 1: j 1b -UART6_IRQHandler: 1: j 1b -UART7_IRQHandler: 1: j 1b -UART8_IRQHandler: 1: j 1b -TIM9_BRK_IRQHandler: 1: j 1b -TIM9_UP_IRQHandler: 1: j 1b -TIM9_TRG_COM_IRQHandler: 1: j 1b -TIM9_CC_IRQHandler: 1: j 1b -TIM10_BRK_IRQHandler: 1: j 1b -TIM10_UP_IRQHandler: 1: j 1b -TIM10_TRG_COM_IRQHandler: 1: j 1b -TIM10_CC_IRQHandler: 1: j 1b -DMA2_Channel6_IRQHandler: 1: j 1b -DMA2_Channel7_IRQHandler: 1: j 1b -DMA2_Channel8_IRQHandler: 1: j 1b -DMA2_Channel9_IRQHandler: 1: j 1b -DMA2_Channel10_IRQHandler: 1: j 1b -DMA2_Channel11_IRQHandler: 1: j 1b +.option push +.option norelax + la gp, __global_pointer$ +.option pop + la sp, _eusrstack +copy_data: + /* Load data section from flash to RAM */ + la a0, _sidata + la a1, _sdata + la a2, _edata + bgeu a1, a2, clear_bss - .section .text.handle_reset,"ax",@progbits - .weak handle_reset - .align 1 -handle_reset: -.option push -.option norelax - la gp, __global_pointer$ -.option pop -1: - la sp, _eusrstack -2: - /* Load data section from flash to RAM */ - la a0, _data_lma - la a1, _data_vma - la a2, _edata - bgeu a1, a2, 2f -1: - lw t0, (a0) - sw t0, (a1) - addi a0, a0, 4 - addi a1, a1, 4 - bltu a1, a2, 1b -2: - /* Clear bss section */ - la a0, _sbss - la a1, _ebss - bgeu a0, a1, 2f -1: - sw zero, (a0) - addi a0, a0, 4 - bltu a0, a1, 1b -2: +loop_copy_data: + lw t0, (a0) + sw t0, (a1) + addi a0, a0, 4 + addi a1, a1, 4 + bltu a1, a2, loop_copy_data + +clear_bss: + /* Clear bss section */ + la a0, _sbss + la a1, _ebss + bgeu a0, a1, setup_interrupts +loop_clear_bss: + sw zero, (a0) + addi a0, a0, 4 + bltu a0, a1, loop_clear_bss + +setup_interrupts: li t0, 0x1f csrw 0xbc0, t0 /* Enable nested and hardware stack */ - /* li t0, 0x1f */ /* For MRS proprietary GCC compilers */ + /* li t0, 0x1f */ /* For MRS proprietary GCC compilers */ /* Enable nested interrupt, disable hardware stack */ li t0, 0x1e /* Refer to RISC-V4 PFIC manual */ - csrw 0x804, t0 - - /* Enable floating point and interrupt */ - li t0, 0x6088 - csrs mstatus, t0 - - la t0, _vector_base - ori t0, t0, 3 - csrw mtvec, t0 - - jal SystemInit - la t0, main - csrw mepc, t0 - mret + csrw 0x804, t0 + /* FS: Initial, MPP: M mode, MPIE: EN, MIE: EN */ + li t0, 0x3888 + csrs mstatus, t0 + la t0, _vectors + ori t0, t0, 3 /* PFIC exception handling */ + csrw mtvec, t0 + jal SystemInit + jal main +dead_loop: + j dead_loop diff --git a/BSP/Startup/startup_ch32v30x_D8C.S b/BSP/Startup/startup_ch32v30x_D8C.S index 85b2e34..bf5708e 100644 --- a/BSP/Startup/startup_ch32v30x_D8C.S +++ b/BSP/Startup/startup_ch32v30x_D8C.S @@ -8,384 +8,177 @@ * SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ - .section .init,"ax",@progbits - .global _start - .align 1 +.section .vectors,"ax",@progbits +.global _start +.align 4 _start: - j handle_reset - .word 0x00000013 - .word 0x00000013 - .word 0x00000013 - .word 0x00000013 - .word 0x00000013 - .word 0x00000013 - .word 0x00000013 - .word 0x00000013 - .word 0x00000013 - .word 0x00000013 - .word 0x00000013 - .word 0x00000013 - .word 0x00100073 - .section .vector,"ax",@progbits - .align 1 -_vector_base: - .option norvc; - .word _start - .word 0 - .word NMI_Handler /* NMI */ - .word HardFault_Handler /* Hard Fault */ - .word 0 - .word Ecall_M_Mode_Handler /* Ecall M Mode */ - .word 0 - .word 0 - .word Ecall_U_Mode_Handler /* Ecall U Mode */ - .word Break_Point_Handler /* Break Point */ - .word 0 - .word 0 - .word SysTick_Handler /* SysTick */ - .word 0 - .word SW_Handler /* SW */ - .word 0 - /* External Interrupts */ - .word WWDG_IRQHandler /* Window Watchdog */ - .word PVD_IRQHandler /* PVD through EXTI Line detect */ - .word TAMPER_IRQHandler /* TAMPER */ - .word RTC_IRQHandler /* RTC */ - .word FLASH_IRQHandler /* Flash */ - .word RCC_IRQHandler /* RCC */ - .word EXTI0_IRQHandler /* EXTI Line 0 */ - .word EXTI1_IRQHandler /* EXTI Line 1 */ - .word EXTI2_IRQHandler /* EXTI Line 2 */ - .word EXTI3_IRQHandler /* EXTI Line 3 */ - .word EXTI4_IRQHandler /* EXTI Line 4 */ - .word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */ - .word DMA1_Channel2_IRQHandler /* DMA1 Channel 2 */ - .word DMA1_Channel3_IRQHandler /* DMA1 Channel 3 */ - .word DMA1_Channel4_IRQHandler /* DMA1 Channel 4 */ - .word DMA1_Channel5_IRQHandler /* DMA1 Channel 5 */ - .word DMA1_Channel6_IRQHandler /* DMA1 Channel 6 */ - .word DMA1_Channel7_IRQHandler /* DMA1 Channel 7 */ - .word ADC1_2_IRQHandler /* ADC1_2 */ - .word USB_HP_CAN1_TX_IRQHandler /* USB HP and CAN1 TX */ - .word USB_LP_CAN1_RX0_IRQHandler /* USB LP and CAN1RX0 */ - .word CAN1_RX1_IRQHandler /* CAN1 RX1 */ - .word CAN1_SCE_IRQHandler /* CAN1 SCE */ - .word EXTI9_5_IRQHandler /* EXTI Line 9..5 */ - .word TIM1_BRK_IRQHandler /* TIM1 Break */ - .word TIM1_UP_IRQHandler /* TIM1 Update */ - .word TIM1_TRG_COM_IRQHandler /* TIM1 Trigger and Commutation */ - .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ - .word TIM2_IRQHandler /* TIM2 */ - .word TIM3_IRQHandler /* TIM3 */ - .word TIM4_IRQHandler /* TIM4 */ - .word I2C1_EV_IRQHandler /* I2C1 Event */ - .word I2C1_ER_IRQHandler /* I2C1 Error */ - .word I2C2_EV_IRQHandler /* I2C2 Event */ - .word I2C2_ER_IRQHandler /* I2C2 Error */ - .word SPI1_IRQHandler /* SPI1 */ - .word SPI2_IRQHandler /* SPI2 */ - .word USART1_IRQHandler /* USART1 */ - .word USART2_IRQHandler /* USART2 */ - .word USART3_IRQHandler /* USART3 */ - .word EXTI15_10_IRQHandler /* EXTI Line 15..10 */ - .word RTCAlarm_IRQHandler /* RTC Alarm through EXTI Line */ - .word USBWakeUp_IRQHandler /* USB Wakeup from suspend */ - .word TIM8_BRK_IRQHandler /* TIM8 Break */ - .word TIM8_UP_IRQHandler /* TIM8 Update */ - .word TIM8_TRG_COM_IRQHandler /* TIM8 Trigger and Commutation */ - .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ - .word RNG_IRQHandler /* RNG */ - .word FSMC_IRQHandler /* FSMC */ - .word SDIO_IRQHandler /* SDIO */ - .word TIM5_IRQHandler /* TIM5 */ - .word SPI3_IRQHandler /* SPI3 */ - .word UART4_IRQHandler /* UART4 */ - .word UART5_IRQHandler /* UART5 */ - .word TIM6_IRQHandler /* TIM6 */ - .word TIM7_IRQHandler /* TIM7 */ - .word DMA2_Channel1_IRQHandler /* DMA2 Channel 1 */ - .word DMA2_Channel2_IRQHandler /* DMA2 Channel 2 */ - .word DMA2_Channel3_IRQHandler /* DMA2 Channel 3 */ - .word DMA2_Channel4_IRQHandler /* DMA2 Channel 4 */ - .word DMA2_Channel5_IRQHandler /* DMA2 Channel 5 */ - .word ETH_IRQHandler /* ETH */ - .word ETH_WKUP_IRQHandler /* ETH WakeUp */ - .word CAN2_TX_IRQHandler /* CAN2 TX */ - .word CAN2_RX0_IRQHandler /* CAN2 RX0 */ - .word CAN2_RX1_IRQHandler /* CAN2 RX1 */ - .word CAN2_SCE_IRQHandler /* CAN2 SCE */ - .word OTG_FS_IRQHandler /* OTGFS */ - .word USBHSWakeup_IRQHandler /* USBHS Wakeup */ - .word USBHS_IRQHandler /* USBHS */ - .word DVP_IRQHandler /* DVP */ - .word UART6_IRQHandler /* UART6 */ - .word UART7_IRQHandler /* UART7 */ - .word UART8_IRQHandler /* UART8 */ - .word TIM9_BRK_IRQHandler /* TIM9 Break */ - .word TIM9_UP_IRQHandler /* TIM9 Update */ - .word TIM9_TRG_COM_IRQHandler /* TIM9 Trigger and Commutation */ - .word TIM9_CC_IRQHandler /* TIM9 Capture Compare */ - .word TIM10_BRK_IRQHandler /* TIM10 Break */ - .word TIM10_UP_IRQHandler /* TIM10 Update */ - .word TIM10_TRG_COM_IRQHandler /* TIM10 Trigger and Commutation */ - .word TIM10_CC_IRQHandler /* TIM10 Capture Compare */ - .word DMA2_Channel6_IRQHandler /* DMA2 Channel 6 */ - .word DMA2_Channel7_IRQHandler /* DMA2 Channel 7 */ - .word DMA2_Channel8_IRQHandler /* DMA2 Channel 8 */ - .word DMA2_Channel9_IRQHandler /* DMA2 Channel 9 */ - .word DMA2_Channel10_IRQHandler /* DMA2 Channel 10 */ - .word DMA2_Channel11_IRQHandler /* DMA2 Channel 11 */ + j Reset_Handler /* Go! */ - .option rvc; + .align 8 + .option push + .option norvc +_vectors: + .word Fault_Handler /* 0: Exception */ + .word Default_Handler /* 1: Reserved */ + .word NMI_Handler /* 2: NMI */ + .word Default_Handler /* 3: Reserved */ + .word Default_Handler /* 4: Reserved */ + .word Ecall_M_Handler /* 5: M mode Ecall */ + .word Default_Handler /* 6: Reserved */ + .word Default_Handler /* 7: Reserved */ + .word Ecall_U_Handler /* 8: U mode Ecall */ + .word Default_Handler /* 9: Reserved */ + .word Default_Handler /* 10: Reserved */ + .word Default_Handler /* 11: Reserved */ + .word SysTick_Handler /* 12: SysTick */ + .word Default_Handler /* 13: Reserved */ + .word SW_Handler /* 14: Software */ + .word Default_Handler /* 15: Reserved */ + .word WWDG_IRQHandler /* 16: Window Watchdog */ + .word PVD_IRQHandler /* 17: PVD through EXTI Line detect */ + .word TAMPER_IRQHandler /* 18: TAMPER */ + .word RTC_IRQHandler /* 19: RTC */ + .word FLASH_IRQHandler /* 20: Flash */ + .word RCC_IRQHandler /* 21: RCC */ + .word EXTI0_IRQHandler /* 22: EXTI Line 0 */ + .word EXTI1_IRQHandler /* 23: EXTI Line 1 */ + .word EXTI2_IRQHandler /* 24: EXTI Line 2 */ + .word EXTI3_IRQHandler /* 25: EXTI Line 3 */ + .word EXTI4_IRQHandler /* 26: EXTI Line 4 */ + .word DMA1_Channel1_IRQHandler /* 27: DMA1 Channel 1 */ + .word DMA1_Channel2_IRQHandler /* 28: DMA1 Channel 2 */ + .word DMA1_Channel3_IRQHandler /* 29: DMA1 Channel 3 */ + .word DMA1_Channel4_IRQHandler /* 30: DMA1 Channel 4 */ + .word DMA1_Channel5_IRQHandler /* 31: DMA1 Channel 5 */ + .word DMA1_Channel6_IRQHandler /* 32: DMA1 Channel 6 */ + .word DMA1_Channel7_IRQHandler /* 33: DMA1 Channel 7 */ + .word ADC1_2_IRQHandler /* 34: ADC1_2 */ + .word USB_HP_CAN1_TX_IRQHandler /* 35: USB HP and CAN1 TX */ + .word USB_LP_CAN1_RX0_IRQHandler /* 36: USB LP and CAN1RX0 */ + .word CAN1_RX1_IRQHandler /* 37: CAN1 RX1 */ + .word CAN1_SCE_IRQHandler /* 38: CAN1 SCE */ + .word EXTI9_5_IRQHandler /* 39: EXTI Line 9..5 */ + .word TIM1_BRK_IRQHandler /* 40: TIM1 Break */ + .word TIM1_UP_IRQHandler /* 41: TIM1 Update */ + .word TIM1_TRG_COM_IRQHandler /* 42: TIM1 Trigger and Commutation */ + .word TIM1_CC_IRQHandler /* 43: TIM1 Capture Compare */ + .word TIM2_IRQHandler /* 44: TIM2 */ + .word TIM3_IRQHandler /* 45: TIM3 */ + .word TIM4_IRQHandler /* 46: TIM4 */ + .word I2C1_EV_IRQHandler /* 47: I2C1 Event */ + .word I2C1_ER_IRQHandler /* 48: I2C1 Error */ + .word I2C2_EV_IRQHandler /* 49: I2C2 Event */ + .word I2C2_ER_IRQHandler /* 50: I2C2 Error */ + .word SPI1_IRQHandler /* 51: SPI1 */ + .word SPI2_IRQHandler /* 52: SPI2 */ + .word USART1_IRQHandler /* 53: USART1 */ + .word USART2_IRQHandler /* 54: USART2 */ + .word USART3_IRQHandler /* 55: USART3 */ + .word EXTI15_10_IRQHandler /* 56: EXTI Line 15..10 */ + .word RTCAlarm_IRQHandler /* 57: RTC Alarm through EXTI Line */ + .word USBWakeUp_IRQHandler /* 58: USB Wakeup from suspend */ + .word TIM8_BRK_IRQHandler /* 59: TIM8 Break */ + .word TIM8_UP_IRQHandler /* 60: TIM8 Update */ + .word TIM8_TRG_COM_IRQHandler /* 61: TIM8 Trigger and Commutation */ + .word TIM8_CC_IRQHandler /* 62: TIM8 Capture Compare */ + .word RNG_IRQHandler /* 63: RNG */ + .word FSMC_IRQHandler /* 64: FSMC */ + .word SDIO_IRQHandler /* 65: SDIO */ + .word TIM5_IRQHandler /* 66: TIM5 */ + .word SPI3_IRQHandler /* 67: SPI3 */ + .word UART4_IRQHandler /* 68: UART4 */ + .word UART5_IRQHandler /* 69: UART5 */ + .word TIM6_IRQHandler /* 70: TIM6 */ + .word TIM7_IRQHandler /* 71: TIM7 */ + .word DMA2_Channel1_IRQHandler /* 72: DMA2 Channel 1 */ + .word DMA2_Channel2_IRQHandler /* 73: DMA2 Channel 2 */ + .word DMA2_Channel3_IRQHandler /* 74: DMA2 Channel 3 */ + .word DMA2_Channel4_IRQHandler /* 75: DMA2 Channel 4 */ + .word DMA2_Channel5_IRQHandler /* 76: DMA2 Channel 5 */ + .word ETH_IRQHandler /* 77: ETH */ + .word ETH_WKUP_IRQHandler /* 78: ETH WakeUp */ + .word CAN2_TX_IRQHandler /* 79: CAN2 TX */ + .word CAN2_RX0_IRQHandler /* 80: CAN2 RX0 */ + .word CAN2_RX1_IRQHandler /* 81: CAN2 RX1 */ + .word CAN2_SCE_IRQHandler /* 82: CAN2 SCE */ + .word OTG_FS_IRQHandler /* 83: OTGFS */ + .word USBHSWakeup_IRQHandler /* 84: USBHS Wakeup */ + .word USBHS_IRQHandler /* 85: USBHS */ + .word DVP_IRQHandler /* 86: DVP */ + .word UART6_IRQHandler /* 87: UART6 */ + .word UART7_IRQHandler /* 88: UART7 */ + .word UART8_IRQHandler /* 89: UART8 */ + .word TIM9_BRK_IRQHandler /* 90: TIM9 Break */ + .word TIM9_UP_IRQHandler /* 91: TIM9 Update */ + .word TIM9_TRG_COM_IRQHandler /* 92: TIM9 Trigger and Commutation */ + .word TIM9_CC_IRQHandler /* 93: TIM9 Capture Compare */ + .word TIM10_BRK_IRQHandler /* 94: TIM10 Break */ + .word TIM10_UP_IRQHandler /* 95: TIM10 Update */ + .word TIM10_TRG_COM_IRQHandler /* 96: TIM10 Trigger and Commutation */ + .word TIM10_CC_IRQHandler /* 97: TIM10 Capture Compare */ + .word DMA2_Channel6_IRQHandler /* 98: DMA2 Channel 6 */ + .word DMA2_Channel7_IRQHandler /* 99: DMA2 Channel 7 */ + .word DMA2_Channel8_IRQHandler /* 100: DMA2 Channel 8 */ + .word DMA2_Channel9_IRQHandler /* 101: DMA2 Channel 9 */ + .word DMA2_Channel10_IRQHandler /* 102: DMA2 Channel 10 */ + .word DMA2_Channel11_IRQHandler /* 103: DMA2 Channel 11 */ +.option pop - .section .text.vector_handler, "ax", @progbits - .weak NMI_Handler /* NMI */ - .weak HardFault_Handler /* Hard Fault */ - .weak Ecall_M_Mode_Handler /* Ecall M Mode */ - .weak Ecall_U_Mode_Handler /* Ecall U Mode */ - .weak Break_Point_Handler /* Break Point */ - .weak SysTick_Handler /* SysTick */ - .weak SW_Handler /* SW */ - .weak WWDG_IRQHandler /* Window Watchdog */ - .weak PVD_IRQHandler /* PVD through EXTI Line detect */ - .weak TAMPER_IRQHandler /* TAMPER */ - .weak RTC_IRQHandler /* RTC */ - .weak FLASH_IRQHandler /* Flash */ - .weak RCC_IRQHandler /* RCC */ - .weak EXTI0_IRQHandler /* EXTI Line 0 */ - .weak EXTI1_IRQHandler /* EXTI Line 1 */ - .weak EXTI2_IRQHandler /* EXTI Line 2 */ - .weak EXTI3_IRQHandler /* EXTI Line 3 */ - .weak EXTI4_IRQHandler /* EXTI Line 4 */ - .weak DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */ - .weak DMA1_Channel2_IRQHandler /* DMA1 Channel 2 */ - .weak DMA1_Channel3_IRQHandler /* DMA1 Channel 3 */ - .weak DMA1_Channel4_IRQHandler /* DMA1 Channel 4 */ - .weak DMA1_Channel5_IRQHandler /* DMA1 Channel 5 */ - .weak DMA1_Channel6_IRQHandler /* DMA1 Channel 6 */ - .weak DMA1_Channel7_IRQHandler /* DMA1 Channel 7 */ - .weak ADC1_2_IRQHandler /* ADC1_2 */ - .weak USB_HP_CAN1_TX_IRQHandler /* USB HP and CAN1 TX */ - .weak USB_LP_CAN1_RX0_IRQHandler /* USB LP and CAN1RX0 */ - .weak CAN1_RX1_IRQHandler /* CAN1 RX1 */ - .weak CAN1_SCE_IRQHandler /* CAN1 SCE */ - .weak EXTI9_5_IRQHandler /* EXTI Line 9..5 */ - .weak TIM1_BRK_IRQHandler /* TIM1 Break */ - .weak TIM1_UP_IRQHandler /* TIM1 Update */ - .weak TIM1_TRG_COM_IRQHandler /* TIM1 Trigger and Commutation */ - .weak TIM1_CC_IRQHandler /* TIM1 Capture Compare */ - .weak TIM2_IRQHandler /* TIM2 */ - .weak TIM3_IRQHandler /* TIM3 */ - .weak TIM4_IRQHandler /* TIM4 */ - .weak I2C1_EV_IRQHandler /* I2C1 Event */ - .weak I2C1_ER_IRQHandler /* I2C1 Error */ - .weak I2C2_EV_IRQHandler /* I2C2 Event */ - .weak I2C2_ER_IRQHandler /* I2C2 Error */ - .weak SPI1_IRQHandler /* SPI1 */ - .weak SPI2_IRQHandler /* SPI2 */ - .weak USART1_IRQHandler /* USART1 */ - .weak USART2_IRQHandler /* USART2 */ - .weak USART3_IRQHandler /* USART3 */ - .weak EXTI15_10_IRQHandler /* EXTI Line 15..10 */ - .weak RTCAlarm_IRQHandler /* RTC Alarm through EXTI Line */ - .weak USBWakeUp_IRQHandler /* USB Wakeup from suspend */ - .weak TIM8_BRK_IRQHandler /* TIM8 Break */ - .weak TIM8_UP_IRQHandler /* TIM8 Update */ - .weak TIM8_TRG_COM_IRQHandler /* TIM8 Trigger and Commutation */ - .weak TIM8_CC_IRQHandler /* TIM8 Capture Compare */ - .weak RNG_IRQHandler /* RNG */ - .weak FSMC_IRQHandler /* FSMC */ - .weak SDIO_IRQHandler /* SDIO */ - .weak TIM5_IRQHandler /* TIM5 */ - .weak SPI3_IRQHandler /* SPI3 */ - .weak UART4_IRQHandler /* UART4 */ - .weak UART5_IRQHandler /* UART5 */ - .weak TIM6_IRQHandler /* TIM6 */ - .weak TIM7_IRQHandler /* TIM7 */ - .weak DMA2_Channel1_IRQHandler /* DMA2 Channel 1 */ - .weak DMA2_Channel2_IRQHandler /* DMA2 Channel 2 */ - .weak DMA2_Channel3_IRQHandler /* DMA2 Channel 3 */ - .weak DMA2_Channel4_IRQHandler /* DMA2 Channel 4 */ - .weak DMA2_Channel5_IRQHandler /* DMA2 Channel 5 */ - .weak ETH_IRQHandler /* ETH */ - .weak ETH_WKUP_IRQHandler /* ETH WakeUp */ - .weak CAN2_TX_IRQHandler /* CAN2 TX */ - .weak CAN2_RX0_IRQHandler /* CAN2 RX0 */ - .weak CAN2_RX1_IRQHandler /* CAN2 RX1 */ - .weak CAN2_SCE_IRQHandler /* CAN2 SCE */ - .weak OTG_FS_IRQHandler /* OTGFS */ - .weak USBHSWakeup_IRQHandler /* USBHS Wakeup */ - .weak USBHS_IRQHandler /* USBHS */ - .weak DVP_IRQHandler /* DVP */ - .weak UART6_IRQHandler /* UART6 */ - .weak UART7_IRQHandler /* UART7 */ - .weak UART8_IRQHandler /* UART8 */ - .weak TIM9_BRK_IRQHandler /* TIM9 Break */ - .weak TIM9_UP_IRQHandler /* TIM9 Update */ - .weak TIM9_TRG_COM_IRQHandler /* TIM9 Trigger and Commutation */ - .weak TIM9_CC_IRQHandler /* TIM9 Capture Compare */ - .weak TIM10_BRK_IRQHandler /* TIM10 Break */ - .weak TIM10_UP_IRQHandler /* TIM10 Update */ - .weak TIM10_TRG_COM_IRQHandler /* TIM10 Trigger and Commutation */ - .weak TIM10_CC_IRQHandler /* TIM10 Capture Compare */ - .weak DMA2_Channel6_IRQHandler /* DMA2 Channel 6 */ - .weak DMA2_Channel7_IRQHandler /* DMA2 Channel 7 */ - .weak DMA2_Channel8_IRQHandler /* DMA2 Channel 8 */ - .weak DMA2_Channel9_IRQHandler /* DMA2 Channel 9 */ - .weak DMA2_Channel10_IRQHandler /* DMA2 Channel 10 */ - .weak DMA2_Channel11_IRQHandler /* DMA2 Channel 11 */ +.section .text,"ax",@progbits +Reset_Handler: -NMI_Handler: 1: j 1b -HardFault_Handler: 1: j 1b -Ecall_M_Mode_Handler: 1: j 1b -Ecall_U_Mode_Handler: 1: j 1b -Break_Point_Handler: 1: j 1b -SysTick_Handler: 1: j 1b -SW_Handler: 1: j 1b -WWDG_IRQHandler: 1: j 1b -PVD_IRQHandler: 1: j 1b -TAMPER_IRQHandler: 1: j 1b -RTC_IRQHandler: 1: j 1b -FLASH_IRQHandler: 1: j 1b -RCC_IRQHandler: 1: j 1b -EXTI0_IRQHandler: 1: j 1b -EXTI1_IRQHandler: 1: j 1b -EXTI2_IRQHandler: 1: j 1b -EXTI3_IRQHandler: 1: j 1b -EXTI4_IRQHandler: 1: j 1b -DMA1_Channel1_IRQHandler: 1: j 1b -DMA1_Channel2_IRQHandler: 1: j 1b -DMA1_Channel3_IRQHandler: 1: j 1b -DMA1_Channel4_IRQHandler: 1: j 1b -DMA1_Channel5_IRQHandler: 1: j 1b -DMA1_Channel6_IRQHandler: 1: j 1b -DMA1_Channel7_IRQHandler: 1: j 1b -ADC1_2_IRQHandler: 1: j 1b -USB_HP_CAN1_TX_IRQHandler: 1: j 1b -USB_LP_CAN1_RX0_IRQHandler: 1: j 1b -CAN1_RX1_IRQHandler: 1: j 1b -CAN1_SCE_IRQHandler: 1: j 1b -EXTI9_5_IRQHandler: 1: j 1b -TIM1_BRK_IRQHandler: 1: j 1b -TIM1_UP_IRQHandler: 1: j 1b -TIM1_TRG_COM_IRQHandler: 1: j 1b -TIM1_CC_IRQHandler: 1: j 1b -TIM2_IRQHandler: 1: j 1b -TIM3_IRQHandler: 1: j 1b -TIM4_IRQHandler: 1: j 1b -I2C1_EV_IRQHandler: 1: j 1b -I2C1_ER_IRQHandler: 1: j 1b -I2C2_EV_IRQHandler: 1: j 1b -I2C2_ER_IRQHandler: 1: j 1b -SPI1_IRQHandler: 1: j 1b -SPI2_IRQHandler: 1: j 1b -USART1_IRQHandler: 1: j 1b -USART2_IRQHandler: 1: j 1b -USART3_IRQHandler: 1: j 1b -EXTI15_10_IRQHandler: 1: j 1b -RTCAlarm_IRQHandler: 1: j 1b -USBWakeUp_IRQHandler: 1: j 1b -TIM8_BRK_IRQHandler: 1: j 1b -TIM8_UP_IRQHandler: 1: j 1b -TIM8_TRG_COM_IRQHandler: 1: j 1b -TIM8_CC_IRQHandler: 1: j 1b -RNG_IRQHandler: 1: j 1b -FSMC_IRQHandler: 1: j 1b -SDIO_IRQHandler: 1: j 1b -TIM5_IRQHandler: 1: j 1b -SPI3_IRQHandler: 1: j 1b -UART4_IRQHandler: 1: j 1b -UART5_IRQHandler: 1: j 1b -TIM6_IRQHandler: 1: j 1b -TIM7_IRQHandler: 1: j 1b -DMA2_Channel1_IRQHandler: 1: j 1b -DMA2_Channel2_IRQHandler: 1: j 1b -DMA2_Channel3_IRQHandler: 1: j 1b -DMA2_Channel4_IRQHandler: 1: j 1b -DMA2_Channel5_IRQHandler: 1: j 1b -ETH_IRQHandler: 1: j 1b -ETH_WKUP_IRQHandler: 1: j 1b -CAN2_TX_IRQHandler: 1: j 1b -CAN2_RX0_IRQHandler: 1: j 1b -CAN2_RX1_IRQHandler: 1: j 1b -CAN2_SCE_IRQHandler: 1: j 1b -OTG_FS_IRQHandler: 1: j 1b -USBHSWakeup_IRQHandler: 1: j 1b -USBHS_IRQHandler: 1: j 1b -DVP_IRQHandler: 1: j 1b -UART6_IRQHandler: 1: j 1b -UART7_IRQHandler: 1: j 1b -UART8_IRQHandler: 1: j 1b -TIM9_BRK_IRQHandler: 1: j 1b -TIM9_UP_IRQHandler: 1: j 1b -TIM9_TRG_COM_IRQHandler: 1: j 1b -TIM9_CC_IRQHandler: 1: j 1b -TIM10_BRK_IRQHandler: 1: j 1b -TIM10_UP_IRQHandler: 1: j 1b -TIM10_TRG_COM_IRQHandler: 1: j 1b -TIM10_CC_IRQHandler: 1: j 1b -DMA2_Channel6_IRQHandler: 1: j 1b -DMA2_Channel7_IRQHandler: 1: j 1b -DMA2_Channel8_IRQHandler: 1: j 1b -DMA2_Channel9_IRQHandler: 1: j 1b -DMA2_Channel10_IRQHandler: 1: j 1b -DMA2_Channel11_IRQHandler: 1: j 1b - - - .section .text.handle_reset,"ax",@progbits - .weak handle_reset - .align 1 -handle_reset: .option push -.option norelax - la gp, __global_pointer$ -.option pop -1: - la sp, _eusrstack -2: - /* Load data section from flash to RAM */ - la a0, _data_lma - la a1, _data_vma - la a2, _edata - bgeu a1, a2, 2f -1: - lw t0, (a0) - sw t0, (a1) - addi a0, a0, 4 - addi a1, a1, 4 - bltu a1, a2, 1b -2: - /* Clear bss section */ - la a0, _sbss - la a1, _ebss - bgeu a0, a1, 2f -1: - sw zero, (a0) - addi a0, a0, 4 - bltu a0, a1, 1b -2: +.option norelax + la gp, __global_pointer$ +.option pop + + la sp, _eusrstack +copy_data: + /* Load data section from flash to RAM */ + la a0, _sidata + la a1, _sdata + la a2, _edata + bgeu a1, a2, clear_bss + +loop_copy_data: + lw t0, (a0) + sw t0, (a1) + addi a0, a0, 4 + addi a1, a1, 4 + bltu a1, a2, loop_copy_data + +clear_bss: + /* Clear bss section */ + la a0, _sbss + la a1, _ebss + bgeu a0, a1, setup_interrupts +loop_clear_bss: + sw zero, (a0) + addi a0, a0, 4 + bltu a0, a1, loop_clear_bss + +setup_interrupts: li t0, 0x1f csrw 0xbc0, t0 /* Enable nested and hardware stack */ - /* li t0, 0x1f */ /* For MRS proprietary GCC compilers */ + /* li t0, 0x1f */ /* For MRS proprietary GCC compilers */ /* Enable nested interrupt, disable hardware stack */ li t0, 0x1e /* Refer to RISC-V4 PFIC manual */ - csrw 0x804, t0 + csrw 0x804, t0 - /* Enable floating point and interrupt */ - li t0, 0x6088 - csrs mstatus, t0 + /* FS: Initial, MPP: M mode, MPIE: EN, MIE: EN */ + li t0, 0x3888 + csrs mstatus, t0 - la t0, _vector_base - ori t0, t0, 3 - csrw mtvec, t0 - - jal SystemInit - la t0, main - csrw mepc, t0 - mret + la t0, _vectors + ori t0, t0, 3 /* PFIC exception handling */ + csrw mtvec, t0 + jal SystemInit + jal main +dead_loop: + j dead_loop diff --git a/include/ch32v30x_conf.h b/include/ch32v30x_conf.h index 92ec0ca..31c7430 100644 --- a/include/ch32v30x_conf.h +++ b/include/ch32v30x_conf.h @@ -31,7 +31,6 @@ #include "ch32v30x_tim.h" #include "ch32v30x_usart.h" #include "ch32v30x_wwdg.h" -#include "ch32v30x_it.h" #include "ch32v30x_misc.h" diff --git a/include/ch32v30x_it.h b/include/ch32v30x_it.h index c539cb5..bb2a44e 100644 --- a/include/ch32v30x_it.h +++ b/include/ch32v30x_it.h @@ -1,18 +1,4 @@ -/********************************** (C) COPYRIGHT ******************************* -* File Name : ch32v30x_it.h -* Author : WCH -* Version : V1.0.0 -* Date : 2021/06/06 -* Description : This file contains the headers of the interrupt handlers. -* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. -* SPDX-License-Identifier: Apache-2.0 -*******************************************************************************/ -#ifndef __CH32V30x_IT_H -#define __CH32V30x_IT_H - -#include "debug.h" - - -#endif /* __CH32V30x_IT_H */ - +#ifndef CH32V30X_IT_H +#define CH32V30X_IT_H +#endif \ No newline at end of file diff --git a/src/ch32v30x_it.c b/src/ch32v30x_it.c index 8ffbce2..c6fdf83 100644 --- a/src/ch32v30x_it.c +++ b/src/ch32v30x_it.c @@ -1,40 +1,342 @@ -/********************************** (C) COPYRIGHT ******************************* -* File Name : ch32v30x_it.c -* Author : WCH -* Version : V1.0.0 -* Date : 2021/06/06 -* Description : Main Interrupt Service Routines. -* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. -* SPDX-License-Identifier: Apache-2.0 -*******************************************************************************/ #include "ch32v30x_it.h" -void NMI_Handler(void) __attribute__((interrupt())); -void HardFault_Handler(void) __attribute__((interrupt())); +#define __IRQ __attribute__((interrupt())) +#define __IRQ_WEAK __attribute__((interrupt(), weak)) +#define __IRQ_NAKED __attribute__((naked)) -/********************************************************************* - * @fn NMI_Handler - * - * @brief This function handles NMI exception. - * - * @return none + +/** + * FreeRTOS supports both non-vectored and vectored exception model. + * For non-vectored exception, use `freertos_risc_v_trap_handler`, + * this function will determine the type of current exception. + * For vectored exception, use `freertos_risc_v_exception_handler`, + * and use `freertos_risc_v_mtimer_interrupt_handler` for timer interrupt. + * */ -void NMI_Handler(void) -{ + +/** + * @brief Default Handler for exceptions and interrupts + * + */ +__IRQ_WEAK void Default_Handler(void) { + for(;;) { + /* Where are you from? */ + } } -/********************************************************************* - * @fn HardFault_Handler - * - * @brief This function handles Hard Fault exception. - * - * @return none +/** + * @brief Fault handler + * */ -void HardFault_Handler(void) -{ - while (1) - { - } +__IRQ_WEAK void Fault_Handler(void) { + for(;;) { + /* Emmmmmmmmm? */ + } } +/** + * @brief U mode ecall handler + * + */ +__IRQ_WEAK void Ecall_U_Handler(void) { + for(;;) { + /* Who called me? */ + } +} +/** + * @brief M mode ecall handler + * + */ +__IRQ_WEAK void Ecall_M_Handler(void) { + /* M mode ecall handler */ +} + +/** + * @brief Non-maskable interrupt handler + * + */ +__IRQ_WEAK void NMI_Handler(void) { + /* NMI handler */ +} + +/** + * @brief SysTick interrupt handler + * + */ +__IRQ_WEAK void SysTick_Handler(void) { + /* SysTick handler */ +} + +/** + * @brief Software interrupt handler + * + */ +__IRQ_WEAK void SW_Handler(void) { + /* Software handler */ +} + +__IRQ_WEAK void WWDG_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void PVD_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void TAMPER_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void RTC_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void FLASH_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void RCC_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void EXTI0_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void EXTI1_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void EXTI2_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void EXTI3_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void EXTI4_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void DMA1_Channel1_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void DMA1_Channel2_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void DMA1_Channel3_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void DMA1_Channel4_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void DMA1_Channel5_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void DMA1_Channel6_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void DMA1_Channel7_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void ADC1_2_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void USB_HP_CAN1_TX_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void USB_LP_CAN1_RX0_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void CAN1_RX1_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void CAN1_SCE_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void EXTI9_5_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void TIM1_BRK_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void TIM1_UP_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void TIM1_TRG_COM_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void TIM1_CC_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void TIM2_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void TIM3_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void TIM4_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void I2C1_EV_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void I2C1_ER_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void I2C2_EV_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void I2C2_ER_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void SPI1_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void SPI2_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void USART1_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void USART2_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void USART3_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void EXTI15_10_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void RTCAlarm_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void USBWakeUp_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void TIM8_BRK_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void TIM8_UP_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void TIM8_TRG_COM_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void TIM8_CC_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void RNG_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void FSMC_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void SDIO_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void TIM5_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void SPI3_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void UART4_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void UART5_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void TIM6_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void TIM7_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void DMA2_Channel1_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void DMA2_Channel2_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void DMA2_Channel3_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void DMA2_Channel4_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void DMA2_Channel5_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void ETH_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void ETH_WKUP_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void CAN2_TX_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void CAN2_RX0_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void CAN2_RX1_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void CAN2_SCE_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void OTG_FS_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void USBHSWakeup_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void USBHS_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void DVP_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void UART6_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void UART7_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void UART8_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void TIM9_BRK_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void TIM9_UP_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void TIM9_TRG_COM_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void TIM9_CC_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void TIM10_BRK_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void TIM10_UP_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void TIM10_TRG_COM_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void TIM10_CC_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void DMA2_Channel6_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void DMA2_Channel7_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void DMA2_Channel8_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void DMA2_Channel9_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void DMA2_Channel10_IRQHandler(void) { + /**/ +} +__IRQ_WEAK void DMA2_Channel11_IRQHandler(void) { + /**/ +} \ No newline at end of file diff --git a/src/syscalls.c b/src/syscalls.c index 21a0fdc..535dec0 100644 --- a/src/syscalls.c +++ b/src/syscalls.c @@ -1,5 +1,22 @@ #include +void *_sbrk(ptrdiff_t incr) { + extern char _end[]; + extern char _heap_end[]; + static char *curbrk = _end; + + void *ret; + + if ((curbrk + incr < _end) || (curbrk + incr > _heap_end)) + return NULL - 1; + + curbrk += incr; + ret = curbrk - incr; + + return ret; +} + + int _fstat(int file, struct stat *st) { st->st_mode = S_IFCHR;