555 lines
13 KiB
C
555 lines
13 KiB
C
/********************************** (C) COPYRIGHT *******************************
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* File Name : core_riscv.c
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* Author : WCH
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* Version : V1.0.0
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* Date : 2021/06/06
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* Description : RISC-V Core Peripheral Access Layer Source File
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* SPDX-License-Identifier: Apache-2.0
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*******************************************************************************/
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#include <stdint.h>
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/* define compiler specific symbols */
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#if defined ( __CC_ARM )
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#define __ASM __asm /*!< asm keyword for ARM Compiler */
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#define __INLINE __inline /*!< inline keyword for ARM Compiler */
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#elif defined ( __ICCARM__ )
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#define __ASM __asm /*!< asm keyword for IAR Compiler */
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#define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
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#elif defined ( __GNUC__ )
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#define __ASM __asm /*!< asm keyword for GNU Compiler */
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#define __INLINE inline /*!< inline keyword for GNU Compiler */
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#elif defined ( __TASKING__ )
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#define __ASM __asm /*!< asm keyword for TASKING Compiler */
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#define __INLINE inline /*!< inline keyword for TASKING Compiler */
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#endif
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/*********************************************************************
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* @fn __get_FFLAGS
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*
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* @brief Return the Floating-Point Accrued Exceptions
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*
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* @return fflags value
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*/
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uint32_t __get_FFLAGS(void)
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{
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uint32_t result;
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__ASM volatile ( "csrr %0," "fflags" : "=r" (result) );
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return (result);
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}
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/*********************************************************************
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* @fn __set_FFLAGS
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*
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* @brief Set the Floating-Point Accrued Exceptions
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*
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* @param value - set FFLAGS value
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*
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* @return none
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*/
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void __set_FFLAGS(uint32_t value)
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{
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__ASM volatile ("csrw fflags, %0" : : "r" (value) );
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}
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/*********************************************************************
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* @fn __get_FRM
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*
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* @brief Return the Floating-Point Dynamic Rounding Mode
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*
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* @return frm value
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*/
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uint32_t __get_FRM(void)
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{
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uint32_t result;
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__ASM volatile ( "csrr %0," "frm" : "=r" (result) );
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return (result);
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}
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/*********************************************************************
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* @fn __set_FRM
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*
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* @brief Set the Floating-Point Dynamic Rounding Mode
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*
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* @param value - set frm value
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*
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* @return none
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*/
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void __set_FRM(uint32_t value)
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{
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__ASM volatile ("csrw frm, %0" : : "r" (value) );
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}
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/*********************************************************************
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* @fn __get_FCSR
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*
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* @brief Return the Floating-Point Control and Status Register
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*
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* @return fcsr value
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*/
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uint32_t __get_FCSR(void)
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{
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uint32_t result;
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__ASM volatile ( "csrr %0," "fcsr" : "=r" (result) );
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return (result);
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}
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/*********************************************************************
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* @fn __set_FCSR
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*
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* @brief Set the Floating-Point Dynamic Rounding Mode
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*
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* @param value - set fcsr value
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*
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* @return none
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*/
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void __set_FCSR(uint32_t value)
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{
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__ASM volatile ("csrw fcsr, %0" : : "r" (value) );
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}
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/*********************************************************************
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* @fn __get_MSTATUS
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*
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* @brief Return the Machine Status Register
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*
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* @return mstatus value
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*/
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uint32_t __get_MSTATUS(void)
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{
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uint32_t result;
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__ASM volatile ( "csrr %0," "mstatus" : "=r" (result) );
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return (result);
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}
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/*********************************************************************
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* @fn __set_MSTATUS
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*
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* @brief Set the Machine Status Register
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*
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* @param value - set mstatus value
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*
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* @return none
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*/
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void __set_MSTATUS(uint32_t value)
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{
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__ASM volatile ("csrw mstatus, %0" : : "r" (value) );
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}
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/*********************************************************************
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* @fn __get_MISA
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*
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* @brief Return the Machine ISA Register
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*
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* @return misa value
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*/
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uint32_t __get_MISA(void)
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{
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uint32_t result;
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__ASM volatile ( "csrr %0," "misa" : "=r" (result) );
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return (result);
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}
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/*********************************************************************
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* @fn __set_MISA
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*
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* @brief Set the Machine ISA Register
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*
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* @param value - set misa value
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*
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* @return none
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*/
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void __set_MISA(uint32_t value)
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{
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__ASM volatile ("csrw misa, %0" : : "r" (value) );
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}
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/*********************************************************************
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* @fn __get_MIE
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*
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* @brief Return the Machine Interrupt Enable Register
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*
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* @return mie value
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*/
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uint32_t __get_MIE(void)
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{
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uint32_t result;
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__ASM volatile ( "csrr %0," "mie" : "=r" (result) );
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return (result);
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}
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/*********************************************************************
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* @fn __set_MISA
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*
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* @brief Set the Machine ISA Register
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*
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* @param value - set mie value
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*
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* @return none
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*/
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void __set_MIE(uint32_t value)
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{
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__ASM volatile ("csrw mie, %0" : : "r" (value) );
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}
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/*********************************************************************
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* @fn __get_MTVEC
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*
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* @brief Return the Machine Trap-Vector Base-Address Register
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*
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* @return mtvec value
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*/
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uint32_t __get_MTVEC(void)
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{
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uint32_t result;
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__ASM volatile ( "csrr %0," "mtvec" : "=r" (result) );
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return (result);
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}
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/*********************************************************************
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* @fn __set_MTVEC
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*
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* @brief Set the Machine Trap-Vector Base-Address Register
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*
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* @param value - set mtvec value
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*
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* @return none
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*/
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void __set_MTVEC(uint32_t value)
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{
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__ASM volatile ("csrw mtvec, %0" : : "r" (value) );
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}
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/*********************************************************************
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* @fn __get_MTVEC
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*
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* @brief Return the Machine Seratch Register
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*
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* @return mscratch value
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*/
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uint32_t __get_MSCRATCH(void)
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{
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uint32_t result;
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__ASM volatile ( "csrr %0," "mscratch" : "=r" (result) );
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return (result);
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}
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/*********************************************************************
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* @fn __set_MTVEC
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*
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* @brief Set the Machine Seratch Register
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*
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* @param value - set mscratch value
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*
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* @return none
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*/
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void __set_MSCRATCH(uint32_t value)
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{
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__ASM volatile ("csrw mscratch, %0" : : "r" (value) );
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}
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/*********************************************************************
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* @fn __get_MEPC
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*
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* @brief Return the Machine Exception Program Register
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*
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* @return mepc value
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*/
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uint32_t __get_MEPC(void)
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{
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uint32_t result;
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__ASM volatile ( "csrr %0," "mepc" : "=r" (result) );
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return (result);
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}
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/*********************************************************************
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* @fn __set_MEPC
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*
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* @brief Set the Machine Exception Program Register
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*
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* @return mepc value
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*/
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void __set_MEPC(uint32_t value)
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{
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__ASM volatile ("csrw mepc, %0" : : "r" (value) );
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}
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/*********************************************************************
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* @fn __get_MCAUSE
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*
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* @brief Return the Machine Cause Register
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*
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* @return mcause value
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*/
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uint32_t __get_MCAUSE(void)
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{
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uint32_t result;
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__ASM volatile ( "csrr %0," "mcause" : "=r" (result) );
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return (result);
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}
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/*********************************************************************
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* @fn __set_MEPC
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*
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* @brief Set the Machine Cause Register
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*
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* @return mcause value
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*/
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void __set_MCAUSE(uint32_t value)
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{
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__ASM volatile ("csrw mcause, %0" : : "r" (value) );
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}
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/*********************************************************************
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* @fn __get_MTVAL
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*
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* @brief Return the Machine Trap Value Register
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*
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* @return mtval value
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*/
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uint32_t __get_MTVAL(void)
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{
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uint32_t result;
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__ASM volatile ( "csrr %0," "mtval" : "=r" (result) );
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return (result);
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}
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/*********************************************************************
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* @fn __set_MTVAL
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*
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* @brief Set the Machine Trap Value Register
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*
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* @return mtval value
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*/
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void __set_MTVAL(uint32_t value)
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{
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__ASM volatile ("csrw mtval, %0" : : "r" (value) );
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}
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/*********************************************************************
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* @fn __get_MIP
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*
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* @brief Return the Machine Interrupt Pending Register
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*
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* @return mip value
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*/
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uint32_t __get_MIP(void)
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{
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uint32_t result;
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__ASM volatile ( "csrr %0," "mip" : "=r" (result) );
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return (result);
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}
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/*********************************************************************
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* @fn __set_MIP
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*
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* @brief Set the Machine Interrupt Pending Register
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*
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* @return mip value
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*/
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void __set_MIP(uint32_t value)
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{
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__ASM volatile ("csrw mip, %0" : : "r" (value) );
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}
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/*********************************************************************
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* @fn __get_MCYCLE
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*
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* @brief Return Lower 32 bits of Cycle counter
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*
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* @return mcycle value
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*/
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uint32_t __get_MCYCLE(void)
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{
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uint32_t result;
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__ASM volatile ( "csrr %0," "mcycle" : "=r" (result) );
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return (result);
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}
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/*********************************************************************
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* @fn __set_MCYCLE
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*
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* @brief Set Lower 32 bits of Cycle counter
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*
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* @return mcycle value
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*/
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void __set_MCYCLE(uint32_t value)
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{
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__ASM volatile ("csrw mcycle, %0" : : "r" (value) );
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}
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/*********************************************************************
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* @fn __get_MCYCLEH
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*
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* @brief Return Upper 32 bits of Cycle counter
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*
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* @return mcycleh value
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*/
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uint32_t __get_MCYCLEH(void)
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{
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uint32_t result;
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__ASM volatile ( "csrr %0," "mcycleh" : "=r" (result) );
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return (result);
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}
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/*********************************************************************
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* @fn __set_MCYCLEH
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*
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* @brief Set Upper 32 bits of Cycle counter
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*
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* @return mcycleh value
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*/
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void __set_MCYCLEH(uint32_t value)
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{
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__ASM volatile ("csrw mcycleh, %0" : : "r" (value) );
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}
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/*********************************************************************
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* @fn __get_MINSTRET
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*
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* @brief Return Lower 32 bits of Instructions-retired counter
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*
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* @return mcause value
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*/
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uint32_t __get_MINSTRET(void)
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{
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uint32_t result;
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__ASM volatile ( "csrr %0," "minstret" : "=r" (result) );
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return (result);
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}
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/*********************************************************************
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* @fn __set_MINSTRET
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*
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* @brief Set Lower 32 bits of Instructions-retired counter
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*
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* @return minstret value
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*/
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void __set_MINSTRET(uint32_t value)
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{
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__ASM volatile ("csrw minstret, %0" : : "r" (value) );
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}
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/*********************************************************************
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* @fn __get_MINSTRETH
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*
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* @brief Return Upper 32 bits of Instructions-retired counter
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*
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* @return minstreth value
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*/
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uint32_t __get_MINSTRETH(void)
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{
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uint32_t result;
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__ASM volatile ( "csrr %0," "minstreth" : "=r" (result) );
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return (result);
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}
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/*********************************************************************
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* @fn __set_MINSTRETH
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*
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* @brief Set Upper 32 bits of Instructions-retired counter
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*
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* @return minstreth value
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*/
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void __set_MINSTRETH(uint32_t value)
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{
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__ASM volatile ("csrw minstreth, %0" : : "r" (value) );
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}
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/*********************************************************************
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* @fn __get_MVENDORID
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*
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* @brief Return Vendor ID Register
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*
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* @return mvendorid value
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*/
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uint32_t __get_MVENDORID(void)
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{
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uint32_t result;
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__ASM volatile ( "csrr %0," "mvendorid" : "=r" (result) );
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return (result);
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}
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/*********************************************************************
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* @fn __get_MARCHID
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*
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* @brief Return Machine Architecture ID Register
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*
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* @return marchid value
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*/
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uint32_t __get_MARCHID(void)
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{
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uint32_t result;
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__ASM volatile ( "csrr %0," "marchid" : "=r" (result) );
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return (result);
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}
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/*********************************************************************
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* @fn __get_MIMPID
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*
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* @brief Return Machine Implementation ID Register
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*
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* @return mimpid value
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*/
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uint32_t __get_MIMPID(void)
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{
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uint32_t result;
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__ASM volatile ( "csrr %0," "mimpid" : "=r" (result) );
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return (result);
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}
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/*********************************************************************
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* @fn __get_MHARTID
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*
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* @brief Return Hart ID Register
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*
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* @return mhartid value
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*/
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uint32_t __get_MHARTID(void)
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{
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uint32_t result;
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__ASM volatile ( "csrr %0," "mhartid" : "=r" (result) );
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return (result);
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}
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/*********************************************************************
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* @fn __get_SP
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*
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* @brief Return SP Register
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*
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* @return SP value
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*/
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uint32_t __get_SP(void)
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{
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uint32_t result;
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asm volatile ( "mv %0," "sp" : "=r"(result) : );
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return (result);
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}
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