647 lines
20 KiB
C
647 lines
20 KiB
C
/********************************** (C) COPYRIGHT *******************************
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* File Name : ch32v30x_spi.c
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* Author : WCH
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* Version : V1.0.0
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* Date : 2021/06/06
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* Description : This file provides all the SPI firmware functions.
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* SPDX-License-Identifier: Apache-2.0
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*********************************************************************************/
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#include "ch32v30x_spi.h"
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#include "ch32v30x_rcc.h"
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/* SPI SPE mask */
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#define CTLR1_SPE_Set ((uint16_t)0x0040)
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#define CTLR1_SPE_Reset ((uint16_t)0xFFBF)
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/* I2S I2SE mask */
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#define I2SCFGR_I2SE_Set ((uint16_t)0x0400)
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#define I2SCFGR_I2SE_Reset ((uint16_t)0xFBFF)
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/* SPI CRCNext mask */
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#define CTLR1_CRCNext_Set ((uint16_t)0x1000)
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/* SPI CRCEN mask */
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#define CTLR1_CRCEN_Set ((uint16_t)0x2000)
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#define CTLR1_CRCEN_Reset ((uint16_t)0xDFFF)
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/* SPI SSOE mask */
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#define CTLR2_SSOE_Set ((uint16_t)0x0004)
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#define CTLR2_SSOE_Reset ((uint16_t)0xFFFB)
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/* SPI registers Masks */
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#define CTLR1_CLEAR_Mask ((uint16_t)0x3040)
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#define I2SCFGR_CLEAR_Mask ((uint16_t)0xF040)
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/* SPI or I2S mode selection masks */
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#define SPI_Mode_Select ((uint16_t)0xF7FF)
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#define I2S_Mode_Select ((uint16_t)0x0800)
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/* I2S clock source selection masks */
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#define I2S2_CLOCK_SRC ((uint32_t)(0x00020000))
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#define I2S3_CLOCK_SRC ((uint32_t)(0x00040000))
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#define I2S_MUL_MASK ((uint32_t)(0x0000F000))
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#define I2S_DIV_MASK ((uint32_t)(0x000000F0))
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/*********************************************************************
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* @fn SPI_I2S_DeInit
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*
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* @brief Deinitializes the SPIx peripheral registers to their default
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* reset values (Affects also the I2Ss).
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* @param SPIx - where x can be 1, 2 or 3 to select the SPI peripheral.
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*
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* @return none
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*/
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void SPI_I2S_DeInit(SPI_TypeDef *SPIx)
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{
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if(SPIx == SPI1)
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{
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE);
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}
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else if(SPIx == SPI2)
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{
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE);
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE);
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}
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else
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{
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if(SPIx == SPI3)
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{
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE);
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, DISABLE);
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}
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}
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}
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/*********************************************************************
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* @fn SPI_Init
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*
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* @brief Initializes the SPIx peripheral according to the specified
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* parameters in the SPI_InitStruct.
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*
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* @param SPIx - where x can be 1, 2 or 3 to select the SPI peripheral.
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* SPI_InitStruct - pointer to a SPI_InitTypeDef structure that
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* contains the configuration information for the specified SPI peripheral.
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*
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* @return none
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*/
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void SPI_Init(SPI_TypeDef *SPIx, SPI_InitTypeDef *SPI_InitStruct)
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{
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uint16_t tmpreg = 0;
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tmpreg = SPIx->CTLR1;
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tmpreg &= CTLR1_CLEAR_Mask;
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tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode |
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SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL |
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SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS |
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SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit);
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SPIx->CTLR1 = tmpreg;
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SPIx->I2SCFGR &= SPI_Mode_Select;
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SPIx->CRCR = SPI_InitStruct->SPI_CRCPolynomial;
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}
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/*********************************************************************
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* @fn I2S_Init
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*
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* @brief Initializes the SPIx peripheral according to the specified
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* parameters in the I2S_InitStruct.
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* @param SPIx - where x can be 1, 2 or 3 to select the SPI peripheral.
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* (configured in I2S mode).
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* I2S_InitStruct - pointer to an I2S_InitTypeDef structure that
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* contains the configuration information for the specified SPI peripheral
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* configured in I2S mode.
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* @return none
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*/
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void I2S_Init(SPI_TypeDef *SPIx, I2S_InitTypeDef *I2S_InitStruct)
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{
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uint16_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1;
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uint32_t tmp = 0;
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RCC_ClocksTypeDef RCC_Clocks;
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uint32_t sourceclock = 0;
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SPIx->I2SCFGR &= I2SCFGR_CLEAR_Mask;
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SPIx->I2SPR = 0x0002;
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tmpreg = SPIx->I2SCFGR;
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if(I2S_InitStruct->I2S_AudioFreq == I2S_AudioFreq_Default)
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{
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i2sodd = (uint16_t)0;
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i2sdiv = (uint16_t)2;
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}
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else
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{
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if(I2S_InitStruct->I2S_DataFormat == I2S_DataFormat_16b)
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{
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packetlength = 1;
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}
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else
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{
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packetlength = 2;
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}
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if(((uint32_t)SPIx) == SPI2_BASE)
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{
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tmp = I2S2_CLOCK_SRC;
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}
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else
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{
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tmp = I2S3_CLOCK_SRC;
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}
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RCC_GetClocksFreq(&RCC_Clocks);
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sourceclock = RCC_Clocks.SYSCLK_Frequency;
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if(I2S_InitStruct->I2S_MCLKOutput == I2S_MCLKOutput_Enable)
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{
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tmp = (uint16_t)(((((sourceclock / 256) * 10) / I2S_InitStruct->I2S_AudioFreq)) + 5);
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}
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else
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{
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tmp = (uint16_t)(((((sourceclock / (32 * packetlength)) * 10) / I2S_InitStruct->I2S_AudioFreq)) + 5);
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}
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tmp = tmp / 10;
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i2sodd = (uint16_t)(tmp & (uint16_t)0x0001);
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i2sdiv = (uint16_t)((tmp - i2sodd) / 2);
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i2sodd = (uint16_t)(i2sodd << 8);
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}
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if((i2sdiv < 2) || (i2sdiv > 0xFF))
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{
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i2sdiv = 2;
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i2sodd = 0;
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}
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SPIx->I2SPR = (uint16_t)(i2sdiv | (uint16_t)(i2sodd | (uint16_t)I2S_InitStruct->I2S_MCLKOutput));
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tmpreg |= (uint16_t)(I2S_Mode_Select | (uint16_t)(I2S_InitStruct->I2S_Mode |
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(uint16_t)(I2S_InitStruct->I2S_Standard | (uint16_t)(I2S_InitStruct->I2S_DataFormat |
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(uint16_t)I2S_InitStruct->I2S_CPOL))));
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SPIx->I2SCFGR = tmpreg;
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}
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/*********************************************************************
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* @fn SPI_StructInit
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*
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* @brief Fills each SPI_InitStruct member with its default value.
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*
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* @param SPI_InitStruct - pointer to a SPI_InitTypeDef structure which
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* will be initialized.
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*
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* @return none
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*/
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void SPI_StructInit(SPI_InitTypeDef *SPI_InitStruct)
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{
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SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex;
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SPI_InitStruct->SPI_Mode = SPI_Mode_Slave;
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SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b;
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SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low;
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SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge;
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SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
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SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB;
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SPI_InitStruct->SPI_CRCPolynomial = 7;
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}
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/*********************************************************************
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* @fn I2S_StructInit
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*
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* @brief Fills each I2S_InitStruct member with its default value.
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*
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* @param I2S_InitStruct - pointer to a I2S_InitTypeDef structure which
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* will be initialized.
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*
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* @return none
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*/
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void I2S_StructInit(I2S_InitTypeDef *I2S_InitStruct)
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{
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I2S_InitStruct->I2S_Mode = I2S_Mode_SlaveTx;
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I2S_InitStruct->I2S_Standard = I2S_Standard_Phillips;
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I2S_InitStruct->I2S_DataFormat = I2S_DataFormat_16b;
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I2S_InitStruct->I2S_MCLKOutput = I2S_MCLKOutput_Disable;
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I2S_InitStruct->I2S_AudioFreq = I2S_AudioFreq_Default;
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I2S_InitStruct->I2S_CPOL = I2S_CPOL_Low;
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}
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/*********************************************************************
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* @fn SPI_Cmd
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*
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* @brief Enables or disables the specified SPI peripheral.
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*
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* @param SPIx - where x can be 1, 2 or 3 to select the SPI peripheral.
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* NewState - ENABLE or DISABLE.
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*
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* @return none
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*/
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void SPI_Cmd(SPI_TypeDef *SPIx, FunctionalState NewState)
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{
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if(NewState != DISABLE)
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{
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SPIx->CTLR1 |= CTLR1_SPE_Set;
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}
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else
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{
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SPIx->CTLR1 &= CTLR1_SPE_Reset;
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}
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}
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/*********************************************************************
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* @fn I2S_Cmd
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*
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* @brief Enables or disables the specified SPI peripheral (in I2S mode).
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*
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* @param SPIx - where x can be 1, 2 or 3 to select the SPI peripheral.
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* NewState - ENABLE or DISABLE.
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*
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* @return none
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*/
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void I2S_Cmd(SPI_TypeDef *SPIx, FunctionalState NewState)
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{
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if(NewState != DISABLE)
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{
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SPIx->I2SCFGR |= I2SCFGR_I2SE_Set;
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}
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else
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{
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SPIx->I2SCFGR &= I2SCFGR_I2SE_Reset;
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}
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}
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/*********************************************************************
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* @fn SPI_I2S_ITConfig
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*
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* @brief Enables or disables the specified SPI/I2S interrupts.
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*
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* @param SPIx - where x can be
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* - 1, 2 or 3 in SPI mode.
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* - 2 or 3 in I2S mode.
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* SPI_I2S_IT - specifies the SPI/I2S interrupt source to be
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* enabled or disabled.
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* SPI_I2S_IT_TXE - Tx buffer empty interrupt mask.
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* SPI_I2S_IT_RXNE - Rx buffer not empty interrupt mask.
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* SPI_I2S_IT_ERR - Error interrupt mask.
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* NewState: ENABLE or DISABLE.
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* @return none
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*/
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void SPI_I2S_ITConfig(SPI_TypeDef *SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState)
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{
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uint16_t itpos = 0, itmask = 0;
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itpos = SPI_I2S_IT >> 4;
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itmask = (uint16_t)1 << (uint16_t)itpos;
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if(NewState != DISABLE)
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{
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SPIx->CTLR2 |= itmask;
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}
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else
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{
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SPIx->CTLR2 &= (uint16_t)~itmask;
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}
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}
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/*********************************************************************
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* @fn SPI_I2S_DMACmd
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*
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* @brief Enables or disables the SPIx/I2Sx DMA interface.
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*
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* @param SPIx - where x can be
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* - 1, 2 or 3 in SPI mode.
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* - 2 or 3 in I2S mode.
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* SPI_I2S_DMAReq - specifies the SPI/I2S DMA transfer request to
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* be enabled or disabled.
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* SPI_I2S_DMAReq_Tx - Tx buffer DMA transfer request.
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* SPI_I2S_DMAReq_Rx - Rx buffer DMA transfer request.
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* NewState - ENABLE or DISABLE.
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*
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* @return none
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*/
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void SPI_I2S_DMACmd(SPI_TypeDef *SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState)
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{
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if(NewState != DISABLE)
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{
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SPIx->CTLR2 |= SPI_I2S_DMAReq;
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}
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else
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{
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SPIx->CTLR2 &= (uint16_t)~SPI_I2S_DMAReq;
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}
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}
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/*********************************************************************
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* @fn SPI_I2S_SendData
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*
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* @brief Transmits a Data through the SPIx/I2Sx peripheral.
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*
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* @param SPIx - where x can be
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* - 1, 2 or 3 in SPI mode.
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* - 2 or 3 in I2S mode.
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* Data - Data to be transmitted.
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*
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* @return none
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*/
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void SPI_I2S_SendData(SPI_TypeDef *SPIx, uint16_t Data)
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{
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SPIx->DATAR = Data;
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}
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/*********************************************************************
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* @fn SPI_I2S_ReceiveData
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*
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* @brief Returns the most recent received data by the SPIx/I2Sx peripheral.
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*
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* @param SPIx - where x can be
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* - 1, 2 or 3 in SPI mode.
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* - 2 or 3 in I2S mode.
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* Data - Data to be transmitted.
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*
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* @return SPIx->DATAR - The value of the received data.
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*/
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uint16_t SPI_I2S_ReceiveData(SPI_TypeDef *SPIx)
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{
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return SPIx->DATAR;
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}
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/*********************************************************************
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* @fn SPI_NSSInternalSoftwareConfig
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*
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* @brief Configures internally by software the NSS pin for the selected SPI.
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*
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* @param SPIx - where x can be 1, 2 or 3 to select the SPI peripheral.
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* SPI_NSSInternalSoft -
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* SPI_NSSInternalSoft_Set - Set NSS pin internally.
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* SPI_NSSInternalSoft_Reset - Reset NSS pin internally.
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*
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* @return none
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*/
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void SPI_NSSInternalSoftwareConfig(SPI_TypeDef *SPIx, uint16_t SPI_NSSInternalSoft)
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{
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if(SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset)
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{
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SPIx->CTLR1 |= SPI_NSSInternalSoft_Set;
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}
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else
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{
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SPIx->CTLR1 &= SPI_NSSInternalSoft_Reset;
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}
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}
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/*********************************************************************
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* @fn SPI_SSOutputCmd
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*
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* @brief Enables or disables the SS output for the selected SPI.
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*
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* @param SPIx - where x can be 1, 2 or 3 to select the SPI peripheral.
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* NewState - new state of the SPIx SS output.
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*
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* @return none
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*/
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void SPI_SSOutputCmd(SPI_TypeDef *SPIx, FunctionalState NewState)
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{
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if(NewState != DISABLE)
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{
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SPIx->CTLR2 |= CTLR2_SSOE_Set;
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}
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else
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{
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SPIx->CTLR2 &= CTLR2_SSOE_Reset;
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}
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}
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/*********************************************************************
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* @fn SPI_DataSizeConfig
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*
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* @brief Configures the data size for the selected SPI.
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*
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* @param SPIx - where x can be 1, 2 or 3 to select the SPI peripheral.
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* SPI_DataSize - specifies the SPI data size.
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* SPI_DataSize_16b - Set data frame format to 16bit.
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* SPI_DataSize_8b - Set data frame format to 8bit.
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*
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* @return none
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*/
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void SPI_DataSizeConfig(SPI_TypeDef *SPIx, uint16_t SPI_DataSize)
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{
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SPIx->CTLR1 &= (uint16_t)~SPI_DataSize_16b;
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SPIx->CTLR1 |= SPI_DataSize;
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}
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/*********************************************************************
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* @fn SPI_TransmitCRC
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*
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* @brief Transmit the SPIx CRC value.
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*
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* @param SPIx - where x can be 1, 2 or 3 to select the SPI peripheral.
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*
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* @return none
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*/
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void SPI_TransmitCRC(SPI_TypeDef *SPIx)
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{
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SPIx->CTLR1 |= CTLR1_CRCNext_Set;
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}
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/*********************************************************************
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* @fn SPI_CalculateCRC
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*
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* @brief Enables or disables the CRC value calculation of the transferred bytes.
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*
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* @param SPIx - where x can be 1, 2 or 3 to select the SPI peripheral.
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* NewState - new state of the SPIx CRC value calculation.
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*
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* @return none
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*/
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void SPI_CalculateCRC(SPI_TypeDef *SPIx, FunctionalState NewState)
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{
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if(NewState != DISABLE)
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{
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SPIx->CTLR1 |= CTLR1_CRCEN_Set;
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}
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else
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{
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SPIx->CTLR1 &= CTLR1_CRCEN_Reset;
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}
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}
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/*********************************************************************
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* @fn SPI_GetCRC
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*
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* @brief Returns the transmit or the receive CRC register value for the specified SPI.
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*
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* @param SPIx - where x can be 1, 2 or 3 to select the SPI peripheral.
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* SPI_CRC - specifies the CRC register to be read.
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* SPI_CRC_Tx - Selects Tx CRC register.
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* SPI_CRC_Rx - Selects Rx CRC register.
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*
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* @return crcreg: The selected CRC register value.
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*/
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uint16_t SPI_GetCRC(SPI_TypeDef *SPIx, uint8_t SPI_CRC)
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{
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uint16_t crcreg = 0;
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if(SPI_CRC != SPI_CRC_Rx)
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{
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crcreg = SPIx->TCRCR;
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}
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else
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{
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crcreg = SPIx->RCRCR;
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}
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return crcreg;
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}
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/*********************************************************************
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* @fn SPI_GetCRCPolynomial
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*
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* @brief Returns the CRC Polynomial register value for the specified SPI.
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*
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* @param SPIx - where x can be 1, 2 or 3 to select the SPI peripheral.
|
|
*
|
|
* @return SPIx->CRCR - The CRC Polynomial register value.
|
|
*/
|
|
uint16_t SPI_GetCRCPolynomial(SPI_TypeDef *SPIx)
|
|
{
|
|
return SPIx->CRCR;
|
|
}
|
|
|
|
/*********************************************************************
|
|
* @fn SPI_BiDirectionalLineConfig
|
|
*
|
|
* @brief Selects the data transfer direction in bi-directional mode
|
|
* for the specified SPI.
|
|
*
|
|
* @param SPIx - where x can be 1, 2 or 3 to select the SPI peripheral.
|
|
* SPI_Direction - specifies the data transfer direction in
|
|
* bi-directional mode.
|
|
* SPI_Direction_Tx - Selects Tx transmission direction.
|
|
* SPI_Direction_Rx - Selects Rx receive direction.
|
|
*
|
|
* @return none
|
|
*/
|
|
void SPI_BiDirectionalLineConfig(SPI_TypeDef *SPIx, uint16_t SPI_Direction)
|
|
{
|
|
if(SPI_Direction == SPI_Direction_Tx)
|
|
{
|
|
SPIx->CTLR1 |= SPI_Direction_Tx;
|
|
}
|
|
else
|
|
{
|
|
SPIx->CTLR1 &= SPI_Direction_Rx;
|
|
}
|
|
}
|
|
|
|
/*********************************************************************
|
|
* @fn SPI_I2S_GetFlagStatus
|
|
*
|
|
* @brief Checks whether the specified SPI/I2S flag is set or not.
|
|
*
|
|
* @param SPIx - where x can be
|
|
* - 1, 2 or 3 in SPI mode.
|
|
* - 2 or 3 in I2S mode.
|
|
* SPI_I2S_FLAG - specifies the SPI/I2S flag to check.
|
|
* SPI_I2S_FLAG_TXE - Transmit buffer empty flag.
|
|
* SPI_I2S_FLAG_RXNE - Receive buffer not empty flag.
|
|
* SPI_I2S_FLAG_BSY - Busy flag.
|
|
* SPI_I2S_FLAG_OVR - Overrun flag.
|
|
* SPI_FLAG_MODF - Mode Fault flag.
|
|
* SPI_FLAG_CRCERR - CRC Error flag.
|
|
* I2S_FLAG_UDR - Underrun Error flag.
|
|
* I2S_FLAG_CHSIDE - Channel Side flag.
|
|
*
|
|
* @return none
|
|
*/
|
|
FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef *SPIx, uint16_t SPI_I2S_FLAG)
|
|
{
|
|
FlagStatus bitstatus = RESET;
|
|
|
|
if((SPIx->STATR & SPI_I2S_FLAG) != (uint16_t)RESET)
|
|
{
|
|
bitstatus = SET;
|
|
}
|
|
else
|
|
{
|
|
bitstatus = RESET;
|
|
}
|
|
|
|
return bitstatus;
|
|
}
|
|
|
|
/*********************************************************************
|
|
* @fn SPI_I2S_ClearFlag
|
|
*
|
|
* @brief Clears the SPIx CRC Error (CRCERR) flag.
|
|
*
|
|
* @param SPIx - where x can be
|
|
* - 1, 2 or 3 in SPI mode.
|
|
* - 2 or 3 in I2S mode.
|
|
* SPI_I2S_FLAG - specifies the SPI flag to clear.
|
|
* SPI_FLAG_CRCERR - CRC Error flag.
|
|
*
|
|
* @return none
|
|
*/
|
|
void SPI_I2S_ClearFlag(SPI_TypeDef *SPIx, uint16_t SPI_I2S_FLAG)
|
|
{
|
|
SPIx->STATR = (uint16_t)~SPI_I2S_FLAG;
|
|
}
|
|
|
|
/*********************************************************************
|
|
* @fn SPI_I2S_GetITStatus
|
|
*
|
|
* @brief Checks whether the specified SPI/I2S interrupt has occurred or not.
|
|
*
|
|
* @param SPIx - where x can be
|
|
* - 1, 2 or 3 in SPI mode.
|
|
* - 2 or 3 in I2S mode.
|
|
* SPI_I2S_IT - specifies the SPI/I2S interrupt source to check..
|
|
* SPI_I2S_IT_TXE - Transmit buffer empty interrupt.
|
|
* SPI_I2S_IT_RXNE - Receive buffer not empty interrupt.
|
|
* SPI_I2S_IT_OVR - Overrun interrupt.
|
|
* SPI_IT_MODF - Mode Fault interrupt.
|
|
* SPI_IT_CRCERR - CRC Error interrupt.
|
|
* I2S_IT_UDR - Underrun Error interrupt.
|
|
*
|
|
* @return FlagStatus: SET or RESET.
|
|
*/
|
|
ITStatus SPI_I2S_GetITStatus(SPI_TypeDef *SPIx, uint8_t SPI_I2S_IT)
|
|
{
|
|
ITStatus bitstatus = RESET;
|
|
uint16_t itpos = 0, itmask = 0, enablestatus = 0;
|
|
|
|
itpos = 0x01 << (SPI_I2S_IT & 0x0F);
|
|
itmask = SPI_I2S_IT >> 4;
|
|
itmask = 0x01 << itmask;
|
|
enablestatus = (SPIx->CTLR2 & itmask);
|
|
|
|
if(((SPIx->STATR & itpos) != (uint16_t)RESET) && enablestatus)
|
|
{
|
|
bitstatus = SET;
|
|
}
|
|
else
|
|
{
|
|
bitstatus = RESET;
|
|
}
|
|
|
|
return bitstatus;
|
|
}
|
|
|
|
/*********************************************************************
|
|
* @fn SPI_I2S_ClearITPendingBit
|
|
*
|
|
* @brief Clears the SPIx CRC Error (CRCERR) interrupt pending bit.
|
|
*
|
|
* @param SPIx - where x can be
|
|
* - 1, 2 or 3 in SPI mode.
|
|
* SPI_I2S_IT - specifies the SPI interrupt pending bit to clear.
|
|
* SPI_IT_CRCERR - CRC Error interrupt.
|
|
*
|
|
* @return none
|
|
*/
|
|
void SPI_I2S_ClearITPendingBit(SPI_TypeDef *SPIx, uint8_t SPI_I2S_IT)
|
|
{
|
|
uint16_t itpos = 0;
|
|
|
|
itpos = 0x01 << (SPI_I2S_IT & 0x0F);
|
|
SPIx->STATR = (uint16_t)~itpos;
|
|
}
|