From 1cc88f3d5ea5bdf67fb1c87a8e432b508c8b0d48 Mon Sep 17 00:00:00 2001
From: Embedded_Projects <>
Date: Sat, 14 Oct 2023 04:52:20 +0000
Subject: [PATCH] Initial commit

---
 .clang-format           |  12 ++
 .gitignore              |   5 +
 .gitmodules             |   3 +
 CMakeLists.txt          | 106 ++++++++++++++++++
 board/ch32x035_conf.h   |  39 +++++++
 board/ch32x035_it.c     |  37 ++++++
 board/ch32x035_it.h     |  20 ++++
 board/system_ch32x035.c | 241 ++++++++++++++++++++++++++++++++++++++++
 board/system_ch32x035.h |  32 ++++++
 include/.gitkeep        |   0
 riscv64-elf.cmake       |  17 +++
 src/main.c              |   4 +
 12 files changed, 516 insertions(+)
 create mode 100644 .clang-format
 create mode 100644 .gitignore
 create mode 100644 .gitmodules
 create mode 100644 CMakeLists.txt
 create mode 100644 board/ch32x035_conf.h
 create mode 100644 board/ch32x035_it.c
 create mode 100644 board/ch32x035_it.h
 create mode 100644 board/system_ch32x035.c
 create mode 100644 board/system_ch32x035.h
 create mode 100644 include/.gitkeep
 create mode 100644 riscv64-elf.cmake
 create mode 100644 src/main.c

diff --git a/.clang-format b/.clang-format
new file mode 100644
index 0000000..214adf0
--- /dev/null
+++ b/.clang-format
@@ -0,0 +1,12 @@
+BasedOnStyle: Google
+IndentWidth: 4
+AlignConsecutiveMacros: Consecutive
+AlignConsecutiveDeclarations: Consecutive
+AlignConsecutiveAssignments: Consecutive
+AllowShortFunctionsOnASingleLine: None
+BreakBeforeBraces: Custom
+BraceWrapping:
+  AfterEnum: false
+  AfterStruct: false
+  SplitEmptyFunction: false
+ColumnLimit: 120
\ No newline at end of file
diff --git a/.gitignore b/.gitignore
new file mode 100644
index 0000000..2da6168
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1,5 @@
+/cmake-build-*
+/build
+/board/*.bak
+/.vscode
+
diff --git a/.gitmodules b/.gitmodules
new file mode 100644
index 0000000..053ed03
--- /dev/null
+++ b/.gitmodules
@@ -0,0 +1,3 @@
+[submodule "SDK"]
+	path = SDK
+	url = https://git.minori.work/Embedded_SDK/WCH_CH32X035.git
diff --git a/CMakeLists.txt b/CMakeLists.txt
new file mode 100644
index 0000000..f118edb
--- /dev/null
+++ b/CMakeLists.txt
@@ -0,0 +1,106 @@
+cmake_minimum_required(VERSION 3.10)
+
+project(ch32x035_template)
+
+enable_language(CXX)
+enable_language(ASM)
+
+# Different linker scripts
+set(TARGET_LDSCRIPT_FLASH "${CMAKE_SOURCE_DIR}/SDK/Ld/Link.ld")
+
+set(TARGET_SOURCES
+    "SDK/Core/core_riscv.c"
+    "SDK/Debug/debug.c"
+    "SDK/Peripheral/src/ch32x035_adc.c"
+    "SDK/Peripheral/src/ch32x035_awu.c"
+    "SDK/Peripheral/src/ch32x035_dbgmcu.c"
+    "SDK/Peripheral/src/ch32x035_dma.c"
+    "SDK/Peripheral/src/ch32x035_exti.c"
+    "SDK/Peripheral/src/ch32x035_flash.c"
+    "SDK/Peripheral/src/ch32x035_gpio.c"
+    "SDK/Peripheral/src/ch32x035_i2c.c"
+    "SDK/Peripheral/src/ch32x035_iwdg.c"
+    "SDK/Peripheral/src/ch32x035_misc.c"
+    "SDK/Peripheral/src/ch32x035_opa.c"
+    "SDK/Peripheral/src/ch32x035_pwr.c"
+    "SDK/Peripheral/src/ch32x035_rcc.c"
+    "SDK/Peripheral/src/ch32x035_spi.c"
+    "SDK/Peripheral/src/ch32x035_tim.c"
+    "SDK/Peripheral/src/ch32x035_usart.c"
+    "SDK/Peripheral/src/ch32x035_wwdg.c"
+    "SDK/Startup/startup_ch32x035.S"
+    "board/ch32x035_it.c"
+    "board/system_ch32x035.c"
+    "src/main.c"
+)
+
+set(TARGET_C_DEFINES
+)
+
+set(TARGET_C_INCLUDES
+    "SDK/Core"
+    "SDK/Debug"
+    "SDK/Peripheral/inc"
+    "board"
+    "include"
+)
+
+# Shared libraries linked with application
+set(TARGET_LIBS
+    "c"
+    "m"
+    "nosys"
+)
+
+# Shared library and linker script search paths
+set(TARGET_LIB_DIRECTORIES
+)
+
+# Conditional flags
+# DEBUG
+set(CMAKE_C_FLAGS_DEBUG     "-DDEBUG -O0 -g")
+set(CMAKE_CXX_FLAGS_DEBUG   "-DDEBUG -O0 -g")
+set(CMAKE_ASM_FLAGS_DEBUG   "-DDEBUG -O0 -g")
+
+# RELEASE
+set(CMAKE_C_FLAGS_RELEASE        "-DNDEBUG -O2 -flto")
+set(CMAKE_CXX_FLAGS_RELEASE      "-DNDEBUG -O2 -flto")
+set(CMAKE_ASM_FLAGS_RELEASE      "-DNDEBUG -O2 -flto")
+set(CMAKE_EXE_LINKER_FLAGS_RELEASE "-flto")
+
+# Final compiler flags
+set(CMAKE_C_FLAGS          "${CMAKE_C_FLAGS} -Wall -fno-common -fno-builtin -ffreestanding -fdata-sections -ffunction-sections")
+set(CMAKE_CXX_FLAGS        "${CMAKE_CXX_FLAGS} -Wall -fno-common -fno-builtin -ffreestanding -fdata-sections -ffunction-sections")
+set(CMAKE_ASM_FLAGS        "${CMAKE_C_FLAGS} -x assembler-with-cpp")
+set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--gc-sections")
+
+# Shared sources, includes and definitions
+add_compile_definitions(${TARGET_C_DEFINES})
+include_directories(${TARGET_C_INCLUDES})
+link_directories(${TARGET_LIB_DIRECTORIES})
+link_libraries(${TARGET_LIBS})
+
+# Main targets are added here
+
+# Create ELF
+add_executable("${CMAKE_PROJECT_NAME}_FLASH.elf" ${TARGET_SOURCES})
+target_compile_definitions("${CMAKE_PROJECT_NAME}_FLASH.elf"
+    PRIVATE ${TARGET_C_DEFINES_XIP}
+    )
+target_link_options("${CMAKE_PROJECT_NAME}_FLASH.elf"
+    PRIVATE "-T${TARGET_LDSCRIPT_FLASH}"
+    PRIVATE "-Wl,--Map=${CMAKE_PROJECT_NAME}_FLASH.map"
+    )
+set_property(TARGET "${CMAKE_PROJECT_NAME}_FLASH.elf" APPEND
+    PROPERTY ADDITIONAL_CLEAN_FILES "${CMAKE_PROJECT_NAME}_FLASH.map"
+    )
+add_custom_command(OUTPUT "${CMAKE_PROJECT_NAME}_FLASH.hex"
+    COMMAND ${CMAKE_OBJCOPY} "-O" "ihex" "${CMAKE_PROJECT_NAME}_FLASH.elf" "${CMAKE_PROJECT_NAME}_FLASH.hex"
+    DEPENDS "${CMAKE_PROJECT_NAME}_FLASH.elf"
+    )
+add_custom_target("${CMAKE_PROJECT_NAME}_FLASH_HEX" DEPENDS "${CMAKE_PROJECT_NAME}_FLASH.hex")
+if(DEFINED TARGET_TOOLCHAIN_SIZE)
+    add_custom_command(TARGET "${CMAKE_PROJECT_NAME}_FLASH.elf" POST_BUILD
+        COMMAND ${TARGET_TOOLCHAIN_SIZE} "${CMAKE_PROJECT_NAME}_FLASH.elf"
+        )
+endif()
diff --git a/board/ch32x035_conf.h b/board/ch32x035_conf.h
new file mode 100644
index 0000000..0ee8ee5
--- /dev/null
+++ b/board/ch32x035_conf.h
@@ -0,0 +1,39 @@
+/********************************** (C) COPYRIGHT *******************************
+ * File Name          : ch32x035_conf.h
+ * Author             : WCH
+ * Version            : V1.0.0
+ * Date               : 2023/04/06
+ * Description        : Library configuration file.
+*********************************************************************************
+* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
+* Attention: This software (modified or not) and binary are used for 
+* microcontroller manufactured by Nanjing Qinheng Microelectronics.
+*******************************************************************************/
+#ifndef __CH32X035_CONF_H
+#define __CH32X035_CONF_H
+
+#include "ch32x035_adc.h"
+#include "ch32x035_awu.h"
+#include "ch32x035_dbgmcu.h"
+#include "ch32x035_dma.h"
+#include "ch32x035_exti.h"
+#include "ch32x035_flash.h"
+#include "ch32x035_gpio.h"
+#include "ch32x035_i2c.h"
+#include "ch32x035_iwdg.h"
+#include "ch32x035_pwr.h"
+#include "ch32x035_rcc.h"
+#include "ch32x035_spi.h"
+#include "ch32x035_tim.h"
+#include "ch32x035_usart.h"
+#include "ch32x035_wwdg.h"
+#include "ch32x035_it.h"
+#include "ch32x035_misc.h"
+
+
+#endif
+
+
+	
+	
+	
diff --git a/board/ch32x035_it.c b/board/ch32x035_it.c
new file mode 100644
index 0000000..ed6a5ee
--- /dev/null
+++ b/board/ch32x035_it.c
@@ -0,0 +1,37 @@
+/********************************** (C) COPYRIGHT *******************************
+ * File Name          : ch32x035_it.c
+ * Author             : WCH
+ * Version            : V1.0.0
+ * Date               : 2023/04/06
+ * Description        : Main Interrupt Service Routines.
+ *********************************************************************************
+ * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
+ * Attention: This software (modified or not) and binary are used for
+ * microcontroller manufactured by Nanjing Qinheng Microelectronics.
+ *******************************************************************************/
+#include "ch32x035_it.h"
+
+void NMI_Handler(void) __attribute__((interrupt));
+void HardFault_Handler(void) __attribute__((interrupt));
+
+/*********************************************************************
+ * @fn      NMI_Handler
+ *
+ * @brief   This function handles NMI exception.
+ *
+ * @return  none
+ */
+void NMI_Handler(void) {
+}
+
+/*********************************************************************
+ * @fn      HardFault_Handler
+ *
+ * @brief   This function handles Hard Fault exception.
+ *
+ * @return  none
+ */
+void HardFault_Handler(void) {
+    while (1) {
+    }
+}
diff --git a/board/ch32x035_it.h b/board/ch32x035_it.h
new file mode 100644
index 0000000..f24b5bd
--- /dev/null
+++ b/board/ch32x035_it.h
@@ -0,0 +1,20 @@
+/********************************** (C) COPYRIGHT *******************************
+ * File Name          : ch32x035_it.h
+ * Author             : WCH
+ * Version            : V1.0.0
+ * Date               : 2023/04/06
+ * Description        : This file contains the headers of the interrupt handlers.
+*********************************************************************************
+* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
+* Attention: This software (modified or not) and binary are used for 
+* microcontroller manufactured by Nanjing Qinheng Microelectronics.
+*******************************************************************************/
+#ifndef __CH32X035_IT_H
+#define __CH32X035_IT_H
+
+#include "debug.h"
+
+
+#endif
+
+
diff --git a/board/system_ch32x035.c b/board/system_ch32x035.c
new file mode 100644
index 0000000..9f5a5ff
--- /dev/null
+++ b/board/system_ch32x035.c
@@ -0,0 +1,241 @@
+/********************************** (C) COPYRIGHT *******************************
+ * File Name          : system_ch32x035.c
+ * Author             : WCH
+ * Version            : V1.0.0
+ * Date               : 2023/04/06
+ * Description        : CH32X035 Device Peripheral Access Layer System Source File.
+*********************************************************************************
+* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
+* Attention: This software (modified or not) and binary are used for 
+* microcontroller manufactured by Nanjing Qinheng Microelectronics.
+*******************************************************************************/
+#include "ch32x035.h"
+
+/* 
+* Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after 
+* reset the HSI is used as SYSCLK source).
+*/
+
+//#define SYSCLK_FREQ_8MHz_HSI   8000000
+//#define SYSCLK_FREQ_12MHz_HSI  12000000
+//#define SYSCLK_FREQ_16MHz_HSI  16000000
+//#define SYSCLK_FREQ_24MHz_HSI  24000000
+#define SYSCLK_FREQ_48MHz_HSI  HSI_VALUE
+
+/* Clock Definitions */
+#ifdef SYSCLK_FREQ_8MHz_HSI
+uint32_t SystemCoreClock         = SYSCLK_FREQ_8MHz_HSI;              /* System Clock Frequency (Core Clock) */
+#elif defined SYSCLK_FREQ_12MHz_HSI
+uint32_t SystemCoreClock         = SYSCLK_FREQ_12MHz_HSI;        /* System Clock Frequency (Core Clock) */
+#elif defined SYSCLK_FREQ_16MHz_HSI
+uint32_t SystemCoreClock         = SYSCLK_FREQ_16MHz_HSI;        /* System Clock Frequency (Core Clock) */
+#elif defined SYSCLK_FREQ_24MHz_HSI
+uint32_t SystemCoreClock         = SYSCLK_FREQ_24MHz_HSI;        /* System Clock Frequency (Core Clock) */
+#else
+uint32_t SystemCoreClock         = HSI_VALUE;                    /* System Clock Frequency (Core Clock) */
+
+#endif
+
+__I uint8_t AHBPrescTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 1, 2, 3, 4, 5, 6, 7, 8};
+
+
+/* system_private_function_proto_types */
+static void SetSysClock(void);
+
+#ifdef SYSCLK_FREQ_8MHz_HSI
+static void SetSysClockTo8_HSI( void );
+#elif defined SYSCLK_FREQ_12MHz_HSI
+static void SetSysClockTo12_HSI( void );
+#elif defined SYSCLK_FREQ_16MHz_HSI
+static void SetSysClockTo16_HSI( void );
+#elif defined SYSCLK_FREQ_24MHz_HSI
+static void SetSysClockTo24_HSI( void );
+#elif defined SYSCLK_FREQ_48MHz_HSI
+static void SetSysClockTo48_HSI( void );
+
+#endif
+
+/*********************************************************************
+ * @fn      SystemInit
+ *
+ * @brief   Setup the microcontroller system Initialize the Embedded Flash Interface,
+ *        update the SystemCoreClock variable.
+ *
+ * @return  none
+ */
+void SystemInit (void)
+{
+  RCC->CTLR |= (uint32_t)0x00000001;
+  RCC->CFGR0 |= (uint32_t)0x00000050;
+  RCC->CFGR0 &= (uint32_t)0xF8FFFF5F;
+  SetSysClock();
+}
+
+/*********************************************************************
+ * @fn      SystemCoreClockUpdate
+ *
+ * @brief   Update SystemCoreClock variable according to Clock Register Values.
+ *
+ * @return  none
+ */
+void SystemCoreClockUpdate (void)
+{
+    uint32_t tmp = 0;
+
+    SystemCoreClock = HSI_VALUE;
+    tmp = AHBPrescTable[((RCC->CFGR0 & RCC_HPRE) >> 4)];
+
+    if(((RCC->CFGR0 & RCC_HPRE) >> 4) < 8)
+    {
+        SystemCoreClock /= tmp;
+    }
+    else
+    {
+        SystemCoreClock >>= tmp;
+    }
+}
+
+/*********************************************************************
+ * @fn      SetSysClock
+ *
+ * @brief   Configures the System clock frequency, HCLK prescalers.
+ *
+ * @return  none
+ */
+static void SetSysClock(void)
+{
+//    GPIO_IPD_Unused();
+
+#ifdef SYSCLK_FREQ_8MHz_HSI
+    SetSysClockTo8_HSI();
+#elif defined SYSCLK_FREQ_12MHz_HSI
+    SetSysClockTo12_HSI();
+#elif defined SYSCLK_FREQ_16MHz_HSI
+    SetSysClockTo16_HSI();
+#elif defined SYSCLK_FREQ_24MHz_HSI
+    SetSysClockTo24_HSI();
+#elif defined SYSCLK_FREQ_48MHz_HSI
+    SetSysClockTo48_HSI();
+
+#endif
+}
+
+
+#ifdef SYSCLK_FREQ_8MHz_HSI
+
+/*********************************************************************
+ * @fn      SetSysClockTo8_HSI
+ *
+ * @brief   Sets HSE as System clock source and configure HCLK prescalers.
+ *
+ * @return  none
+ */
+static void SetSysClockTo8_HSI(void)
+{
+    /* Flash 2 wait state */
+    FLASH->ACTLR &= (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY);
+    FLASH->ACTLR |= (uint32_t)FLASH_ACTLR_LATENCY_2;
+
+    /* HCLK = SYSCLK = APB1 */
+    RCC->CFGR0 &= (uint32_t)0xFFFFFF0F;
+    RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV6;
+
+    /* Flash 0 wait state */
+    FLASH->ACTLR &= (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY);
+    FLASH->ACTLR |= (uint32_t)FLASH_ACTLR_LATENCY_0;
+}
+
+#elif defined SYSCLK_FREQ_12MHz_HSI
+
+/*********************************************************************
+ * @fn      SetSysClockTo12_HSI
+ *
+ * @brief   Sets System clock frequency to 12MHz and configure HCLK prescalers.
+ *
+ * @return  none
+ */
+static void SetSysClockTo12_HSI(void)
+{
+    /* Flash 2 wait state */
+    FLASH->ACTLR &= (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY);
+    FLASH->ACTLR |= (uint32_t)FLASH_ACTLR_LATENCY_2;
+
+    /* HCLK = SYSCLK = APB1 */
+    RCC->CFGR0 &= (uint32_t)0xFFFFFF0F;
+    RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV4;
+
+    /* Flash 0 wait state */
+    FLASH->ACTLR &= (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY);
+    FLASH->ACTLR |= (uint32_t)FLASH_ACTLR_LATENCY_0;
+}
+
+#elif defined SYSCLK_FREQ_16MHz_HSI
+
+/*********************************************************************
+ * @fn      SetSysClockTo16_HSI
+ *
+ * @brief   Sets System clock frequency to 16MHz and configure HCLK prescalers.
+ *
+ * @return  none
+ */
+static void SetSysClockTo16_HSI(void)
+{
+    /* Flash 2 wait state */
+    FLASH->ACTLR &= (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY);
+    FLASH->ACTLR |= (uint32_t)FLASH_ACTLR_LATENCY_2;
+
+    /* HCLK = SYSCLK = APB1 */
+    RCC->CFGR0 &= (uint32_t)0xFFFFFF0F;
+    RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV3;
+
+    /* Flash 0 wait state */
+    FLASH->ACTLR &= (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY);
+    FLASH->ACTLR |= (uint32_t)FLASH_ACTLR_LATENCY_1;
+}
+
+#elif defined SYSCLK_FREQ_24MHz_HSI
+
+/*********************************************************************
+ * @fn      SetSysClockTo24_HSI
+ *
+ * @brief   Sets System clock frequency to 24MHz and configure HCLK prescalers.
+ *
+ * @return  none
+ */
+static void SetSysClockTo24_HSI(void)
+{
+    /* Flash 2 wait state */
+    FLASH->ACTLR &= (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY);
+    FLASH->ACTLR |= (uint32_t)FLASH_ACTLR_LATENCY_2;
+
+    /* HCLK = SYSCLK = APB1 */
+    RCC->CFGR0 &= (uint32_t)0xFFFFFF0F;
+    RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV2;
+
+    /* Flash 1 wait state */
+    FLASH->ACTLR = (uint32_t)FLASH_ACTLR_LATENCY_1;
+}
+
+
+#elif defined SYSCLK_FREQ_48MHz_HSI
+
+/*********************************************************************
+ * @fn      SetSysClockTo48_HSI
+ *
+ * @brief   Sets System clock frequency to 48MHz and configure HCLK prescalers.
+ *
+ * @return  none
+ */
+static void SetSysClockTo48_HSI(void)
+{
+    /* Flash 2 wait state */
+    FLASH->ACTLR &= (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY);
+    FLASH->ACTLR |= (uint32_t)FLASH_ACTLR_LATENCY_2;
+
+    /* HCLK = SYSCLK = APB1 */
+    RCC->CFGR0 &= (uint32_t)0xFFFFFF0F;
+    RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
+}
+
+#endif
+
diff --git a/board/system_ch32x035.h b/board/system_ch32x035.h
new file mode 100644
index 0000000..9cad09b
--- /dev/null
+++ b/board/system_ch32x035.h
@@ -0,0 +1,32 @@
+/********************************** (C) COPYRIGHT *******************************
+ * File Name          : system_ch32x035.h
+ * Author             : WCH
+ * Version            : V1.0.0
+ * Date               : 2023/04/06
+ * Description        : CH32X035 Device Peripheral Access Layer System Header File.
+*********************************************************************************
+* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
+* Attention: This software (modified or not) and binary are used for 
+* microcontroller manufactured by Nanjing Qinheng Microelectronics.
+*******************************************************************************/
+#ifndef __SYSTEM_CH32X035_H
+#define __SYSTEM_CH32X035_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif 
+
+extern uint32_t SystemCoreClock;          /* System Clock Frequency (Core Clock) */
+
+/* System_Exported_Functions */  
+extern void SystemInit(void);
+extern void SystemCoreClockUpdate(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+
+
diff --git a/include/.gitkeep b/include/.gitkeep
new file mode 100644
index 0000000..e69de29
diff --git a/riscv64-elf.cmake b/riscv64-elf.cmake
new file mode 100644
index 0000000..68cf01f
--- /dev/null
+++ b/riscv64-elf.cmake
@@ -0,0 +1,17 @@
+# Poor old Windows...
+if(WIN32)
+    set(CMAKE_SYSTEM_NAME "Generic")
+endif()
+
+set(CMAKE_C_COMPILER   riscv64-elf-gcc)
+set(CMAKE_CXX_COMPILER riscv64-elf-g++)
+
+# Optionally set size binary name, for elf section size reporting.
+set(TARGET_TOOLCHAIN_SIZE riscv64-elf-size)
+
+set(CMAKE_C_FLAGS_INIT   "-march=rv32imac_zicsr -mabi=ilp32")
+set(CMAKE_CXX_FLAGS_INIT "-march=rv32imac_zicsr -mabi=ilp32")
+set(CMAKE_EXE_LINKER_FLAGS_INIT "-specs=nano.specs -specs=nosys.specs -nostartfiles -Wl,--print-memory-usage -Wl,--no-warn-rwx-segments")
+
+# Make CMake happy about those compilers
+set(CMAKE_TRY_COMPILE_TARGET_TYPE "STATIC_LIBRARY")
diff --git a/src/main.c b/src/main.c
new file mode 100644
index 0000000..34ea0eb
--- /dev/null
+++ b/src/main.c
@@ -0,0 +1,4 @@
+int main(void) {
+    for (;;) {
+    }
+}
\ No newline at end of file