Demostrate PWM driver.
This commit is contained in:
parent
3104a44e7c
commit
1aa29457de
GPG Key ID:
17F01E106F9F5E0A
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@ -0,0 +1,12 @@
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BasedOnStyle: Google
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||||
IndentWidth: 4
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||||
AlignConsecutiveMacros: AcrossEmptyLines
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||||
AlignConsecutiveDeclarations: Consecutive
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||||
AlignConsecutiveAssignments: Consecutive
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||||
AllowShortFunctionsOnASingleLine: None
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||||
BreakBeforeBraces: Custom
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||||
BraceWrapping:
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||||
AfterEnum: false
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||||
AfterStruct: false
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||||
SplitEmptyFunction: false
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ColumnLimit: 120
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@ -0,0 +1,3 @@
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/cmake-build-*
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/.vscode
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/vendor
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@ -5,30 +5,19 @@ project(libch57x_hello)
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enable_language(CXX)
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enable_language(ASM)
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# Extra CFlags
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set(TARGET_CFLAGS_EXTRA "-Og")
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set(TARGET_CFLAGS_EXTRA "-Og")
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set(TARGET_LDFLAGS_EXTRA "-Wl,--print-memory-usage")
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# Different linker scripts
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# Linker scripts
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set(TARGET_LDSCRIPT_FLASH "${CMAKE_SOURCE_DIR}/lib/libch57x/lib/CMSIS_Vendor/WCH/CH57x/Source/GCC/ch579_FLASH.ld")
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set(TARGET_LDSCRIPT_RAM "${CMAKE_SOURCE_DIR}/ch579_RAM.ld")
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# Copy them from Makefile
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set(TARGET_C_SOURCES
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set(TARGET_SOURCES
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"lib/libch57x/lib/CMSIS_Vendor/WCH/CH57x/Source/GCC/startup_ch57x.c"
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"src/irq_handlers.c"
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"src/main.c"
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)
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# Copy them from Makefile
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set(TARGET_ASM_SOURCES
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)
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# Copy them from Makefile
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set(TARGET_C_DEFINES
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)
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# Copy them from Makefile
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set(TARGET_C_INCLUDES
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"include"
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)
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@ -42,26 +31,23 @@ set(TARGET_LIBS
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set(TARGET_LIB_DIRECTORIES
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)
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# Device specific settings, goes to CFLAGS and LDFLAGS
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set(TARGET_CFLAGS_HARDWARE "-mcpu=cortex-m0 -mfloat-abi=soft -mthumb")
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# Conditional flags
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# DEBUG
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set(CMAKE_C_FLAGS_DEBUG "-DDEBUG -Og -g")
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set(CMAKE_CXX_FLAGS_DEBUG "-DDEBUG -Og -g")
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set(CMAKE_ASM_FLAGS_DEBUG "-DDEBUG -Og -g")
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set(CMAKE_C_FLAGS_DEBUG "-DDEBUG -O0 -g")
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set(CMAKE_CXX_FLAGS_DEBUG "-DDEBUG -O0 -g")
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set(CMAKE_ASM_FLAGS_DEBUG "-DDEBUG -O0 -g")
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# RELEASE
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set(CMAKE_C_FLAGS_RELEASE "-DNDEBUG -O2 -flto")
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set(CMAKE_CXX_FLAGS_RELEASE "-DNDEBUG -O2 -flto")
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set(CMAKE_ASM_FLAGS_RELEASE "-DNDEBUG -O2 -flto")
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set(CMAKE_EXE_LINKER_FLAGS_DEBUG "-flto")
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set(CMAKE_EXE_LINKER_FLAGS_RELEASE "-flto")
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# Final compiler flags
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set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} ${TARGET_CFLAGS_HARDWARE} ${TARGET_CFLAGS_EXTRA} -Wall -fdata-sections -ffunction-sections")
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set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} ${TARGET_CFLAGS_HARDWARE} ${TARGET_CXXFLAGS_EXTRA} -Wall -fdata-sections -ffunction-sections")
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set(CMAKE_ASM_FLAGS "${CMAKE_ASM_FLAGS} ${TARGET_CMAKE_C_FLAGS} -x assembler-with-cpp")
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set(CMAKE_EXE_LINKER_FLAGS "-specs=nano.specs -Wl,--gc-sections -lc -lm -lnosys ${TARGET_LDFLAGS_EXTRA}")
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set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Wall -fno-common -fno-builtin -ffreestanding -fdata-sections -ffunction-sections")
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set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wall -fno-common -fno-builtin -ffreestanding -fdata-sections -ffunction-sections")
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set(CMAKE_ASM_FLAGS "${CMAKE_C_FLAGS} -x assembler-with-cpp")
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set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--gc-sections")
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# Include sub directories here
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set(LIBCH57X_DEVICE "CH579")
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@ -75,32 +61,25 @@ link_libraries(${TARGET_LIBS})
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# Main targets are added here
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# **** Internal Flash ****
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# Create ELF
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add_executable("${CMAKE_PROJECT_NAME}_FLASH.elf" ${TARGET_C_SOURCES} ${TARGET_ASM_SOURCES})
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add_executable("${CMAKE_PROJECT_NAME}_FLASH.elf" ${TARGET_SOURCES})
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target_compile_definitions("${CMAKE_PROJECT_NAME}_FLASH.elf"
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PRIVATE ${TARGET_C_DEFINES_XIP}
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)
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target_link_options("${CMAKE_PROJECT_NAME}_FLASH.elf"
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PRIVATE "-T${TARGET_LDSCRIPT_FLASH}"
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PRIVATE "-Wl,-Map=${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_FLASH.map,--cref"
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)
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PRIVATE "-Wl,--Map=${CMAKE_PROJECT_NAME}_FLASH.map"
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)
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set_property(TARGET "${CMAKE_PROJECT_NAME}_FLASH.elf" APPEND
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PROPERTY ADDITIONAL_CLEAN_FILES "${CMAKE_PROJECT_NAME}_FLASH.map"
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)
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add_custom_command(OUTPUT "${CMAKE_PROJECT_NAME}_FLASH.hex"
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COMMAND ${CMAKE_OBJCOPY} "-O" "ihex" "${CMAKE_PROJECT_NAME}_FLASH.elf" "${CMAKE_PROJECT_NAME}_FLASH.hex"
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DEPENDS "${CMAKE_PROJECT_NAME}_FLASH.elf"
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)
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)
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add_custom_target("${CMAKE_PROJECT_NAME}_FLASH_HEX" DEPENDS "${CMAKE_PROJECT_NAME}_FLASH.hex")
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# **** Internal SRAM ****
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# Create ELF
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add_executable("${CMAKE_PROJECT_NAME}_RAM.elf" ${TARGET_C_SOURCES} ${TARGET_ASM_SOURCES})
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target_link_options("${CMAKE_PROJECT_NAME}_RAM.elf"
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PRIVATE "-T${TARGET_LDSCRIPT_RAM}"
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PRIVATE "-Wl,-Map=${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_RAM.map,--cref"
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)
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add_custom_command(OUTPUT "${CMAKE_PROJECT_NAME}_RAM.hex"
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COMMAND ${CMAKE_OBJCOPY} "-O" "ihex" "${CMAKE_PROJECT_NAME}_FLASH.elf" "${CMAKE_PROJECT_NAME}_RAM.hex"
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DEPENDS "${CMAKE_PROJECT_NAME}_RAM.elf"
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)
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add_custom_target("${CMAKE_PROJECT_NAME}_RAM_HEX" DEPENDS "${CMAKE_PROJECT_NAME}_RAM.hex")
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if(DEFINED TARGET_TOOLCHAIN_SIZE)
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add_custom_command(TARGET "${CMAKE_PROJECT_NAME}_FLASH.elf" POST_BUILD
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COMMAND ${TARGET_TOOLCHAIN_SIZE} "${CMAKE_PROJECT_NAME}_FLASH.elf"
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)
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endif()
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@ -1,4 +1,17 @@
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set(CMAKE_C_COMPILER arm-none-eabi-gcc)
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# Poor old Windows...
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if(WIN32)
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set(CMAKE_SYSTEM_NAME "Generic")
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endif()
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set(CMAKE_C_COMPILER arm-none-eabi-gcc)
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set(CMAKE_CXX_COMPILER arm-none-eabi-g++)
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# Optionally set size binary name, for elf section size reporting.
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set(TARGET_TOOLCHAIN_SIZE arm-none-eabi-size)
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set(CMAKE_C_FLAGS_INIT "-mcpu=cortex-m0 -mthumb")
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set(CMAKE_CXX_FLAGS_INIT "-mcpu=cortex-m0 -mthumb")
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set(CMAKE_EXE_LINKER_FLAGS_INIT "-specs=nano.specs -specs=nosys.specs -Wl,--print-memory-usage -Wl,--no-warn-rwx-segments")
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# Make CMake happy about those compilers
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set(CMAKE_TRY_COMPILE_TARGET_TYPE "STATIC_LIBRARY")
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296
ch579_RAM.ld
296
ch579_RAM.ld
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@ -1,296 +0,0 @@
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/******************************************************************************
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* @file gcc_arm.ld
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* @brief GNU Linker Script for Cortex-M based device
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* @version V2.1.0
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* @date 04. August 2020
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******************************************************************************/
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/*
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* Copyright (c) 2009-2020 Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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||||
* See the License for the specific language governing permissions and
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||||
* limitations under the License.
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||||
*/
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||||
|
||||
/*
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*-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
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||||
*/
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||||
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/*---------------------- Flash Configuration ----------------------------------
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<h> Flash Configuration
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<o0> Flash Base Address <0x0-0xFFFFFFFF:8>
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<o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
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||||
</h>
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||||
-----------------------------------------------------------------------------*/
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__ROM_BASE = 0x00000000;
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__ROM_SIZE = 0x0003E800;
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||||
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||||
/*--------------------- Embedded RAM Configuration ----------------------------
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||||
<h> RAM Configuration
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<o0> RAM Base Address <0x0-0xFFFFFFFF:8>
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<o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
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||||
</h>
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||||
-----------------------------------------------------------------------------*/
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||||
__RAM_BASE = 0x20000000;
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||||
__RAM_SIZE = 0x00008000;
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||||
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||||
/*--------------------- Stack / Heap Configuration ----------------------------
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||||
<h> Stack / Heap Configuration
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||||
<o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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||||
<o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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||||
</h>
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||||
-----------------------------------------------------------------------------*/
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||||
__STACK_SIZE = 0x00000400;
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||||
__HEAP_SIZE = 0x00000C00;
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||||
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||||
/*
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||||
*-------------------- <<< end of configuration section >>> -------------------
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||||
*/
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||||
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||||
MEMORY
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||||
{
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||||
FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
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||||
RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE
|
||||
}
|
||||
|
||||
/* Linker script to place sections and symbol values. Should be used together
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||||
* with other linker script that defines memory regions FLASH and RAM.
|
||||
* It references following symbols, which must be defined in code:
|
||||
* Reset_Handler : Entry of reset handler
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||||
*
|
||||
* It defines following symbols, which code can use without definition:
|
||||
* __exidx_start
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||||
* __exidx_end
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||||
* __copy_table_start__
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||||
* __copy_table_end__
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||||
* __zero_table_start__
|
||||
* __zero_table_end__
|
||||
* __etext
|
||||
* __data_start__
|
||||
* __preinit_array_start
|
||||
* __preinit_array_end
|
||||
* __init_array_start
|
||||
* __init_array_end
|
||||
* __fini_array_start
|
||||
* __fini_array_end
|
||||
* __data_end__
|
||||
* __bss_start__
|
||||
* __bss_end__
|
||||
* __end__
|
||||
* end
|
||||
* __HeapLimit
|
||||
* __StackLimit
|
||||
* __StackTop
|
||||
* __stack
|
||||
*/
|
||||
ENTRY(Reset_Handler)
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||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
KEEP(*(.vectors))
|
||||
*(.text*)
|
||||
|
||||
KEEP(*(.init))
|
||||
KEEP(*(.fini))
|
||||
|
||||
/* .ctors */
|
||||
*crtbegin.o(.ctors)
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||||
*crtbegin?.o(.ctors)
|
||||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
|
||||
*(SORT(.ctors.*))
|
||||
*(.ctors)
|
||||
|
||||
/* .dtors */
|
||||
*crtbegin.o(.dtors)
|
||||
*crtbegin?.o(.dtors)
|
||||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
|
||||
*(SORT(.dtors.*))
|
||||
*(.dtors)
|
||||
|
||||
*(.rodata*)
|
||||
|
||||
KEEP(*(.eh_frame*))
|
||||
} > RAM
|
||||
|
||||
/*
|
||||
* SG veneers:
|
||||
* All SG veneers are placed in the special output section .gnu.sgstubs. Its start address
|
||||
* must be set, either with the command line option <20>--section-start<72> or in a linker script,
|
||||
* to indicate where to place these veneers in memory.
|
||||
*/
|
||||
/*
|
||||
.gnu.sgstubs :
|
||||
{
|
||||
. = ALIGN(32);
|
||||
} > FLASH
|
||||
*/
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > RAM
|
||||
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} > RAM
|
||||
__exidx_end = .;
|
||||
|
||||
.copy.table :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__copy_table_start__ = .;
|
||||
|
||||
LONG (__etext)
|
||||
LONG (__data_start__)
|
||||
LONG ((__data_end__ - __data_start__) / 4)
|
||||
|
||||
/* Add each additional data section here */
|
||||
/*
|
||||
LONG (__etext2)
|
||||
LONG (__data2_start__)
|
||||
LONG ((__data2_end__ - __data2_start__) / 4)
|
||||
*/
|
||||
__copy_table_end__ = .;
|
||||
} > RAM
|
||||
|
||||
.zero.table :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__zero_table_start__ = .;
|
||||
/* Add each additional bss section here */
|
||||
/*
|
||||
LONG (__bss2_start__)
|
||||
LONG ((__bss2_end__ - __bss2_start__) / 4)
|
||||
*/
|
||||
__zero_table_end__ = .;
|
||||
} > RAM
|
||||
|
||||
/**
|
||||
* Location counter can end up 2byte aligned with narrow Thumb code but
|
||||
* __etext is assumed by startup code to be the LMA of a section in RAM
|
||||
* which must be 4byte aligned
|
||||
*/
|
||||
__etext = ALIGN (4);
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||||
|
||||
.data : AT (__etext)
|
||||
{
|
||||
__data_start__ = .;
|
||||
*(vtable)
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
|
||||
. = ALIGN(4);
|
||||
/* preinit data */
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP(*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
/* init data */
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
/* finit data */
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
KEEP(*(.fini_array))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
|
||||
KEEP(*(.jcr*))
|
||||
. = ALIGN(4);
|
||||
/* All data end */
|
||||
__data_end__ = .;
|
||||
|
||||
} > RAM
|
||||
|
||||
/*
|
||||
* Secondary data section, optional
|
||||
*
|
||||
* Remember to add each additional data section
|
||||
* to the .copy.table above to asure proper
|
||||
* initialization during startup.
|
||||
*/
|
||||
/*
|
||||
__etext2 = ALIGN (4);
|
||||
|
||||
.data2 : AT (__etext2)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__data2_start__ = .;
|
||||
*(.data2)
|
||||
*(.data2.*)
|
||||
. = ALIGN(4);
|
||||
__data2_end__ = .;
|
||||
|
||||
} > RAM2
|
||||
*/
|
||||
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__bss_start__ = .;
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
__bss_end__ = .;
|
||||
} > RAM AT > RAM
|
||||
|
||||
/*
|
||||
* Secondary bss section, optional
|
||||
*
|
||||
* Remember to add each additional bss section
|
||||
* to the .zero.table above to asure proper
|
||||
* initialization during startup.
|
||||
*/
|
||||
/*
|
||||
.bss2 :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__bss2_start__ = .;
|
||||
*(.bss2)
|
||||
*(.bss2.*)
|
||||
. = ALIGN(4);
|
||||
__bss2_end__ = .;
|
||||
} > RAM2 AT > RAM2
|
||||
*/
|
||||
|
||||
.heap (COPY) :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__end__ = .;
|
||||
PROVIDE(end = .);
|
||||
. = . + __HEAP_SIZE;
|
||||
. = ALIGN(8);
|
||||
__HeapLimit = .;
|
||||
} > RAM
|
||||
|
||||
.stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE) (COPY) :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__StackLimit = .;
|
||||
. = . + __STACK_SIZE;
|
||||
. = ALIGN(8);
|
||||
__StackTop = .;
|
||||
} > RAM
|
||||
PROVIDE(__stack = __StackTop);
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||||
|
||||
/* Check if data + heap + stack exceeds RAM limit */
|
||||
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
|
||||
}
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||||
|
|
@ -1 +1 @@
|
|||
Subproject commit 1140a7cf4202d783875bc9cb61d6cd16d45f0e1b
|
||||
Subproject commit a0dd13fbf941ad44411294cafe876d517375798d
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||||
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|
@ -0,0 +1 @@
|
|||
#include "libch57x.h"
|
||||
61
src/main.c
61
src/main.c
|
|
@ -1,9 +1,64 @@
|
|||
#include "ch57x.h"
|
||||
#include "libch57x.h"
|
||||
|
||||
#define LED_PORT LIBCH57X_GPIO_BANK_B
|
||||
#define LED_PIN 0U
|
||||
#define LED_PWM_CH 2U
|
||||
#define LED_PWM_MASK (1U << LED_PWM_CH)
|
||||
|
||||
static volatile uint32_t s_tick_count = 0UL;
|
||||
|
||||
static void tick_delay(uint32_t msec) {
|
||||
uint32_t tick_start = s_tick_count;
|
||||
|
||||
while (s_tick_count - tick_start <= msec) {
|
||||
/* -- */
|
||||
}
|
||||
}
|
||||
|
||||
int main(int argc, const char *argv[]) {
|
||||
volatile uint8_t chip_id = CH57x_SYSAUX->CHIP_ID;
|
||||
SysTick_Config(4000); /* 1kHz */
|
||||
|
||||
libch57x_gpio_config_t led_cfg = {
|
||||
.bank = LED_PORT,
|
||||
.pin_mask = (1U << LED_PIN),
|
||||
.mode = LIBCH57X_GPIO_MODE_OUTPUT_5MA,
|
||||
};
|
||||
|
||||
libch57x_gpio_config(&led_cfg);
|
||||
|
||||
libch57x_pwm_config_t pwm_cfg = {
|
||||
.cyc_mode = LIBCH57x_PWM_CYC_MODE_8B,
|
||||
.cyc_sel = LIBCH57x_PWM_CYCLE_SEL_NORM,
|
||||
.stag_en = 0U,
|
||||
};
|
||||
|
||||
libch57x_pwm_config(PWM, &pwm_cfg);
|
||||
libch57x_pwm_clock_div(PWM, 32);
|
||||
|
||||
libch57x_pwm_polarity(PWM, LED_PWM_MASK, true);
|
||||
libch57x_pwm_duty(PWM, LED_PWM_MASK, 4);
|
||||
|
||||
libch57x_pwm_enable(PWM, LED_PWM_MASK, true);
|
||||
|
||||
uint8_t new_duty = 0;
|
||||
uint8_t duty_dir = 0;
|
||||
|
||||
for (;;) {
|
||||
// Dead Loop.
|
||||
tick_delay(10);
|
||||
if (duty_dir == 0U) {
|
||||
libch57x_pwm_duty(PWM, LED_PWM_MASK, new_duty++);
|
||||
if (new_duty == 0) {
|
||||
duty_dir = 1U;
|
||||
}
|
||||
} else {
|
||||
libch57x_pwm_duty(PWM, LED_PWM_MASK, --new_duty);
|
||||
if (new_duty == 0) {
|
||||
duty_dir = 0U;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void SysTick_Handler(void) {
|
||||
s_tick_count++;
|
||||
}
|
||||
Loading…
Reference in New Issue