141 lines
6.0 KiB
C
141 lines
6.0 KiB
C
/***********************************************************************************************************************
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* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
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* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
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**********************************************************************************************************************/
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/*
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* How to setup clock using clock driver functions:
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*
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* 1. Setup clock sources.
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*
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* 2. Set up wait states of the flash.
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*
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* 3. Set up all dividers.
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*
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* 4. Set up all selectors to provide selected clocks.
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*
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*/
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/* clang-format off */
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/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
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!!GlobalInfo
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product: Clocks v13.0
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processor: MCXA153
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package_id: MCXA153VLH
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mcu_data: ksdk2_0
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processor_version: 15.0.0
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
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/* clang-format on */
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#include "fsl_clock.h"
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#include "clock_config.h"
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#include "fsl_spc.h"
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*******************************************************************************
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* Variables
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******************************************************************************/
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/* System clock frequency. */
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extern uint32_t SystemCoreClock;
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/*******************************************************************************
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************************ BOARD_InitBootClocks function ************************
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******************************************************************************/
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void BOARD_InitBootClocks(void)
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{
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BOARD_BootClockRUN();
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}
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/*******************************************************************************
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********************** Configuration BOARD_BootClockRUN ***********************
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******************************************************************************/
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/* clang-format off */
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/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
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!!Configuration
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name: BOARD_BootClockRUN
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called_from_default_init: true
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outputs:
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- {id: CLK_1M_clock.outFreq, value: 1 MHz}
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- {id: CLK_48M_clock.outFreq, value: 48 MHz}
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- {id: CPU_clock.outFreq, value: 48 MHz}
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- {id: FREQME_reference_clock.outFreq, value: 12 MHz}
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- {id: FREQME_target_clock.outFreq, value: 12 MHz}
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- {id: FRO_12M_clock.outFreq, value: 12 MHz}
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- {id: FRO_HF_DIV_clock.outFreq, value: 48 MHz}
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- {id: FRO_HF_clock.outFreq, value: 48 MHz}
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- {id: MAIN_clock.outFreq, value: 48 MHz}
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- {id: OSTIMER_clock.outFreq, value: 1 MHz}
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- {id: Slow_clock.outFreq, value: 12 MHz}
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- {id: System_clock.outFreq, value: 48 MHz}
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- {id: UTICK_clock.outFreq, value: 1 MHz}
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
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/* clang-format on */
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/*******************************************************************************
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* Variables for BOARD_BootClockRUN configuration
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******************************************************************************/
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/*******************************************************************************
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* Code for BOARD_BootClockRUN configuration
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******************************************************************************/
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void BOARD_BootClockRUN(void)
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{
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uint32_t coreFreq;
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spc_active_mode_core_ldo_option_t ldoOption;
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spc_sram_voltage_config_t sramOption;
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/* Get the CPU Core frequency */
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coreFreq = CLOCK_GetCoreSysClkFreq();
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/* The flow of increasing voltage and frequency */
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if (coreFreq <= BOARD_BOOTCLOCKRUN_CORE_CLOCK) {
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/* Set the LDO_CORE VDD regulator level */
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ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
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ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
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(void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
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/* Configure Flash to support different voltage level and frequency */
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FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U));
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/* Specifies the operating voltage for the SRAM's read/write timing margin */
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sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
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sramOption.requestVoltageUpdate = true;
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(void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
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}
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CLOCK_SetupFROHFClocking(48000000U); /*!< Enable FRO HF(48MHz) output */
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CLOCK_SetupFRO12MClocking(); /*!< Setup FRO12M clock */
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CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /* !< Switch MAIN_CLK to FRO_HF */
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/* The flow of decreasing voltage and frequency */
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if (coreFreq > BOARD_BOOTCLOCKRUN_CORE_CLOCK) {
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/* Configure Flash to support different voltage level and frequency */
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FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U));
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/* Specifies the operating voltage for the SRAM's read/write timing margin */
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sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
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sramOption.requestVoltageUpdate = true;
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(void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
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/* Set the LDO_CORE VDD regulator level */
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ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
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ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
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(void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
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}
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/*!< Set up clock selectors - Attach clocks to the peripheries */
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CLOCK_AttachClk(kCLK_1M_to_OSTIMER); /* !< Switch OSTIMER to CLK_1M */
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/* Configure FREQME clock */
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CLOCK_EnableClock(kCLOCK_InputMux);
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RESET_PeripheralReset(kINPUTMUX0_RST_SHIFT_RSTn);
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INPUTMUX0->FREQMEAS_REF = INPUTMUX_FREQMEAS_REF_INP(2);
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INPUTMUX0->FREQMEAS_TAR = INPUTMUX_FREQMEAS_TAR_INP(2);
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/*!< Set up dividers */
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CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U); /* !< Set AHBCLKDIV divider to value 1 */
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CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U); /* !< Set FROHFDIV divider to value 1 */
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/* Set SystemCoreClock variable */
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SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
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}
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