Initial commit
This commit is contained in:
commit
695accf843
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@ -0,0 +1,12 @@
|
|||
BasedOnStyle: Google
|
||||
IndentWidth: 4
|
||||
AlignConsecutiveMacros: Consecutive
|
||||
AlignConsecutiveDeclarations: Consecutive
|
||||
AlignConsecutiveAssignments: Consecutive
|
||||
AllowShortFunctionsOnASingleLine: None
|
||||
BreakBeforeBraces: Custom
|
||||
BraceWrapping:
|
||||
AfterEnum: false
|
||||
AfterStruct: false
|
||||
SplitEmptyFunction: false
|
||||
ColumnLimit: 120
|
|
@ -0,0 +1,17 @@
|
|||
---
|
||||
kind: pipeline
|
||||
type: docker
|
||||
name: Build
|
||||
|
||||
steps:
|
||||
- name: Submodules
|
||||
image: alpine/git
|
||||
commands:
|
||||
- git submodule update --init --recursive
|
||||
|
||||
- name: Build
|
||||
image: "ghcr.io/puddingindustries/embedded-builder-andesv5:v5d"
|
||||
commands:
|
||||
- mkdir build && cd build
|
||||
- cmake -DCMAKE_TOOLCHAIN_FILE=riscv32-elf.cmake ..
|
||||
- make fire_hpm6750_template_FLASH.elf
|
|
@ -0,0 +1,5 @@
|
|||
/cmake-build-*
|
||||
/build
|
||||
/board/*.bak
|
||||
/.vscode
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
[submodule "SDK"]
|
||||
path = SDK
|
||||
url = https://github.com/hpmicro/hpm_sdk.git
|
|
@ -0,0 +1,169 @@
|
|||
cmake_minimum_required(VERSION 3.10)
|
||||
|
||||
project(fire_hpm6750_template)
|
||||
|
||||
enable_language(CXX)
|
||||
enable_language(ASM)
|
||||
|
||||
# Different linker scripts
|
||||
set(TARGET_LDSCRIPT_FLASH "${CMAKE_SOURCE_DIR}/app_flash.ld")
|
||||
set(TARGET_LDSCRIPT_RAM "${CMAKE_SOURCE_DIR}/SDK/soc/HPM6750/toolchains/gcc/ram.ld")
|
||||
|
||||
set(TARGET_SOURCES
|
||||
"SDK/components/debug_console/hpm_debug_console.c"
|
||||
"SDK/drivers/src/hpm_acmp_drv.c"
|
||||
"SDK/drivers/src/hpm_adc12_drv.c"
|
||||
"SDK/drivers/src/hpm_adc16_drv.c"
|
||||
"SDK/drivers/src/hpm_cam_drv.c"
|
||||
"SDK/drivers/src/hpm_can_drv.c"
|
||||
"SDK/drivers/src/hpm_crc_drv.c"
|
||||
"SDK/drivers/src/hpm_dao_drv.c"
|
||||
"SDK/drivers/src/hpm_dma_drv.c"
|
||||
"SDK/drivers/src/hpm_enet_drv.c"
|
||||
"SDK/drivers/src/hpm_femc_drv.c"
|
||||
"SDK/drivers/src/hpm_ffa_drv.c"
|
||||
"SDK/drivers/src/hpm_gpio_drv.c"
|
||||
"SDK/drivers/src/hpm_gptmr_drv.c"
|
||||
"SDK/drivers/src/hpm_i2c_drv.c"
|
||||
"SDK/drivers/src/hpm_i2s_drv.c"
|
||||
"SDK/drivers/src/hpm_jpeg_drv.c"
|
||||
"SDK/drivers/src/hpm_lcdc_drv.c"
|
||||
"SDK/drivers/src/hpm_lin_drv.c"
|
||||
"SDK/drivers/src/hpm_mchtmr_drv.c"
|
||||
"SDK/drivers/src/hpm_pcfg_drv.c"
|
||||
"SDK/drivers/src/hpm_pdm_drv.c"
|
||||
"SDK/drivers/src/hpm_pdma_drv.c"
|
||||
"SDK/drivers/src/hpm_pla_drv.c"
|
||||
"SDK/drivers/src/hpm_pllctl_drv.c"
|
||||
"SDK/drivers/src/hpm_pllctlv2_drv.c"
|
||||
"SDK/drivers/src/hpm_pmp_drv.c"
|
||||
"SDK/drivers/src/hpm_ptpc_drv.c"
|
||||
"SDK/drivers/src/hpm_pwm_drv.c"
|
||||
"SDK/drivers/src/hpm_rng_drv.c"
|
||||
"SDK/drivers/src/hpm_rtc_drv.c"
|
||||
"SDK/drivers/src/hpm_sdm_drv.c"
|
||||
"SDK/drivers/src/hpm_sdp_drv.c"
|
||||
"SDK/drivers/src/hpm_sdxc_drv.c"
|
||||
"SDK/drivers/src/hpm_spi_drv.c"
|
||||
"SDK/drivers/src/hpm_tsns_drv.c"
|
||||
"SDK/drivers/src/hpm_uart_drv.c"
|
||||
"SDK/drivers/src/hpm_usb_drv.c"
|
||||
"SDK/drivers/src/hpm_vad_drv.c"
|
||||
"SDK/drivers/src/hpm_wdg_drv.c"
|
||||
"SDK/soc/HPM6750/boot/hpm_bootheader.c"
|
||||
"SDK/soc/HPM6750/hpm_clock_drv.c"
|
||||
"SDK/soc/HPM6750/hpm_l1c_drv.c"
|
||||
"SDK/soc/HPM6750/hpm_otp_drv.c"
|
||||
"SDK/soc/HPM6750/hpm_sysctl_drv.c"
|
||||
"SDK/soc/HPM6750/system.c"
|
||||
"SDK/soc/HPM6750/toolchains/gcc/initfini.c"
|
||||
"SDK/soc/HPM6750/toolchains/gcc/start.S"
|
||||
"SDK/soc/HPM6750/toolchains/reset.c"
|
||||
"SDK/soc/HPM6750/toolchains/trap.c"
|
||||
"SDK/utils/hpm_sbrk.c"
|
||||
"board/board.c"
|
||||
"board/pinmux.c"
|
||||
"board/syscalls.c"
|
||||
"board/xip.c"
|
||||
"src/main.c"
|
||||
)
|
||||
|
||||
set(TARGET_C_DEFINES
|
||||
)
|
||||
|
||||
set(TARGET_C_DEFINES_XIP
|
||||
"FLASH_XIP"
|
||||
)
|
||||
|
||||
set(TARGET_C_INCLUDES
|
||||
"SDK/arch"
|
||||
"SDK/components/debug_console"
|
||||
"SDK/drivers/inc"
|
||||
"SDK/soc/HPM6750"
|
||||
"SDK/soc/ip"
|
||||
"board"
|
||||
"include"
|
||||
)
|
||||
|
||||
# Shared libraries linked with application
|
||||
set(TARGET_LIBS
|
||||
"c"
|
||||
"m"
|
||||
"nosys"
|
||||
)
|
||||
|
||||
# Shared library and linker script search paths
|
||||
set(TARGET_LIB_DIRECTORIES
|
||||
"SDK/soc/HPM6750/toolchains/gcc"
|
||||
)
|
||||
|
||||
# Conditional flags
|
||||
# DEBUG
|
||||
set(CMAKE_C_FLAGS_DEBUG "-DDEBUG -O0 -g")
|
||||
set(CMAKE_CXX_FLAGS_DEBUG "-DDEBUG -O0 -g")
|
||||
set(CMAKE_ASM_FLAGS_DEBUG "-DDEBUG -O0 -g")
|
||||
|
||||
# RELEASE
|
||||
set(CMAKE_C_FLAGS_RELEASE "-DNDEBUG -O2 -flto")
|
||||
set(CMAKE_CXX_FLAGS_RELEASE "-DNDEBUG -O2 -flto")
|
||||
set(CMAKE_ASM_FLAGS_RELEASE "-DNDEBUG -O2 -flto")
|
||||
set(CMAKE_EXE_LINKER_FLAGS_RELEASE "-flto")
|
||||
|
||||
# Final compiler flags
|
||||
set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Wall -fno-common -fno-builtin -ffreestanding -fdata-sections -ffunction-sections")
|
||||
set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wall -fno-common -fno-builtin -ffreestanding -fdata-sections -ffunction-sections")
|
||||
set(CMAKE_ASM_FLAGS "${CMAKE_C_FLAGS} -x assembler-with-cpp")
|
||||
set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--gc-sections")
|
||||
|
||||
# Shared sources, includes and definitions
|
||||
add_compile_definitions(${TARGET_C_DEFINES})
|
||||
include_directories(${TARGET_C_INCLUDES})
|
||||
link_directories(${TARGET_LIB_DIRECTORIES})
|
||||
link_libraries(${TARGET_LIBS})
|
||||
|
||||
# Main targets are added here
|
||||
|
||||
# Create ELF
|
||||
add_executable("${CMAKE_PROJECT_NAME}_FLASH.elf" ${TARGET_SOURCES})
|
||||
target_compile_definitions("${CMAKE_PROJECT_NAME}_FLASH.elf"
|
||||
PRIVATE ${TARGET_C_DEFINES_XIP}
|
||||
)
|
||||
target_link_options("${CMAKE_PROJECT_NAME}_FLASH.elf"
|
||||
PRIVATE "-T${TARGET_LDSCRIPT_FLASH}"
|
||||
PRIVATE "-Wl,--Map=${CMAKE_PROJECT_NAME}_FLASH.map"
|
||||
)
|
||||
set_property(TARGET "${CMAKE_PROJECT_NAME}_FLASH.elf" APPEND
|
||||
PROPERTY ADDITIONAL_CLEAN_FILES "${CMAKE_PROJECT_NAME}_FLASH.map"
|
||||
)
|
||||
add_custom_command(OUTPUT "${CMAKE_PROJECT_NAME}_FLASH.hex"
|
||||
COMMAND ${CMAKE_OBJCOPY} "-O" "ihex" "${CMAKE_PROJECT_NAME}_FLASH.elf" "${CMAKE_PROJECT_NAME}_FLASH.hex"
|
||||
DEPENDS "${CMAKE_PROJECT_NAME}_FLASH.elf"
|
||||
)
|
||||
add_custom_target("${CMAKE_PROJECT_NAME}_FLASH_HEX" DEPENDS "${CMAKE_PROJECT_NAME}_FLASH.hex")
|
||||
if (DEFINED TARGET_TOOLCHAIN_SIZE)
|
||||
add_custom_command(TARGET "${CMAKE_PROJECT_NAME}_FLASH.elf" POST_BUILD
|
||||
COMMAND ${TARGET_TOOLCHAIN_SIZE} "${CMAKE_PROJECT_NAME}_FLASH.elf"
|
||||
)
|
||||
endif ()
|
||||
|
||||
|
||||
# Create ELF
|
||||
add_executable("${CMAKE_PROJECT_NAME}_RAM.elf" ${TARGET_SOURCES})
|
||||
target_link_options("${CMAKE_PROJECT_NAME}_RAM.elf"
|
||||
PRIVATE "-T${TARGET_LDSCRIPT_RAM}"
|
||||
PRIVATE "-Wl,--Map=${CMAKE_PROJECT_NAME}_RAM.map"
|
||||
)
|
||||
set_property(TARGET "${CMAKE_PROJECT_NAME}_RAM.elf" APPEND
|
||||
PROPERTY ADDITIONAL_CLEAN_FILES "${CMAKE_PROJECT_NAME}_RAM.map"
|
||||
)
|
||||
add_custom_command(OUTPUT "${CMAKE_PROJECT_NAME}_RAM.hex"
|
||||
COMMAND ${CMAKE_OBJCOPY} "-O" "ihex" "${CMAKE_PROJECT_NAME}_RAM.elf" "${CMAKE_PROJECT_NAME}_RAM.hex"
|
||||
DEPENDS "${CMAKE_PROJECT_NAME}_RAM.elf"
|
||||
)
|
||||
add_custom_target("${CMAKE_PROJECT_NAME}_RAM_HEX" DEPENDS "${CMAKE_PROJECT_NAME}_RAM.hex")
|
||||
if (DEFINED TARGET_TOOLCHAIN_SIZE)
|
||||
add_custom_command(TARGET "${CMAKE_PROJECT_NAME}_RAM.elf" POST_BUILD
|
||||
COMMAND ${TARGET_TOOLCHAIN_SIZE} "${CMAKE_PROJECT_NAME}_RAM.elf"
|
||||
)
|
||||
endif ()
|
||||
|
|
@ -0,0 +1,55 @@
|
|||
adapter speed 5000
|
||||
|
||||
source [find interface/cmsis-dap.cfg]
|
||||
|
||||
transport select jtag
|
||||
|
||||
source [find target/hpmicro/hpm6750-single-core.cfg]
|
||||
|
||||
# openocd flash driver argument:
|
||||
# - option0:
|
||||
# [31:28] Flash probe type
|
||||
# 0 - SFDP SDR / 1 - SFDP DDR
|
||||
# 2 - 1-4-4 Read (0xEB, 24-bit address) / 3 - 1-2-2 Read(0xBB, 24-bit address)
|
||||
# 4 - HyperFLASH 1.8V / 5 - HyperFLASH 3V
|
||||
# 6 - OctaBus DDR (SPI -> OPI DDR)
|
||||
# 8 - Xccela DDR (SPI -> OPI DDR)
|
||||
# 10 - EcoXiP DDR (SPI -> OPI DDR)
|
||||
# [27:24] Command Pads after Power-on Reset
|
||||
# 0 - SPI / 1 - DPI / 2 - QPI / 3 - OPI
|
||||
# [23:20] Command Pads after Configuring FLASH
|
||||
# 0 - SPI / 1 - DPI / 2 - QPI / 3 - OPI
|
||||
# [19:16] Quad Enable Sequence (for the device support SFDP 1.0 only)
|
||||
# 0 - Not needed
|
||||
# 1 - QE bit is at bit 6 in Status Register 1
|
||||
# 2 - QE bit is at bit1 in Status Register 2
|
||||
# 3 - QE bit is at bit7 in Status Register 2
|
||||
# 4 - QE bit is at bit1 in Status Register 2 and should be programmed by 0x31
|
||||
# [15:8] Dummy cycles
|
||||
# 0 - Auto-probed / detected / default value
|
||||
# Others - User specified value, for DDR read, the dummy cycles should be 2 * cycles on FLASH datasheet
|
||||
# [7:4] Misc.
|
||||
# 0 - Not used
|
||||
# 1 - SPI mode
|
||||
# 2 - Internal loopback
|
||||
# 3 - External DQS
|
||||
# [3:0] Frequency option
|
||||
# 1 - 30MHz / 2 - 50MHz / 3 - 66MHz / 4 - 80MHz / 5 - 100MHz / 6 - 120MHz / 7 - 133MHz / 8 - 166MHz
|
||||
# - option1:
|
||||
# [31:20] Reserved
|
||||
# [19:16] IO voltage
|
||||
# 0 - 3V / 1 - 1.8V
|
||||
# [15:12] Pin group
|
||||
# 0 - 1st group / 1 - 2nd group
|
||||
# [11:8] Connection selection
|
||||
# 0 - CA_CS0 / 1 - CB_CS0 / 2 - CA_CS0 + CB_CS0 (Two FLASH connected to CA and CB respectively)
|
||||
# [7:0] Drive Strength
|
||||
# 0 - Default value
|
||||
|
||||
# xpi0 configs
|
||||
# - flash driver: hpm_xpi
|
||||
# - flash ctrl index: 0xF3040000
|
||||
# - base address: 0x80000000
|
||||
# - flash size: 0x2000000
|
||||
# - flash option0: 0x7
|
||||
flash bank xpi0 hpm_xpi 0x80000000 0x2000000 1 1 $_TARGET0 0xF3040000 0x7
|
|
@ -0,0 +1,3 @@
|
|||
_flash_size = 0x00400000;
|
||||
|
||||
INCLUDE flash_xip.ld;
|
|
@ -0,0 +1,228 @@
|
|||
/* SDK drivers */
|
||||
#include "hpm_clock_drv.h"
|
||||
#include "hpm_femc_drv.h"
|
||||
#include "hpm_i2c_drv.h"
|
||||
#include "hpm_lcdc_drv.h"
|
||||
#include "hpm_pcfg_drv.h"
|
||||
#include "hpm_pllctl_drv.h"
|
||||
#include "hpm_pmp_drv.h"
|
||||
#include "hpm_sysctl_drv.h"
|
||||
|
||||
/* Board */
|
||||
#include "board.h"
|
||||
#include "pinmux.h"
|
||||
|
||||
typedef struct {
|
||||
GPIO_Type *ctl;
|
||||
uint8_t index;
|
||||
uint8_t pin;
|
||||
} board_led_t;
|
||||
|
||||
static const board_led_t s_board_led_table[BOARD_LED_COUNT] = {
|
||||
{.ctl = BOARD_LED0_GPIO_CTRL, .index = BOARD_LED0_GPIO_INDEX, .pin = BOARD_LED0_GPIO_PIN},
|
||||
{.ctl = BOARD_LED1_GPIO_CTRL, .index = BOARD_LED1_GPIO_INDEX, .pin = BOARD_LED1_GPIO_PIN},
|
||||
{.ctl = BOARD_LED2_GPIO_CTRL, .index = BOARD_LED2_GPIO_INDEX, .pin = BOARD_LED2_GPIO_PIN},
|
||||
};
|
||||
|
||||
void board_init(void) {
|
||||
board_clock_init();
|
||||
|
||||
board_debug_console_init();
|
||||
board_led_init();
|
||||
|
||||
board_sdram_init();
|
||||
|
||||
board_pmp_init();
|
||||
|
||||
board_lcd_init();
|
||||
}
|
||||
|
||||
void board_clock_init(void) {
|
||||
uint32_t cpu0_freq = clock_get_frequency(clock_cpu0);
|
||||
if (cpu0_freq == PLLCTL_SOC_PLL_REFCLK_FREQ) {
|
||||
/* Configure the External OSC ramp-up time: ~9ms */
|
||||
pllctl_xtal_set_rampup_time(HPM_PLLCTL, 32UL * 1000UL * 9U);
|
||||
|
||||
/* Select clock setting preset1 */
|
||||
sysctl_clock_set_preset(HPM_SYSCTL, sysctl_preset_1);
|
||||
}
|
||||
|
||||
/* Update DCDC voltage */
|
||||
pcfg_dcdc_set_voltage(HPM_PCFG, BOARD_CORE_VOLTAGE_MV);
|
||||
|
||||
if (pllctl_init_int_pll_with_freq(HPM_PLLCTL, PLLCTL_PLL_PLL0, BOARD_CPU_FREQ) != status_success) {
|
||||
for (;;) {
|
||||
WFI();
|
||||
}
|
||||
}
|
||||
|
||||
clock_set_source_divider(clock_cpu0, clk_src_pll0_clk0, 1);
|
||||
clock_update_core_clock();
|
||||
}
|
||||
|
||||
void board_debug_console_init(void) {
|
||||
console_config_t cfg;
|
||||
|
||||
board_debug_uart_pins_init();
|
||||
|
||||
/* Configure the UART clock to 24MHz */
|
||||
clock_add_to_group(clock_uart0, 0);
|
||||
clock_set_source_divider(clock_uart0, clk_src_osc24m, 1U);
|
||||
|
||||
cfg.type = CONSOLE_TYPE_UART;
|
||||
cfg.base = HPM_UART0_BASE;
|
||||
cfg.src_freq_in_hz = clock_get_frequency(clock_uart0);
|
||||
cfg.baudrate = BOARD_DEBUG_UART_BAUD;
|
||||
|
||||
console_init(&cfg);
|
||||
}
|
||||
|
||||
void board_led_init(void) {
|
||||
board_led_pins_init();
|
||||
}
|
||||
|
||||
void board_led_set(uint8_t led_id, bool state) {
|
||||
if (led_id < BOARD_LED_COUNT) {
|
||||
const board_led_t *led = &s_board_led_table[led_id];
|
||||
gpio_write_pin(led->ctl, led->index, led->pin, !state);
|
||||
}
|
||||
}
|
||||
|
||||
void board_sdram_init(void) {
|
||||
femc_config_t cfg;
|
||||
femc_sdram_config_t sdram_cfg;
|
||||
|
||||
board_sdram_pins_init();
|
||||
|
||||
clock_add_to_group(clock_femc, 0);
|
||||
clock_set_source_divider(clock_femc, clk_src_pll2_clk0, 2U);
|
||||
|
||||
femc_default_config(HPM_FEMC, &cfg);
|
||||
cfg.dqs = FEMC_DQS_INTERNAL;
|
||||
|
||||
femc_init(HPM_FEMC, &cfg);
|
||||
|
||||
sdram_cfg.bank_num = FEMC_SDRAM_BANK_NUM_4;
|
||||
sdram_cfg.prescaler = 3;
|
||||
sdram_cfg.burst_len_in_byte = 8;
|
||||
sdram_cfg.auto_refresh_count_in_one_burst = 1;
|
||||
sdram_cfg.col_addr_bits = FEMC_SDRAM_COLUMN_ADDR_9_BITS;
|
||||
sdram_cfg.cas_latency = FEMC_SDRAM_CAS_LATENCY_3;
|
||||
|
||||
sdram_cfg.precharge_to_act_in_ns = 18;
|
||||
sdram_cfg.act_to_rw_in_ns = 18;
|
||||
sdram_cfg.refresh_recover_in_ns = 72;
|
||||
sdram_cfg.write_recover_in_ns = 12;
|
||||
sdram_cfg.cke_off_in_ns = 42;
|
||||
sdram_cfg.act_to_precharge_in_ns = 42;
|
||||
|
||||
sdram_cfg.self_refresh_recover_in_ns = 72;
|
||||
sdram_cfg.refresh_recover_in_ns = 72;
|
||||
sdram_cfg.act_to_act_in_ns = 12;
|
||||
sdram_cfg.idle_timeout_in_ns = 6;
|
||||
sdram_cfg.cs_mux_pin = FEMC_IO_MUX_NOT_USED;
|
||||
|
||||
sdram_cfg.cs = FEMC_SDRAM_CS0;
|
||||
sdram_cfg.base_address = BOARD_SDRAM_BASE;
|
||||
sdram_cfg.size_in_byte = BOARD_SDRAM_SIZE;
|
||||
sdram_cfg.port_size = FEMC_SDRAM_PORT_SIZE_16_BITS;
|
||||
sdram_cfg.refresh_count = 8192;
|
||||
sdram_cfg.refresh_in_ms = 64;
|
||||
sdram_cfg.data_width_in_byte = 2;
|
||||
sdram_cfg.delay_cell_value = 29;
|
||||
|
||||
femc_config_sdram(HPM_FEMC, clock_get_frequency(clock_femc), &sdram_cfg);
|
||||
}
|
||||
|
||||
void board_lcd_init(void) {
|
||||
lcdc_config_t cfg = {0};
|
||||
/*
|
||||
* Fire 5" LCD Parameters:
|
||||
* Horizontal Resolution: 800
|
||||
* HBP: 46
|
||||
* HFP: 210 (16-354)
|
||||
* Vertical Resolution: 480
|
||||
* VBP: 23
|
||||
* VFP: 22 (7-147)
|
||||
* HSync Pulse Width: 1 (1-40) P-CLK
|
||||
* VSync Pulse Width: 1 (1-20) HSD
|
||||
*
|
||||
* Pixel Clock Frequency: 33.264MHz (@60fps, Typ.)
|
||||
*/
|
||||
|
||||
board_lcd_pins_init();
|
||||
|
||||
/* Backlight ON */
|
||||
gpio_set_pin_output_with_initial(BOARD_LCD_BLK_GPIO_CTRL, BOARD_LCD_BLK_GPIO_INDEX, BOARD_LCD_BLK_GPIO_PIN, 1U);
|
||||
|
||||
clock_add_to_group(clock_display, 0);
|
||||
clock_set_source_divider(clock_display, clk_src_pll4_clk0, 18U); /* 33.0MHz */
|
||||
|
||||
/* Bug workaround, seems clock not stable */
|
||||
clock_cpu_delay_ms(10);
|
||||
|
||||
lcdc_get_default_config(HPM_LCDC, &cfg);
|
||||
|
||||
cfg.resolution_x = BOARD_LCD_RES_H;
|
||||
cfg.resolution_y = BOARD_LCD_RES_V;
|
||||
|
||||
cfg.hsync.pulse_width = 10;
|
||||
cfg.hsync.back_porch_pulse = 46;
|
||||
cfg.hsync.front_porch_pulse = 210;
|
||||
|
||||
cfg.vsync.pulse_width = 3;
|
||||
cfg.vsync.back_porch_pulse = 23;
|
||||
cfg.vsync.front_porch_pulse = 22;
|
||||
|
||||
cfg.control.invert_hsync = false;
|
||||
cfg.control.invert_vsync = false;
|
||||
cfg.control.invert_href = false;
|
||||
cfg.control.invert_pixel_data = false;
|
||||
cfg.control.invert_pixel_clock = false;
|
||||
|
||||
lcdc_init(HPM_LCDC, &cfg);
|
||||
}
|
||||
|
||||
void board_pmp_init(void) {
|
||||
uint32_t start_addr;
|
||||
uint32_t end_addr;
|
||||
uint32_t length;
|
||||
pmp_entry_t pmp_entry[16];
|
||||
uint8_t index = 0;
|
||||
|
||||
/* Init noncachable memory */
|
||||
extern uint32_t __noncacheable_start__[];
|
||||
extern uint32_t __noncacheable_end__[];
|
||||
start_addr = (uint32_t)__noncacheable_start__;
|
||||
end_addr = (uint32_t)__noncacheable_end__;
|
||||
length = end_addr - start_addr;
|
||||
if (length > 0) {
|
||||
/* Ensure the address and the length are power of 2 aligned */
|
||||
assert((length & (length - 1U)) == 0U);
|
||||
assert((start_addr & (length - 1U)) == 0U);
|
||||
pmp_entry[index].pmp_addr = PMP_NAPOT_ADDR(start_addr, length);
|
||||
pmp_entry[index].pmp_cfg.val = PMP_CFG(READ_EN, WRITE_EN, EXECUTE_EN, ADDR_MATCH_NAPOT, REG_UNLOCK);
|
||||
pmp_entry[index].pma_addr = PMA_NAPOT_ADDR(start_addr, length);
|
||||
pmp_entry[index].pma_cfg.val = PMA_CFG(ADDR_MATCH_NAPOT, MEM_TYPE_MEM_NON_CACHE_BUF, AMO_EN);
|
||||
index++;
|
||||
}
|
||||
|
||||
/* Init share memory */
|
||||
extern uint32_t __share_mem_start__[];
|
||||
extern uint32_t __share_mem_end__[];
|
||||
start_addr = (uint32_t)__share_mem_start__;
|
||||
end_addr = (uint32_t)__share_mem_end__;
|
||||
length = end_addr - start_addr;
|
||||
if (length > 0) {
|
||||
/* Ensure the address and the length are power of 2 aligned */
|
||||
assert((length & (length - 1U)) == 0U);
|
||||
assert((start_addr & (length - 1U)) == 0U);
|
||||
pmp_entry[index].pmp_addr = PMP_NAPOT_ADDR(start_addr, length);
|
||||
pmp_entry[index].pmp_cfg.val = PMP_CFG(READ_EN, WRITE_EN, EXECUTE_EN, ADDR_MATCH_NAPOT, REG_UNLOCK);
|
||||
pmp_entry[index].pma_addr = PMA_NAPOT_ADDR(start_addr, length);
|
||||
pmp_entry[index].pma_cfg.val = PMA_CFG(ADDR_MATCH_NAPOT, MEM_TYPE_MEM_NON_CACHE_BUF, AMO_EN);
|
||||
index++;
|
||||
}
|
||||
|
||||
pmp_config(&pmp_entry[0], index);
|
||||
}
|
|
@ -0,0 +1,79 @@
|
|||
/*
|
||||
* Copyright (c) 2021-2023 HPMicro
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef HPM_BOARD_H
|
||||
#define HPM_BOARD_H
|
||||
#include <stdio.h>
|
||||
|
||||
/* SDK drivers */
|
||||
#include "hpm_clock_drv.h"
|
||||
#include "hpm_common.h"
|
||||
#include "hpm_gpio_drv.h"
|
||||
#include "hpm_soc.h"
|
||||
#include "hpm_soc_feature.h"
|
||||
|
||||
/* Debug Console */
|
||||
#include "hpm_debug_console.h"
|
||||
|
||||
/* Board */
|
||||
#include "pinmux.h"
|
||||
|
||||
#define BOARD_CPU_FREQ (648000000UL)
|
||||
#define BOARD_CORE_VOLTAGE_MV (1200UL)
|
||||
|
||||
#define BOARD_DEBUG_UART_BAUD (115200UL)
|
||||
|
||||
#define BOARD_LED_COUNT 3
|
||||
|
||||
#define BOARD_LED0_GPIO_CTRL HPM_GPIO0
|
||||
#define BOARD_LED1_GPIO_CTRL HPM_GPIO0
|
||||
#define BOARD_LED2_GPIO_CTRL HPM_GPIO0
|
||||
|
||||
#define BOARD_LED0_GPIO_INDEX GPIO_DI_GPIOB
|
||||
#define BOARD_LED1_GPIO_INDEX GPIO_DI_GPIOB
|
||||
#define BOARD_LED2_GPIO_INDEX GPIO_DI_GPIOB
|
||||
|
||||
#define BOARD_LED0_GPIO_PIN 29
|
||||
#define BOARD_LED1_GPIO_PIN 30
|
||||
#define BOARD_LED2_GPIO_PIN 31
|
||||
|
||||
#define BOARD_LED_GPIO_CTRL BOARD_LED0_GPIO_CTRL
|
||||
#define BOARD_LED_GPIO_INDEX BOARD_LED0_GPIO_INDEX
|
||||
#define BOARD_LED_GPIO_PIN BOARD_LED0_GPIO_PIN
|
||||
|
||||
#define BOARD_SDRAM_BASE (0x40000000U)
|
||||
#define BOARD_SDRAM_SIZE (32 * SIZE_1MB)
|
||||
|
||||
#define BOARD_LCD_RES_H (800U)
|
||||
#define BOARD_LCD_RES_V (480U)
|
||||
|
||||
#define BOARD_LCD_BLK_GPIO_CTRL HPM_GPIO0
|
||||
#define BOARD_LCD_BLK_GPIO_INDEX GPIO_DI_GPIOB
|
||||
#define BOARD_LCD_BLK_GPIO_PIN 23
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
void board_init(void);
|
||||
void board_clock_init(void);
|
||||
|
||||
void board_debug_console_init(void);
|
||||
|
||||
void board_led_init(void);
|
||||
void board_led_set(uint8_t led_id, bool state);
|
||||
|
||||
void board_sdram_init(void);
|
||||
|
||||
void board_lcd_init(void);
|
||||
|
||||
void board_pmp_init(void);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
#endif /* HPM_BOARD_H */
|
|
@ -0,0 +1,111 @@
|
|||
/*
|
||||
* Copyright (c) 2021-2022 HPMicro
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*
|
||||
*/
|
||||
|
||||
#include "board.h"
|
||||
|
||||
void board_debug_uart_pins_init(void) {
|
||||
HPM_IOC->PAD[IOC_PAD_PY07].FUNC_CTL = IOC_PY07_FUNC_CTL_UART0_RXD;
|
||||
HPM_IOC->PAD[IOC_PAD_PY06].FUNC_CTL = IOC_PY06_FUNC_CTL_UART0_TXD;
|
||||
/* PY port IO needs to configure PIOC as well */
|
||||
HPM_PIOC->PAD[IOC_PAD_PY07].FUNC_CTL = IOC_PY06_FUNC_CTL_SOC_PY_06;
|
||||
HPM_PIOC->PAD[IOC_PAD_PY06].FUNC_CTL = IOC_PY07_FUNC_CTL_SOC_PY_07;
|
||||
}
|
||||
|
||||
void board_led_pins_init(void) {
|
||||
HPM_IOC->PAD[IOC_PAD_PB29].FUNC_CTL = IOC_PB29_FUNC_CTL_GPIO_B_29;
|
||||
HPM_IOC->PAD[IOC_PAD_PB30].FUNC_CTL = IOC_PB30_FUNC_CTL_GPIO_B_30;
|
||||
HPM_IOC->PAD[IOC_PAD_PB31].FUNC_CTL = IOC_PB31_FUNC_CTL_GPIO_B_31;
|
||||
|
||||
gpio_set_pin_output_with_initial(BOARD_LED0_GPIO_CTRL, BOARD_LED0_GPIO_INDEX, BOARD_LED0_GPIO_PIN, 1U);
|
||||
gpio_set_pin_output_with_initial(BOARD_LED1_GPIO_CTRL, BOARD_LED1_GPIO_INDEX, BOARD_LED1_GPIO_PIN, 1U);
|
||||
gpio_set_pin_output_with_initial(BOARD_LED2_GPIO_CTRL, BOARD_LED2_GPIO_INDEX, BOARD_LED2_GPIO_PIN, 1U);
|
||||
}
|
||||
|
||||
void board_sdram_pins_init(void) {
|
||||
HPM_IOC->PAD[IOC_PAD_PC08].FUNC_CTL = IOC_PC08_FUNC_CTL_FEMC_A_00;
|
||||
HPM_IOC->PAD[IOC_PAD_PC09].FUNC_CTL = IOC_PC09_FUNC_CTL_FEMC_A_01;
|
||||
HPM_IOC->PAD[IOC_PAD_PC04].FUNC_CTL = IOC_PC04_FUNC_CTL_FEMC_A_02;
|
||||
HPM_IOC->PAD[IOC_PAD_PC05].FUNC_CTL = IOC_PC05_FUNC_CTL_FEMC_A_03;
|
||||
HPM_IOC->PAD[IOC_PAD_PC06].FUNC_CTL = IOC_PC06_FUNC_CTL_FEMC_A_04;
|
||||
HPM_IOC->PAD[IOC_PAD_PC07].FUNC_CTL = IOC_PC07_FUNC_CTL_FEMC_A_05;
|
||||
HPM_IOC->PAD[IOC_PAD_PC10].FUNC_CTL = IOC_PC10_FUNC_CTL_FEMC_A_06;
|
||||
HPM_IOC->PAD[IOC_PAD_PC11].FUNC_CTL = IOC_PC11_FUNC_CTL_FEMC_A_07;
|
||||
HPM_IOC->PAD[IOC_PAD_PC12].FUNC_CTL = IOC_PC12_FUNC_CTL_FEMC_A_08;
|
||||
HPM_IOC->PAD[IOC_PAD_PC17].FUNC_CTL = IOC_PC17_FUNC_CTL_FEMC_A_09;
|
||||
HPM_IOC->PAD[IOC_PAD_PC15].FUNC_CTL = IOC_PC15_FUNC_CTL_FEMC_A_10;
|
||||
HPM_IOC->PAD[IOC_PAD_PC21].FUNC_CTL = IOC_PC21_FUNC_CTL_FEMC_A_11;
|
||||
HPM_IOC->PAD[IOC_PAD_PC22].FUNC_CTL = IOC_PC22_FUNC_CTL_FEMC_A_12;
|
||||
|
||||
HPM_IOC->PAD[IOC_PAD_PD08].FUNC_CTL = IOC_PD08_FUNC_CTL_FEMC_DQ_00;
|
||||
HPM_IOC->PAD[IOC_PAD_PD05].FUNC_CTL = IOC_PD05_FUNC_CTL_FEMC_DQ_01;
|
||||
HPM_IOC->PAD[IOC_PAD_PD00].FUNC_CTL = IOC_PD00_FUNC_CTL_FEMC_DQ_02;
|
||||
HPM_IOC->PAD[IOC_PAD_PD01].FUNC_CTL = IOC_PD01_FUNC_CTL_FEMC_DQ_03;
|
||||
HPM_IOC->PAD[IOC_PAD_PD02].FUNC_CTL = IOC_PD02_FUNC_CTL_FEMC_DQ_04;
|
||||
HPM_IOC->PAD[IOC_PAD_PC27].FUNC_CTL = IOC_PC27_FUNC_CTL_FEMC_DQ_05;
|
||||
HPM_IOC->PAD[IOC_PAD_PC28].FUNC_CTL = IOC_PC28_FUNC_CTL_FEMC_DQ_06;
|
||||
HPM_IOC->PAD[IOC_PAD_PC29].FUNC_CTL = IOC_PC29_FUNC_CTL_FEMC_DQ_07;
|
||||
HPM_IOC->PAD[IOC_PAD_PD04].FUNC_CTL = IOC_PD04_FUNC_CTL_FEMC_DQ_08;
|
||||
HPM_IOC->PAD[IOC_PAD_PD03].FUNC_CTL = IOC_PD03_FUNC_CTL_FEMC_DQ_09;
|
||||
HPM_IOC->PAD[IOC_PAD_PD07].FUNC_CTL = IOC_PD07_FUNC_CTL_FEMC_DQ_10;
|
||||
HPM_IOC->PAD[IOC_PAD_PD06].FUNC_CTL = IOC_PD06_FUNC_CTL_FEMC_DQ_11;
|
||||
HPM_IOC->PAD[IOC_PAD_PD10].FUNC_CTL = IOC_PD10_FUNC_CTL_FEMC_DQ_12;
|
||||
HPM_IOC->PAD[IOC_PAD_PD09].FUNC_CTL = IOC_PD09_FUNC_CTL_FEMC_DQ_13;
|
||||
HPM_IOC->PAD[IOC_PAD_PD13].FUNC_CTL = IOC_PD13_FUNC_CTL_FEMC_DQ_14;
|
||||
HPM_IOC->PAD[IOC_PAD_PD12].FUNC_CTL = IOC_PD12_FUNC_CTL_FEMC_DQ_15;
|
||||
|
||||
HPM_IOC->PAD[IOC_PAD_PC13].FUNC_CTL = IOC_PC13_FUNC_CTL_FEMC_BA0;
|
||||
HPM_IOC->PAD[IOC_PAD_PC14].FUNC_CTL = IOC_PC14_FUNC_CTL_FEMC_BA1;
|
||||
|
||||
HPM_IOC->PAD[IOC_PAD_PC18].FUNC_CTL = IOC_PC18_FUNC_CTL_FEMC_RAS;
|
||||
HPM_IOC->PAD[IOC_PAD_PC23].FUNC_CTL = IOC_PC23_FUNC_CTL_FEMC_CAS;
|
||||
HPM_IOC->PAD[IOC_PAD_PC24].FUNC_CTL = IOC_PC24_FUNC_CTL_FEMC_WE;
|
||||
HPM_IOC->PAD[IOC_PAD_PC19].FUNC_CTL = IOC_PC19_FUNC_CTL_FEMC_CS_0;
|
||||
|
||||
HPM_IOC->PAD[IOC_PAD_PC30].FUNC_CTL = IOC_PC30_FUNC_CTL_FEMC_DM_0;
|
||||
HPM_IOC->PAD[IOC_PAD_PC31].FUNC_CTL = IOC_PC31_FUNC_CTL_FEMC_DM_1;
|
||||
|
||||
HPM_IOC->PAD[IOC_PAD_PC26].FUNC_CTL = IOC_PC26_FUNC_CTL_FEMC_CLK;
|
||||
HPM_IOC->PAD[IOC_PAD_PC25].FUNC_CTL = IOC_PC25_FUNC_CTL_FEMC_CKE;
|
||||
HPM_IOC->PAD[IOC_PAD_PC16].FUNC_CTL = IOC_PC16_FUNC_CTL_FEMC_DQS | IOC_PAD_FUNC_CTL_LOOP_BACK_MASK;
|
||||
}
|
||||
|
||||
void board_lcd_pins_init(void) {
|
||||
HPM_IOC->PAD[IOC_PAD_PB03].FUNC_CTL = IOC_PB03_FUNC_CTL_DIS0_R_0;
|
||||
HPM_IOC->PAD[IOC_PAD_PB04].FUNC_CTL = IOC_PB04_FUNC_CTL_DIS0_R_1;
|
||||
HPM_IOC->PAD[IOC_PAD_PB00].FUNC_CTL = IOC_PB00_FUNC_CTL_DIS0_R_2;
|
||||
HPM_IOC->PAD[IOC_PAD_PA31].FUNC_CTL = IOC_PA31_FUNC_CTL_DIS0_R_3;
|
||||
HPM_IOC->PAD[IOC_PAD_PA26].FUNC_CTL = IOC_PA26_FUNC_CTL_DIS0_R_4;
|
||||
HPM_IOC->PAD[IOC_PAD_PA21].FUNC_CTL = IOC_PA21_FUNC_CTL_DIS0_R_5;
|
||||
HPM_IOC->PAD[IOC_PAD_PA27].FUNC_CTL = IOC_PA27_FUNC_CTL_DIS0_R_6;
|
||||
HPM_IOC->PAD[IOC_PAD_PA28].FUNC_CTL = IOC_PA28_FUNC_CTL_DIS0_R_7;
|
||||
|
||||
HPM_IOC->PAD[IOC_PAD_PB06].FUNC_CTL = IOC_PB06_FUNC_CTL_DIS0_G_0;
|
||||
HPM_IOC->PAD[IOC_PAD_PB01].FUNC_CTL = IOC_PB01_FUNC_CTL_DIS0_G_1;
|
||||
HPM_IOC->PAD[IOC_PAD_PA22].FUNC_CTL = IOC_PA22_FUNC_CTL_DIS0_G_2;
|
||||
HPM_IOC->PAD[IOC_PAD_PA23].FUNC_CTL = IOC_PA23_FUNC_CTL_DIS0_G_3;
|
||||
HPM_IOC->PAD[IOC_PAD_PA29].FUNC_CTL = IOC_PA29_FUNC_CTL_DIS0_G_4;
|
||||
HPM_IOC->PAD[IOC_PAD_PA24].FUNC_CTL = IOC_PA24_FUNC_CTL_DIS0_G_5;
|
||||
HPM_IOC->PAD[IOC_PAD_PA30].FUNC_CTL = IOC_PA30_FUNC_CTL_DIS0_G_6;
|
||||
HPM_IOC->PAD[IOC_PAD_PA25].FUNC_CTL = IOC_PA25_FUNC_CTL_DIS0_G_7;
|
||||
|
||||
HPM_IOC->PAD[IOC_PAD_PB05].FUNC_CTL = IOC_PB05_FUNC_CTL_DIS0_B_0;
|
||||
HPM_IOC->PAD[IOC_PAD_PB07].FUNC_CTL = IOC_PB07_FUNC_CTL_DIS0_B_1;
|
||||
HPM_IOC->PAD[IOC_PAD_PB02].FUNC_CTL = IOC_PB02_FUNC_CTL_DIS0_B_2;
|
||||
HPM_IOC->PAD[IOC_PAD_PA16].FUNC_CTL = IOC_PA16_FUNC_CTL_DIS0_B_3;
|
||||
HPM_IOC->PAD[IOC_PAD_PA12].FUNC_CTL = IOC_PA12_FUNC_CTL_DIS0_B_4;
|
||||
HPM_IOC->PAD[IOC_PAD_PA17].FUNC_CTL = IOC_PA17_FUNC_CTL_DIS0_B_5;
|
||||
HPM_IOC->PAD[IOC_PAD_PA13].FUNC_CTL = IOC_PA13_FUNC_CTL_DIS0_B_6;
|
||||
HPM_IOC->PAD[IOC_PAD_PA18].FUNC_CTL = IOC_PA18_FUNC_CTL_DIS0_B_7;
|
||||
|
||||
HPM_IOC->PAD[IOC_PAD_PA20].FUNC_CTL = IOC_PA20_FUNC_CTL_DIS0_CLK;
|
||||
HPM_IOC->PAD[IOC_PAD_PA15].FUNC_CTL = IOC_PA15_FUNC_CTL_DIS0_EN;
|
||||
|
||||
HPM_IOC->PAD[IOC_PAD_PA19].FUNC_CTL = IOC_PA19_FUNC_CTL_DIS0_HSYNC;
|
||||
HPM_IOC->PAD[IOC_PAD_PA14].FUNC_CTL = IOC_PA14_FUNC_CTL_DIS0_VSYNC;
|
||||
|
||||
HPM_IOC->PAD[IOC_PAD_PB23].FUNC_CTL = IOC_PB23_FUNC_CTL_GPIO_B_23; /* Backlight */
|
||||
}
|
|
@ -0,0 +1,24 @@
|
|||
/*
|
||||
* Copyright (c) 2021 HPMicro
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef HPM_PINMUX_H
|
||||
#define HPM_PINMUX_H
|
||||
#include "hpm_soc.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
void board_debug_uart_pins_init(void);
|
||||
void board_led_pins_init(void);
|
||||
void board_sdram_pins_init(void);
|
||||
void board_lcd_pins_init(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif /* HPM_PINMUX_H */
|
|
@ -0,0 +1,18 @@
|
|||
__attribute__((weak)) int _close(int file) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
__attribute__((weak)) int _isatty(int file) {
|
||||
return 1;
|
||||
}
|
||||
|
||||
__attribute__((weak)) int _lseek(int file, int ptr, int dir) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
__attribute__((weak)) void _kill(int pid, int sig) {
|
||||
}
|
||||
|
||||
__attribute__((weak)) int _getpid(void) {
|
||||
return -1;
|
||||
}
|
|
@ -0,0 +1,63 @@
|
|||
#include <stdint.h>
|
||||
|
||||
/**
|
||||
* @brief FLASH configuration option definitions:
|
||||
* option[0]:
|
||||
* [31:16] 0xfcf9 - FLASH configuration option tag
|
||||
* [15:4] 0 - Reserved
|
||||
* [3:0] option words (exclude option[0])
|
||||
* option[1]:
|
||||
* [31:28] Flash probe type
|
||||
* 0 - SFDP SDR / 1 - SFDP DDR
|
||||
* 2 - 1-4-4 Read (0xEB, 24-bit address) / 3 - 1-2-2 Read(0xBB, 24-bit address)
|
||||
* 4 - HyperFLASH 1.8V / 5 - HyperFLASH 3V
|
||||
* 6 - OctaBus DDR (SPI -> OPI DDR)
|
||||
* 8 - Xccela DDR (SPI -> OPI DDR)
|
||||
* 10 - EcoXiP DDR (SPI -> OPI DDR)
|
||||
* [27:24] Command Pads after Power-on Reset
|
||||
* 0 - SPI / 1 - DPI / 2 - QPI / 3 - OPI
|
||||
* [23:20] Command Pads after Configuring FLASH
|
||||
* 0 - SPI / 1 - DPI / 2 - QPI / 3 - OPI
|
||||
* [19:16] Quad Enable Sequence (for the device support SFDP 1.0 only)
|
||||
* 0 - Not needed
|
||||
* 1 - QE bit is at bit 6 in Status Register 1
|
||||
* 2 - QE bit is at bit1 in Status Register 2
|
||||
* 3 - QE bit is at bit7 in Status Register 2
|
||||
* 4 - QE bit is at bit1 in Status Register 2 and should be programmed by 0x31
|
||||
* [15:8] Dummy cycles
|
||||
* 0 - Auto-probed / detected / default value
|
||||
* Others - User specified value, for DDR read, the dummy cycles should be 2 * cycles on FLASH datasheet
|
||||
* [7:4] Misc.
|
||||
* 0 - Not used
|
||||
* 1 - SPI mode
|
||||
* 2 - Internal loopback
|
||||
* 3 - External DQS
|
||||
* [3:0] Frequency option
|
||||
* 1 - 30MHz / 2 - 50MHz / 3 - 66MHz / 4 - 80MHz / 5 - 100MHz / 6 - 120MHz / 7 - 133MHz / 8 - 166MHz
|
||||
*
|
||||
* option[2] (Effective only if the bit[3:0] in option[0] > 1)
|
||||
* [31:20] Reserved
|
||||
* [19:16] IO voltage
|
||||
* 0 - 3V / 1 - 1.8V
|
||||
* [15:12] Pin group
|
||||
* 0 - 1st group / 1 - 2nd group
|
||||
* [11:8] Connection selection
|
||||
* 0 - CA_CS0 / 1 - CB_CS0 / 2 - CA_CS0 + CB_CS0 (Two FLASH connected to CA and CB respectively)
|
||||
* [7:0] Drive Strength
|
||||
* 0 - Default value
|
||||
* option[3] (Effective only if the bit[3:0] in option[0] > 2, required only for the QSPI NOR FLASH that not supports
|
||||
* JESD216)
|
||||
* [31:16] reserved
|
||||
* [15:12] Sector Erase Command Option, not required here
|
||||
* [11:8] Sector Size Option, not required here
|
||||
* [7:0] Flash Size Option
|
||||
* 0 - 4MB / 1 - 8MB / 2 - 16MB
|
||||
*/
|
||||
#if defined(FLASH_XIP) && FLASH_XIP
|
||||
__attribute__((section(".nor_cfg_option"))) const uint32_t option[4] = {
|
||||
0xfcf90001,
|
||||
0x00000007,
|
||||
0x00000000,
|
||||
0x00000000,
|
||||
};
|
||||
#endif
|
|
@ -0,0 +1,17 @@
|
|||
# Poor old Windows...
|
||||
if(WIN32)
|
||||
set(CMAKE_SYSTEM_NAME "Generic")
|
||||
endif()
|
||||
|
||||
set(CMAKE_C_COMPILER riscv32-elf-gcc)
|
||||
set(CMAKE_CXX_COMPILER riscv32-elf-g++)
|
||||
|
||||
# Optionally set size binary name, for elf section size reporting.
|
||||
set(TARGET_TOOLCHAIN_SIZE riscv32-elf-size)
|
||||
|
||||
set(CMAKE_C_FLAGS_INIT "-march=rv32imafdcxandes -mabi=ilp32d")
|
||||
set(CMAKE_CXX_FLAGS_INIT "-march=rv32imafdcxandes -mabi=ilp32d")
|
||||
set(CMAKE_EXE_LINKER_FLAGS_INIT "-specs=nosys.specs -Wl,--print-memory-usage -nostartfiles")
|
||||
|
||||
# Make CMake happy about those compilers
|
||||
set(CMAKE_TRY_COMPILE_TARGET_TYPE "STATIC_LIBRARY")
|
|
@ -0,0 +1,19 @@
|
|||
#include <stdio.h>
|
||||
|
||||
/* Board */
|
||||
#include "board.h"
|
||||
#include "hpm_debug_console.h"
|
||||
|
||||
int main(void) {
|
||||
board_init();
|
||||
|
||||
printf("Hello HPM!\n");
|
||||
|
||||
board_led_set(0, true);
|
||||
|
||||
for (;;) {
|
||||
WFI();
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
Loading…
Reference in New Issue