BOARD: Enabled SDRAM.
continuous-integration/drone/push Build is passing Details

Signed-off-by: Yilin Sun <imi415@imi.moe>
This commit is contained in:
Yilin Sun 2023-09-17 13:49:47 +08:00
parent 183c96a1a1
commit c61e94e3b7
Signed by: imi415
GPG Key ID: 17F01E106F9F5E0A
4 changed files with 104 additions and 1 deletions

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@ -1,5 +1,6 @@
/* SDK drivers */
#include "hpm_clock_drv.h"
#include "hpm_femc_drv.h"
#include "hpm_i2c_drv.h"
#include "hpm_pcfg_drv.h"
#include "hpm_pllctl_drv.h"
@ -28,6 +29,8 @@ void board_init(void) {
board_debug_console_init();
board_led_init();
board_sdram_init();
board_pmp_init();
}
@ -44,7 +47,7 @@ void board_clock_init(void) {
/* Update DCDC voltage */
pcfg_dcdc_set_voltage(HPM_PCFG, BOARD_CORE_VOLTAGE_MV);
if (pllctl_init_int_pll_with_freq(HPM_PLLCTL, 0, BOARD_CPU_FREQ) != status_success) {
if (pllctl_init_int_pll_with_freq(HPM_PLLCTL, PLLCTL_PLL_PLL0, BOARD_CPU_FREQ) != status_success) {
for (;;) {
WFI();
}
@ -82,6 +85,52 @@ void board_led_set(uint8_t led_id, bool state) {
}
}
void board_sdram_init(void) {
femc_config_t cfg;
femc_sdram_config_t sdram_cfg;
board_sdram_pins_init();
clock_set_source_divider(clock_femc, clk_src_pll2_clk0, 2U);
clock_add_to_group(clock_femc, 0);
femc_default_config(HPM_FEMC, &cfg);
cfg.dqs = FEMC_DQS_INTERNAL;
femc_init(HPM_FEMC, &cfg);
sdram_cfg.bank_num = FEMC_SDRAM_BANK_NUM_4;
sdram_cfg.prescaler = 3;
sdram_cfg.burst_len_in_byte = 8;
sdram_cfg.auto_refresh_count_in_one_burst = 1;
sdram_cfg.col_addr_bits = FEMC_SDRAM_COLUMN_ADDR_9_BITS;
sdram_cfg.cas_latency = FEMC_SDRAM_CAS_LATENCY_3;
sdram_cfg.precharge_to_act_in_ns = 18;
sdram_cfg.act_to_rw_in_ns = 18;
sdram_cfg.refresh_recover_in_ns = 72;
sdram_cfg.write_recover_in_ns = 12;
sdram_cfg.cke_off_in_ns = 42;
sdram_cfg.act_to_precharge_in_ns = 42;
sdram_cfg.self_refresh_recover_in_ns = 72;
sdram_cfg.refresh_recover_in_ns = 72;
sdram_cfg.act_to_act_in_ns = 12;
sdram_cfg.idle_timeout_in_ns = 6;
sdram_cfg.cs_mux_pin = FEMC_IO_MUX_NOT_USED;
sdram_cfg.cs = FEMC_SDRAM_CS0;
sdram_cfg.base_address = BOARD_SDRAM_BASE;
sdram_cfg.size_in_byte = BOARD_SDRAM_SIZE;
sdram_cfg.port_size = FEMC_SDRAM_PORT_SIZE_16_BITS;
sdram_cfg.refresh_count = 8192;
sdram_cfg.refresh_in_ms = 64;
sdram_cfg.data_width_in_byte = 2;
sdram_cfg.delay_cell_value = 29;
femc_config_sdram(HPM_FEMC, clock_get_frequency(clock_femc), &sdram_cfg);
}
void board_pmp_init(void) {
uint32_t start_addr;
uint32_t end_addr;

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@ -45,6 +45,9 @@
#define BOARD_LED_GPIO_INDEX BOARD_LED0_GPIO_INDEX
#define BOARD_LED_GPIO_PIN BOARD_LED0_GPIO_PIN
#define BOARD_SDRAM_BASE (0x40000000U)
#define BOARD_SDRAM_SIZE (32 * SIZE_1MB)
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus */
@ -57,6 +60,8 @@ void board_debug_console_init(void);
void board_led_init(void);
void board_led_set(uint8_t led_id, bool state);
void board_sdram_init(void);
void board_pmp_init(void);
#if defined(__cplusplus)

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@ -23,4 +23,52 @@ void board_led_pins_init(void) {
gpio_set_pin_output_with_initial(BOARD_LED0_GPIO_CTRL, BOARD_LED0_GPIO_INDEX, BOARD_LED0_GPIO_PIN, 1U);
gpio_set_pin_output_with_initial(BOARD_LED1_GPIO_CTRL, BOARD_LED1_GPIO_INDEX, BOARD_LED1_GPIO_PIN, 1U);
gpio_set_pin_output_with_initial(BOARD_LED2_GPIO_CTRL, BOARD_LED2_GPIO_INDEX, BOARD_LED2_GPIO_PIN, 1U);
}
void board_sdram_pins_init(void) {
HPM_IOC->PAD[IOC_PAD_PC08].FUNC_CTL = IOC_PC08_FUNC_CTL_FEMC_A_00;
HPM_IOC->PAD[IOC_PAD_PC09].FUNC_CTL = IOC_PC09_FUNC_CTL_FEMC_A_01;
HPM_IOC->PAD[IOC_PAD_PC04].FUNC_CTL = IOC_PC04_FUNC_CTL_FEMC_A_02;
HPM_IOC->PAD[IOC_PAD_PC05].FUNC_CTL = IOC_PC05_FUNC_CTL_FEMC_A_03;
HPM_IOC->PAD[IOC_PAD_PC06].FUNC_CTL = IOC_PC06_FUNC_CTL_FEMC_A_04;
HPM_IOC->PAD[IOC_PAD_PC07].FUNC_CTL = IOC_PC07_FUNC_CTL_FEMC_A_05;
HPM_IOC->PAD[IOC_PAD_PC10].FUNC_CTL = IOC_PC10_FUNC_CTL_FEMC_A_06;
HPM_IOC->PAD[IOC_PAD_PC11].FUNC_CTL = IOC_PC11_FUNC_CTL_FEMC_A_07;
HPM_IOC->PAD[IOC_PAD_PC12].FUNC_CTL = IOC_PC12_FUNC_CTL_FEMC_A_08;
HPM_IOC->PAD[IOC_PAD_PC17].FUNC_CTL = IOC_PC17_FUNC_CTL_FEMC_A_09;
HPM_IOC->PAD[IOC_PAD_PC15].FUNC_CTL = IOC_PC15_FUNC_CTL_FEMC_A_10;
HPM_IOC->PAD[IOC_PAD_PC21].FUNC_CTL = IOC_PC21_FUNC_CTL_FEMC_A_11;
HPM_IOC->PAD[IOC_PAD_PC22].FUNC_CTL = IOC_PC22_FUNC_CTL_FEMC_A_12;
HPM_IOC->PAD[IOC_PAD_PD08].FUNC_CTL = IOC_PD08_FUNC_CTL_FEMC_DQ_00;
HPM_IOC->PAD[IOC_PAD_PD05].FUNC_CTL = IOC_PD05_FUNC_CTL_FEMC_DQ_01;
HPM_IOC->PAD[IOC_PAD_PD00].FUNC_CTL = IOC_PD00_FUNC_CTL_FEMC_DQ_02;
HPM_IOC->PAD[IOC_PAD_PD01].FUNC_CTL = IOC_PD01_FUNC_CTL_FEMC_DQ_03;
HPM_IOC->PAD[IOC_PAD_PD02].FUNC_CTL = IOC_PD02_FUNC_CTL_FEMC_DQ_04;
HPM_IOC->PAD[IOC_PAD_PC27].FUNC_CTL = IOC_PC27_FUNC_CTL_FEMC_DQ_05;
HPM_IOC->PAD[IOC_PAD_PC28].FUNC_CTL = IOC_PC28_FUNC_CTL_FEMC_DQ_06;
HPM_IOC->PAD[IOC_PAD_PC29].FUNC_CTL = IOC_PC29_FUNC_CTL_FEMC_DQ_07;
HPM_IOC->PAD[IOC_PAD_PD04].FUNC_CTL = IOC_PD04_FUNC_CTL_FEMC_DQ_08;
HPM_IOC->PAD[IOC_PAD_PD03].FUNC_CTL = IOC_PD03_FUNC_CTL_FEMC_DQ_09;
HPM_IOC->PAD[IOC_PAD_PD07].FUNC_CTL = IOC_PD07_FUNC_CTL_FEMC_DQ_10;
HPM_IOC->PAD[IOC_PAD_PD06].FUNC_CTL = IOC_PD06_FUNC_CTL_FEMC_DQ_11;
HPM_IOC->PAD[IOC_PAD_PD10].FUNC_CTL = IOC_PD10_FUNC_CTL_FEMC_DQ_12;
HPM_IOC->PAD[IOC_PAD_PD09].FUNC_CTL = IOC_PD09_FUNC_CTL_FEMC_DQ_13;
HPM_IOC->PAD[IOC_PAD_PD13].FUNC_CTL = IOC_PD13_FUNC_CTL_FEMC_DQ_14;
HPM_IOC->PAD[IOC_PAD_PD12].FUNC_CTL = IOC_PD12_FUNC_CTL_FEMC_DQ_15;
HPM_IOC->PAD[IOC_PAD_PC13].FUNC_CTL = IOC_PC13_FUNC_CTL_FEMC_BA0;
HPM_IOC->PAD[IOC_PAD_PC14].FUNC_CTL = IOC_PC14_FUNC_CTL_FEMC_BA1;
HPM_IOC->PAD[IOC_PAD_PC18].FUNC_CTL = IOC_PC18_FUNC_CTL_FEMC_RAS;
HPM_IOC->PAD[IOC_PAD_PC23].FUNC_CTL = IOC_PC23_FUNC_CTL_FEMC_CAS;
HPM_IOC->PAD[IOC_PAD_PC24].FUNC_CTL = IOC_PC24_FUNC_CTL_FEMC_WE;
HPM_IOC->PAD[IOC_PAD_PC19].FUNC_CTL = IOC_PC19_FUNC_CTL_FEMC_CS_0;
HPM_IOC->PAD[IOC_PAD_PC30].FUNC_CTL = IOC_PC30_FUNC_CTL_FEMC_DM_0;
HPM_IOC->PAD[IOC_PAD_PC31].FUNC_CTL = IOC_PC31_FUNC_CTL_FEMC_DM_1;
HPM_IOC->PAD[IOC_PAD_PC26].FUNC_CTL = IOC_PC26_FUNC_CTL_FEMC_CLK;
HPM_IOC->PAD[IOC_PAD_PC25].FUNC_CTL = IOC_PC25_FUNC_CTL_FEMC_CKE;
HPM_IOC->PAD[IOC_PAD_PC16].FUNC_CTL = IOC_PC16_FUNC_CTL_FEMC_DQS | IOC_PAD_FUNC_CTL_LOOP_BACK_MASK;
}

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@ -15,6 +15,7 @@ extern "C" {
void board_debug_uart_pins_init(void);
void board_led_pins_init(void);
void board_sdram_pins_init(void);
#ifdef __cplusplus
}