194 lines
8.3 KiB
C
194 lines
8.3 KiB
C
/*
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* Copyright 2020-2022 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "sdmmc_config.h"
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#include "fsl_iomuxc.h"
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*******************************************************************************
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* Prototypes
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******************************************************************************/
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void BOARD_SDCardPowerControl(bool enable);
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/*******************************************************************************
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* Variables
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******************************************************************************/
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/*!brief sdmmc dma buffer */
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AT_NONCACHEABLE_SECTION_ALIGN(static uint32_t s_sdmmcHostDmaBuffer[BOARD_SDMMC_HOST_DMA_DESCRIPTOR_BUFFER_SIZE],
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SDMMCHOST_DMA_DESCRIPTOR_BUFFER_ALIGN_SIZE);
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#if defined SDMMCHOST_ENABLE_CACHE_LINE_ALIGN_TRANSFER && SDMMCHOST_ENABLE_CACHE_LINE_ALIGN_TRANSFER
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/* two cache line length for sdmmc host driver maintain unalign transfer */
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SDK_ALIGN(static uint8_t s_sdmmcCacheLineAlignBuffer[BOARD_SDMMC_DATA_BUFFER_ALIGN_SIZE * 2U],
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BOARD_SDMMC_DATA_BUFFER_ALIGN_SIZE);
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#endif
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#if defined(SDIO_ENABLED) || defined(SD_ENABLED)
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static sd_detect_card_t s_cd;
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static sd_io_voltage_t s_ioVoltage = {
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.type = BOARD_SDMMC_SD_IO_VOLTAGE_CONTROL_TYPE,
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.func = NULL,
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};
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#endif
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static sdmmchost_t s_host;
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#ifdef SDIO_ENABLED
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static sdio_card_int_t s_sdioInt;
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#endif
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GPIO_HANDLE_DEFINE(s_CardDetectGpioHandle);
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GPIO_HANDLE_DEFINE(s_PowerResetGpioHandle);
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/*******************************************************************************
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* Code
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******************************************************************************/
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uint32_t BOARD_USDHC1ClockConfiguration(void) {
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CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClock500MHz);
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/*configure system pll PFD0 fractional divider to 24, output clock is 528MHZ * 18 / 24 = 396 MHZ*/
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CLOCK_InitSysPfd(kCLOCK_Pfd0, 24U);
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/* Configure USDHC clock source and divider */
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CLOCK_SetDiv(kCLOCK_Usdhc1Div, 1U); /* USDHC clock root frequency maximum: 198MHZ */
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CLOCK_SetMux(kCLOCK_Usdhc1Mux, 1U);
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return 396000000U / 2U;
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}
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#if defined(SDIO_ENABLED) || defined(SD_ENABLED)
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bool BOARD_SDCardGetDetectStatus(void) {
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uint8_t pinState;
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if (HAL_GpioGetInput(s_CardDetectGpioHandle, &pinState) == kStatus_HAL_GpioSuccess) {
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if (pinState == BOARD_SDMMC_SD_CD_INSERT_LEVEL) {
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return true;
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}
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}
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return false;
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}
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void BOARD_SDCardDAT3PullFunction(uint32_t status) {
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if (status == kSD_DAT3PullDown) {
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IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_01_USDHC1_DATA3,
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IOMUXC_SW_PAD_CTL_PAD_SPEED(1) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |
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IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |
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IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(0) |
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IOMUXC_SW_PAD_CTL_PAD_DSE(1));
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} else {
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IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_01_USDHC1_DATA3,
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IOMUXC_SW_PAD_CTL_PAD_SPEED(1) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |
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IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |
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IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |
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IOMUXC_SW_PAD_CTL_PAD_DSE(1));
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}
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}
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void BOARD_SDCardDetectInit(sd_cd_t cd, void *userData) {
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/* install card detect callback */
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s_cd.cdDebounce_ms = BOARD_SDMMC_SD_CARD_DETECT_DEBOUNCE_DELAY_MS;
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s_cd.type = BOARD_SDMMC_SD_CD_TYPE;
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s_cd.cardDetected = BOARD_SDCardGetDetectStatus;
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s_cd.callback = cd;
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s_cd.userData = userData;
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s_cd.dat3PullFunc = BOARD_SDCardDAT3PullFunction;
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/* make sure the card is power on for DAT3 pull up */
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BOARD_SDCardPowerControl(true);
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}
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void BOARD_SDCardPowerResetInit(void) {
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hal_gpio_pin_config_t sw_config = {
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kHAL_GpioDirectionOut,
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0,
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BOARD_SDMMC_SD_POWER_RESET_GPIO_PORT,
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BOARD_SDMMC_SD_POWER_RESET_GPIO_PIN,
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};
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HAL_GpioInit(s_PowerResetGpioHandle, &sw_config);
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}
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void BOARD_SDCardPowerControl(bool enable) {
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if (enable) {
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USDHC_AssertHardwareReset(BOARD_SDMMC_SD_HOST_BASEADDR, true);
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} else {
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USDHC_AssertHardwareReset(BOARD_SDMMC_SD_HOST_BASEADDR, false);
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}
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}
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void BOARD_SD_Pin_Config(uint32_t freq) {
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uint32_t speed = 0U, strength = 0U;
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if (freq <= 50000000) {
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speed = 0U;
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strength = 7U;
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} else if (freq <= 100000000) {
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speed = 2U;
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strength = 7U;
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} else {
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speed = 3U;
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strength = 7U;
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}
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IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_02_USDHC1_CMD,
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IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |
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IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |
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IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |
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IOMUXC_SW_PAD_CTL_PAD_DSE(strength));
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IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_03_USDHC1_CLK,
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IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |
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IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(0) |
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IOMUXC_SW_PAD_CTL_PAD_DSE(strength));
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IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_04_USDHC1_DATA0,
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IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |
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IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |
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IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |
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IOMUXC_SW_PAD_CTL_PAD_DSE(strength));
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IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_05_USDHC1_DATA1,
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IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |
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IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |
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IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |
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IOMUXC_SW_PAD_CTL_PAD_DSE(strength));
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IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_00_USDHC1_DATA2,
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IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |
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IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |
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IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |
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IOMUXC_SW_PAD_CTL_PAD_DSE(strength));
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IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_01_USDHC1_DATA3,
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IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |
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IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |
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IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |
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IOMUXC_SW_PAD_CTL_PAD_DSE(strength));
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}
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#endif
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#if defined(SD_ENABLED)
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void BOARD_SD_Config(void *card, sd_cd_t cd, uint32_t hostIRQPriority, void *userData) {
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assert(card);
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s_host.dmaDesBuffer = s_sdmmcHostDmaBuffer;
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s_host.dmaDesBufferWordsNum = BOARD_SDMMC_HOST_DMA_DESCRIPTOR_BUFFER_SIZE;
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s_host.enableCacheControl = BOARD_SDMMC_HOST_CACHE_CONTROL;
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#if defined SDMMCHOST_ENABLE_CACHE_LINE_ALIGN_TRANSFER && SDMMCHOST_ENABLE_CACHE_LINE_ALIGN_TRANSFER
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s_host.cacheAlignBuffer = s_sdmmcCacheLineAlignBuffer;
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s_host.cacheAlignBufferSize = BOARD_SDMMC_DATA_BUFFER_ALIGN_SIZE * 2U;
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#endif
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((sd_card_t *)card)->host = &s_host;
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((sd_card_t *)card)->host->hostController.base = BOARD_SDMMC_SD_HOST_BASEADDR;
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((sd_card_t *)card)->host->hostController.sourceClock_Hz = BOARD_USDHC1ClockConfiguration();
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((sd_card_t *)card)->usrParam.cd = &s_cd;
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((sd_card_t *)card)->usrParam.pwr = BOARD_SDCardPowerControl;
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((sd_card_t *)card)->usrParam.ioStrength = BOARD_SD_Pin_Config;
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((sd_card_t *)card)->usrParam.ioVoltage = &s_ioVoltage;
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((sd_card_t *)card)->usrParam.maxFreq = BOARD_SDMMC_SD_HOST_SUPPORT_SDR104_FREQ;
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BOARD_SDCardPowerResetInit();
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BOARD_SDCardDetectInit(cd, userData);
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NVIC_SetPriority(BOARD_SDMMC_SD_HOST_IRQ, hostIRQPriority);
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}
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#endif |