From 4751f0f16c286a1610a192b4066b14601a183078 Mon Sep 17 00:00:00 2001 From: Yilin Sun Date: Fri, 15 Mar 2024 23:14:14 +0800 Subject: [PATCH] Added basic FreeRTOS library. Signed-off-by: Yilin Sun --- .gitmodules | 3 + CMakeLists.txt | 10 ++- MIMXRT1021xxxxx.mex | 109 +++++++++++++++++++++++++++ SDK | 1 + board/pin_mux.c | 97 ++++++++++++++++++++++++ board/pin_mux.h | 49 +++++++++++++ include/FreeRTOSConfig.h | 155 +++++++++++++++++++++++++++++++++++++++ lib/freertos | 1 + src/main.c | 56 +++++++------- 9 files changed, 452 insertions(+), 29 deletions(-) create mode 160000 SDK create mode 100644 include/FreeRTOSConfig.h create mode 160000 lib/freertos diff --git a/.gitmodules b/.gitmodules index 536041c..ce86312 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,3 +1,6 @@ [submodule "SDK"] path = SDK url = https://git.minori.work/Embedded_SDK/MCUXpresso_MIMXRT1021xxxxx.git +[submodule "lib/freertos"] + path = lib/freertos + url = https://github.com/FreeRTOS/FreeRTOS-Kernel.git diff --git a/CMakeLists.txt b/CMakeLists.txt index 525a39e..bbac910 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -1,6 +1,6 @@ cmake_minimum_required(VERSION 3.10) -project(fire_rt1021_evk_template) +project(fire_rt1021_watch) enable_language(CXX) enable_language(ASM) @@ -97,6 +97,7 @@ set(TARGET_SOURCES set(TARGET_C_DEFINES "CPU_MIMXRT1021DAG5A" "MCUXPRESSO_SDK" + "SDK_DEBUGCONSOLE_UART=1" "SERIAL_PORT_TYPE_UART" "__STARTUP_CLEAR_BSS" "__STARTUP_INITIALIZE_NONCACHEDATA" @@ -124,6 +125,7 @@ set(TARGET_C_INCLUDES # Shared libraries linked with application set(TARGET_LIBS + "freertos_kernel" "c" "m" "nosys" @@ -152,6 +154,12 @@ set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wall -fno-common -fno-builtin -f set(CMAKE_ASM_FLAGS "${CMAKE_C_FLAGS} -x assembler-with-cpp") set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--gc-sections") +add_library(freertos_config INTERFACE) +target_include_directories(freertos_config SYSTEM INTERFACE ${CMAKE_CURRENT_SOURCE_DIR}/include) +set(FREERTOS_PORT GCC_ARM_CM4F CACHE STRING "") +set(FREERTOS_HEAP "4" CACHE STRING "") +add_subdirectory(lib/freertos) + # Shared sources, includes and definitions add_compile_definitions(${TARGET_C_DEFINES}) include_directories(${TARGET_C_INCLUDES}) diff --git a/MIMXRT1021xxxxx.mex b/MIMXRT1021xxxxx.mex index f052075..83203d1 100644 --- a/MIMXRT1021xxxxx.mex +++ b/MIMXRT1021xxxxx.mex @@ -24,6 +24,10 @@ 15.0.1 + + + + @@ -58,6 +62,111 @@ + + Configures pin routing and optionally pin electrical features. + + true + core0 + true + + + + + true + + + + + true + + + + + true + + + + + true + + + + + + + + + + + + + + + + + Configures pin routing and optionally pin electrical features. + + true + core0 + true + + + + + true + + + + + true + + + + + true + + + + + + + + + + Configures pin routing and optionally pin electrical features. + + true + core0 + true + + + + + true + + + + + true + + + + + true + + + + + + + + + + + + + + diff --git a/SDK b/SDK new file mode 160000 index 0000000..763d32b --- /dev/null +++ b/SDK @@ -0,0 +1 @@ +Subproject commit 763d32be909f940246b27dc76ccdea96ec0e7f4c diff --git a/board/pin_mux.c b/board/pin_mux.c index 5567e4b..8b87e8b 100644 --- a/board/pin_mux.c +++ b/board/pin_mux.c @@ -11,12 +11,16 @@ processor: MIMXRT1021xxxxx package_id: MIMXRT1021DAG5A mcu_data: ksdk2_0 processor_version: 15.0.1 +pin_labels: +- {pin_num: '87', pin_signal: GPIO_AD_B1_05, label: DC, identifier: DC} +- {pin_num: '76', pin_signal: GPIO_AD_B1_13, label: LEDA, identifier: LEDA} power_domains: {NVCC_GPIO: '3.3'} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ #include "fsl_common.h" #include "fsl_iomuxc.h" +#include "fsl_gpio.h" #include "pin_mux.h" /* FUNCTION ************************************************************************************************************ @@ -27,6 +31,9 @@ power_domains: {NVCC_GPIO: '3.3'} * END ****************************************************************************************************************/ void BOARD_InitBootPins(void) { BOARD_InitDbgUARTPins(); + BOARD_InitLCDSPIPins(); + BOARD_InitLCDTPPins(); + BOARD_InitLEDPins(); } /* @@ -51,6 +58,96 @@ void BOARD_InitDbgUARTPins(void) { IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_06_LPUART1_TX, 0U); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_07_LPUART1_RX, 0U); } + +/* + * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +BOARD_InitLCDSPIPins: +- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'} +- pin_list: + - {pin_num: '90', peripheral: LPSPI4, signal: SCK, pin_signal: GPIO_AD_B1_02} + - {pin_num: '89', peripheral: LPSPI4, signal: PCS0, pin_signal: GPIO_AD_B1_03} + - {pin_num: '88', peripheral: LPSPI4, signal: SDO, pin_signal: GPIO_AD_B1_04} + - {pin_num: '87', peripheral: GPIO1, signal: 'gpio_io, 21', pin_signal: GPIO_AD_B1_05, direction: OUTPUT, gpio_init_state: 'false'} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** + */ + +/* FUNCTION ************************************************************************************************************ + * + * Function Name : BOARD_InitLCDSPIPins + * Description : Configures pin routing and optionally pin electrical features. + * + * END ****************************************************************************************************************/ +void BOARD_InitLCDSPIPins(void) { + CLOCK_EnableClock(kCLOCK_Iomuxc); + + /* GPIO configuration of DC on GPIO_AD_B1_05 (pin 87) */ + gpio_pin_config_t DC_config = { + .direction = kGPIO_DigitalOutput, + .outputLogic = 0U, + .interruptMode = kGPIO_NoIntmode + }; + /* Initialize GPIO functionality on GPIO_AD_B1_05 (pin 87) */ + GPIO_PinInit(GPIO1, 21U, &DC_config); + + IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_02_LPSPI4_SCK, 0U); + IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_03_LPSPI4_PCS0, 0U); + IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_04_LPSPI4_SDO, 0U); + IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_05_GPIO1_IO21, 0U); +} + +/* + * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +BOARD_InitLCDTPPins: +- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'} +- pin_list: + - {pin_num: '75', peripheral: LPI2C1, signal: SCL, pin_signal: GPIO_AD_B1_14} + - {pin_num: '74', peripheral: LPI2C1, signal: SDA, pin_signal: GPIO_AD_B1_15} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** + */ + +/* FUNCTION ************************************************************************************************************ + * + * Function Name : BOARD_InitLCDTPPins + * Description : Configures pin routing and optionally pin electrical features. + * + * END ****************************************************************************************************************/ +void BOARD_InitLCDTPPins(void) { + CLOCK_EnableClock(kCLOCK_Iomuxc); + + IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_14_LPI2C1_SCL, 0U); + IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_15_LPI2C1_SDA, 0U); +} + +/* + * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +BOARD_InitLEDPins: +- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'} +- pin_list: + - {pin_num: '76', peripheral: GPIO1, signal: 'gpio_io, 29', pin_signal: GPIO_AD_B1_13, direction: OUTPUT, gpio_init_state: 'true', open_drain: Enable, speed: MHZ_50} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** + */ + +/* FUNCTION ************************************************************************************************************ + * + * Function Name : BOARD_InitLEDPins + * Description : Configures pin routing and optionally pin electrical features. + * + * END ****************************************************************************************************************/ +void BOARD_InitLEDPins(void) { + CLOCK_EnableClock(kCLOCK_Iomuxc); + + /* GPIO configuration of LEDA on GPIO_AD_B1_13 (pin 76) */ + gpio_pin_config_t LEDA_config = { + .direction = kGPIO_DigitalOutput, + .outputLogic = 1U, + .interruptMode = kGPIO_NoIntmode + }; + /* Initialize GPIO functionality on GPIO_AD_B1_13 (pin 76) */ + GPIO_PinInit(GPIO1, 29U, &LEDA_config); + + IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_13_GPIO1_IO29, 0U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_13_GPIO1_IO29, 0x1830U); +} /*********************************************************************************************************************** * EOF **********************************************************************************************************************/ diff --git a/board/pin_mux.h b/board/pin_mux.h index 7829981..25c365a 100644 --- a/board/pin_mux.h +++ b/board/pin_mux.h @@ -44,6 +44,55 @@ void BOARD_InitBootPins(void); */ void BOARD_InitDbgUARTPins(void); +/* GPIO_AD_B1_05 (number 87), DC */ +/* Routed pin properties */ +#define BOARD_INITLCDSPIPINS_DC_PERIPHERAL GPIO1 /*!< Peripheral name */ +#define BOARD_INITLCDSPIPINS_DC_SIGNAL gpio_io /*!< Signal name */ +#define BOARD_INITLCDSPIPINS_DC_CHANNEL 21U /*!< Signal channel */ + +/* Symbols to be used with GPIO driver */ +#define BOARD_INITLCDSPIPINS_DC_GPIO GPIO1 /*!< GPIO peripheral base pointer */ +#define BOARD_INITLCDSPIPINS_DC_GPIO_PIN 21U /*!< GPIO pin number */ +#define BOARD_INITLCDSPIPINS_DC_GPIO_PIN_MASK (1U << 21U) /*!< GPIO pin mask */ +#define BOARD_INITLCDSPIPINS_DC_PORT GPIO1 /*!< PORT peripheral base pointer */ +#define BOARD_INITLCDSPIPINS_DC_PIN 21U /*!< PORT pin number */ +#define BOARD_INITLCDSPIPINS_DC_PIN_MASK (1U << 21U) /*!< PORT pin mask */ + + +/*! + * @brief Configures pin routing and optionally pin electrical features. + * + */ +void BOARD_InitLCDSPIPins(void); + + +/*! + * @brief Configures pin routing and optionally pin electrical features. + * + */ +void BOARD_InitLCDTPPins(void); + +/* GPIO_AD_B1_13 (number 76), LEDA */ +/* Routed pin properties */ +#define BOARD_INITLEDPINS_LEDA_PERIPHERAL GPIO1 /*!< Peripheral name */ +#define BOARD_INITLEDPINS_LEDA_SIGNAL gpio_io /*!< Signal name */ +#define BOARD_INITLEDPINS_LEDA_CHANNEL 29U /*!< Signal channel */ + +/* Symbols to be used with GPIO driver */ +#define BOARD_INITLEDPINS_LEDA_GPIO GPIO1 /*!< GPIO peripheral base pointer */ +#define BOARD_INITLEDPINS_LEDA_GPIO_PIN 29U /*!< GPIO pin number */ +#define BOARD_INITLEDPINS_LEDA_GPIO_PIN_MASK (1U << 29U) /*!< GPIO pin mask */ +#define BOARD_INITLEDPINS_LEDA_PORT GPIO1 /*!< PORT peripheral base pointer */ +#define BOARD_INITLEDPINS_LEDA_PIN 29U /*!< PORT pin number */ +#define BOARD_INITLEDPINS_LEDA_PIN_MASK (1U << 29U) /*!< PORT pin mask */ + + +/*! + * @brief Configures pin routing and optionally pin electrical features. + * + */ +void BOARD_InitLEDPins(void); + #if defined(__cplusplus) } #endif diff --git a/include/FreeRTOSConfig.h b/include/FreeRTOSConfig.h new file mode 100644 index 0000000..2bf04e0 --- /dev/null +++ b/include/FreeRTOSConfig.h @@ -0,0 +1,155 @@ +/* + * FreeRTOS Kernel V10.5.1 + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +/*----------------------------------------------------------- + * Application specific definitions. + * + * These definitions should be adjusted for your particular hardware and + * application requirements. + * + * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE + * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. + * + * See http://www.freertos.org/a00110.html. + *----------------------------------------------------------*/ + +#define configUSE_PREEMPTION 1 +#define configUSE_TICKLESS_IDLE 0 +#define configCPU_CLOCK_HZ (SystemCoreClock) +#define configTICK_RATE_HZ ((TickType_t)1000) +#define configMAX_PRIORITIES 32 +#define configMINIMAL_STACK_SIZE ((unsigned short)128) +#define configMAX_TASK_NAME_LEN 20 +#define configUSE_16_BIT_TICKS 0 +#define configIDLE_SHOULD_YIELD 1 +#define configUSE_TASK_NOTIFICATIONS 1 +#define configUSE_MUTEXES 1 +#define configUSE_RECURSIVE_MUTEXES 1 +#define configUSE_COUNTING_SEMAPHORES 1 +#define configUSE_ALTERNATIVE_API 0 /* Deprecated! */ +#define configQUEUE_REGISTRY_SIZE 8 +#define configUSE_QUEUE_SETS 0 +#define configUSE_TIME_SLICING 0 +#define configUSE_NEWLIB_REENTRANT 0 +#define configENABLE_BACKWARD_COMPATIBILITY 0 +#define configNUM_THREAD_LOCAL_STORAGE_POINTERS 5 + +/* Memory allocation related definitions. */ +#define configSUPPORT_STATIC_ALLOCATION 0 +#define configSUPPORT_DYNAMIC_ALLOCATION 1 +#define configTOTAL_HEAP_SIZE ((size_t)(48 * 1024)) +#define configAPPLICATION_ALLOCATED_HEAP 0 + +/* Hook function related definitions. */ +#define configUSE_IDLE_HOOK 0 +#define configUSE_TICK_HOOK 0 +#define configCHECK_FOR_STACK_OVERFLOW 0 +#define configUSE_MALLOC_FAILED_HOOK 0 +#define configUSE_DAEMON_TASK_STARTUP_HOOK 0 + +/* Run time and task stats gathering related definitions. */ +#define configGENERATE_RUN_TIME_STATS 0 +#define configUSE_TRACE_FACILITY 1 +#define configUSE_STATS_FORMATTING_FUNCTIONS 0 + +/* Task aware debugging. */ +#define configRECORD_STACK_HIGH_ADDRESS 1 + +/* Co-routine related definitions. */ +#define configUSE_CO_ROUTINES 0 +#define configMAX_CO_ROUTINE_PRIORITIES 2 + +/* Software timer related definitions. */ +#define configUSE_TIMERS 1 +#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES - 1) +#define configTIMER_QUEUE_LENGTH 10 +#define configTIMER_TASK_STACK_DEPTH (configMINIMAL_STACK_SIZE * 2) + +/* Define to trap errors during development. */ +#define configASSERT(x) if(( x) == 0) {taskDISABLE_INTERRUPTS(); for (;;);} + +/* Optional functions - most linkers will remove unused functions anyway. */ +#define INCLUDE_vTaskPrioritySet 1 +#define INCLUDE_uxTaskPriorityGet 1 +#define INCLUDE_vTaskDelete 1 +#define INCLUDE_vTaskSuspend 1 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 +#define INCLUDE_xTaskGetSchedulerState 1 +#define INCLUDE_xTaskGetCurrentTaskHandle 1 +#define INCLUDE_uxTaskGetStackHighWaterMark 0 +#define INCLUDE_xTaskGetIdleTaskHandle 0 +#define INCLUDE_eTaskGetState 0 +#define INCLUDE_xTimerPendFunctionCall 1 +#define INCLUDE_xTaskAbortDelay 0 +#define INCLUDE_xTaskGetHandle 0 +#define INCLUDE_xTaskResumeFromISR 1 + + + +#if defined(__ICCARM__)||defined(__CC_ARM)||defined(__GNUC__) + /* Clock manager provides in this variable system core clock frequency */ + #include + extern uint32_t SystemCoreClock; +#endif + +/* Interrupt nesting behaviour configuration. Cortex-M specific. */ +#ifdef __NVIC_PRIO_BITS +/* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */ +#define configPRIO_BITS __NVIC_PRIO_BITS +#else +#define configPRIO_BITS 4 /* 15 priority levels */ +#endif + +/* The lowest interrupt priority that can be used in a call to a "set priority" +function. */ +#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1U << (configPRIO_BITS)) - 1) + +/* The highest interrupt priority that can be used by any interrupt service +routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL +INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER +PRIORITY THAN THIS! (higher priorities are lower numeric values. */ +#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 2 + +/* Interrupt priorities used by the kernel port layer itself. These are generic +to all Cortex-M ports, and do not rely on any particular library functions. */ +#define configKERNEL_INTERRUPT_PRIORITY (configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS)) +/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!! +See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */ +#define configMAX_SYSCALL_INTERRUPT_PRIORITY (configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS)) + +/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS +standard names. */ +#define vPortSVCHandler SVC_Handler +#define xPortPendSVHandler PendSV_Handler +#define xPortSysTickHandler SysTick_Handler + +#endif /* FREERTOS_CONFIG_H */ diff --git a/lib/freertos b/lib/freertos new file mode 160000 index 0000000..0240cd5 --- /dev/null +++ b/lib/freertos @@ -0,0 +1 @@ +Subproject commit 0240cd55f20be7100439b606086709b74a105cb1 diff --git a/src/main.c b/src/main.c index e42a6d2..e47ef7a 100644 --- a/src/main.c +++ b/src/main.c @@ -1,47 +1,47 @@ /* - * Copyright (c) 2013 - 2015, Freescale Semiconductor, Inc. - * Copyright 2016-2017 NXP + * Copyright 2024 NXP + * Copyright 2024 Yilin Sun * All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ -#include "fsl_device_registers.h" -#include "fsl_debug_console.h" -#include "pin_mux.h" -#include "clock_config.h" +#include + +/* Board */ #include "board.h" +#include "clock_config.h" +#include "pin_mux.h" -/******************************************************************************* - * Definitions - ******************************************************************************/ +/* FreeRTOS */ +#include "FreeRTOS.h" +#include "task.h" +static void app_task_initialization(void *arguments); -/******************************************************************************* - * Prototypes - ******************************************************************************/ - -/******************************************************************************* - * Code - ******************************************************************************/ -/*! - * @brief Main function - */ -int main(void) -{ - char ch; - +int main(void) { /* Init board hardware. */ BOARD_ConfigMPU(); BOARD_InitBootPins(); BOARD_InitBootClocks(); + BOARD_InitDebugConsole(); - PRINTF("hello world.\r\n"); + if (xTaskCreate(app_task_initialization, "Init", 256, NULL, 2, NULL) != pdPASS) { + goto dead_loop; + } - while (1) - { - ch = GETCHAR(); - PUTCHAR(ch); + vTaskStartScheduler(); + +dead_loop: + for (;;) { + __WFI(); } } + +static void app_task_initialization(void *arguments) { + for (;;) { + GPIO_PortToggle(BOARD_INITLEDPINS_LEDA_GPIO, BOARD_INITLEDPINS_LEDA_PIN_MASK); + vTaskDelay(pdMS_TO_TICKS(250)); + } +} \ No newline at end of file