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Updated FCB. 

Signed-off-by: Yilin Sun <imi415@imi.moe>
This commit is contained in:
Yilin Sun 2023-12-03 22:05:40 +08:00
parent 70948c38b2
commit 7833fa1bde
Signed by: imi415
GPG Key ID: 17F01E106F9F5E0A
2 changed files with 9 additions and 12 deletions
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3
CMakeLists.txt
View File

@ -138,9 +138,6 @@ set(TARGET_LIBS
# Shared library and linker script search paths
set(TARGET_LIB_DIRECTORIES
"c"
"m"
"nosys"
)
# Conditional flags

18
xip/fire_rt1052_pro_flexspi_nor_config.c
View File

@ -37,8 +37,8 @@ const flexspi_nor_config_t spiflash_config = {
.busyOffset = 0U,
.busyBitPolarity = 1U,
.lookupTable = {
// Fast read quad IO (EBh) [NOR_CMD_LUT_SEQ_IDX_READ]
[4U * 0 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
// Fast read quad IO (ECh) [NOR_CMD_LUT_SEQ_IDX_READ]
[4U * 0 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEC, RADDR_SDR, FLEXSPI_4PAD, 0x20),
[4U * 0 + 1U] = FLEXSPI_LUT_SEQ(MODE8_SDR, FLEXSPI_4PAD, 0xF0, DUMMY_SDR, FLEXSPI_4PAD, 0x04),
[4U * 0 + 2U] = FLEXSPI_LUT_SEQ(READ_SDR, FLEXSPI_4PAD, 0x00, STOP, FLEXSPI_1PAD, 0x00),
@ -48,19 +48,19 @@ const flexspi_nor_config_t spiflash_config = {
// Write enable (06h) [NOR_CMD_LUT_SEQ_IDX_WRITEENABLE]
[4U * 3 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, FLEXSPI_1PAD, 0x00),
// Page program () [NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM]
[4U * 4 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x32, RADDR_SDR, FLEXSPI_4PAD, 0x18),
// Page program (34h) [NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM]
[4U * 4 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x34, RADDR_SDR, FLEXSPI_4PAD, 0x20),
[4U * 4 + 1U] = FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_4PAD, 0x00, STOP, FLEXSPI_1PAD, 0x00),
// Erase sector (20h) [NOR_CMD_LUT_SEQ_IDX_ERASESECTOR]
[4U * 5 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20, RADDR_SDR, FLEXSPI_1PAD, 0x18),
// Erase sector (21h) [NOR_CMD_LUT_SEQ_IDX_ERASESECTOR]
[4U * 5 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x21, RADDR_SDR, FLEXSPI_1PAD, 0x20),
// Erase block 32kB (52h) [NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK]
[4U * 8 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x52, RADDR_SDR, FLEXSPI_1PAD, 0x18),
// Erase block 64kB (DCh) [NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK]
[4U * 8 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xDC, RADDR_SDR, FLEXSPI_1PAD, 0x20),
},
},
.pageSize = 256u,
.sectorSize = 4u * 1024u,
.blockSize = 32u * 1024u,
.blockSize = 64u * 1024u,
};
#endif /* XIP_BOOT_HEADER_ENABLE */