154 lines
4.3 KiB
C
154 lines
4.3 KiB
C
/* ----------------------------------------------------------------------
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* Project: CMSIS DSP Library
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* Title: arm_cmplx_dot_prod_q31.c
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* Description: Q31 complex dot product
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*
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* $Date: 18. March 2019
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* $Revision: V1.6.0
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*
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* Target Processor: Cortex-M cores
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* -------------------------------------------------------------------- */
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/*
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* Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "arm_math.h"
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/**
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@ingroup groupCmplxMath
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*/
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/**
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@addtogroup cmplx_dot_prod
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@{
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*/
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/**
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@brief Q31 complex dot product.
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@param[in] pSrcA points to the first input vector
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@param[in] pSrcB points to the second input vector
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@param[in] numSamples number of samples in each vector
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@param[out] realResult real part of the result returned here
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@param[out] imagResult imaginary part of the result returned here
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@return none
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@par Scaling and Overflow Behavior
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The function is implemented using an internal 64-bit accumulator.
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The intermediate 1.31 by 1.31 multiplications are performed with 64-bit precision and then shifted to 16.48 format.
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The internal real and imaginary accumulators are in 16.48 format and provide 15 guard bits.
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Additions are nonsaturating and no overflow will occur as long as <code>numSamples</code> is less than 32768.
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The return results <code>realResult</code> and <code>imagResult</code> are in 16.48 format.
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Input down scaling is not required.
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*/
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void arm_cmplx_dot_prod_q31(
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const q31_t * pSrcA,
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const q31_t * pSrcB,
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uint32_t numSamples,
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q63_t * realResult,
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q63_t * imagResult)
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{
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uint32_t blkCnt; /* Loop counter */
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q63_t real_sum = 0, imag_sum = 0; /* Temporary result variables */
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q31_t a0,b0,c0,d0;
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#if defined (ARM_MATH_LOOPUNROLL)
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/* Loop unrolling: Compute 4 outputs at a time */
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blkCnt = numSamples >> 2U;
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while (blkCnt > 0U)
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{
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a0 = *pSrcA++;
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b0 = *pSrcA++;
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c0 = *pSrcB++;
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d0 = *pSrcB++;
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real_sum += ((q63_t)a0 * c0) >> 14;
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imag_sum += ((q63_t)a0 * d0) >> 14;
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real_sum -= ((q63_t)b0 * d0) >> 14;
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imag_sum += ((q63_t)b0 * c0) >> 14;
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a0 = *pSrcA++;
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b0 = *pSrcA++;
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c0 = *pSrcB++;
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d0 = *pSrcB++;
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real_sum += ((q63_t)a0 * c0) >> 14;
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imag_sum += ((q63_t)a0 * d0) >> 14;
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real_sum -= ((q63_t)b0 * d0) >> 14;
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imag_sum += ((q63_t)b0 * c0) >> 14;
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a0 = *pSrcA++;
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b0 = *pSrcA++;
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c0 = *pSrcB++;
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d0 = *pSrcB++;
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real_sum += ((q63_t)a0 * c0) >> 14;
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imag_sum += ((q63_t)a0 * d0) >> 14;
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real_sum -= ((q63_t)b0 * d0) >> 14;
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imag_sum += ((q63_t)b0 * c0) >> 14;
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a0 = *pSrcA++;
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b0 = *pSrcA++;
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c0 = *pSrcB++;
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d0 = *pSrcB++;
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real_sum += ((q63_t)a0 * c0) >> 14;
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imag_sum += ((q63_t)a0 * d0) >> 14;
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real_sum -= ((q63_t)b0 * d0) >> 14;
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imag_sum += ((q63_t)b0 * c0) >> 14;
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/* Decrement loop counter */
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blkCnt--;
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}
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/* Loop unrolling: Compute remaining outputs */
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blkCnt = numSamples % 0x4U;
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#else
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/* Initialize blkCnt with number of samples */
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blkCnt = numSamples;
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#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
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while (blkCnt > 0U)
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{
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a0 = *pSrcA++;
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b0 = *pSrcA++;
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c0 = *pSrcB++;
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d0 = *pSrcB++;
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real_sum += ((q63_t)a0 * c0) >> 14;
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imag_sum += ((q63_t)a0 * d0) >> 14;
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real_sum -= ((q63_t)b0 * d0) >> 14;
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imag_sum += ((q63_t)b0 * c0) >> 14;
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/* Decrement loop counter */
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blkCnt--;
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}
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/* Store real and imaginary result in 16.48 format */
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*realResult = real_sum;
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*imagResult = imag_sum;
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}
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/**
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@} end of cmplx_dot_prod group
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*/
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