115 lines
2.9 KiB
C
115 lines
2.9 KiB
C
#include <stdio.h>
|
|
|
|
/* FreeRTOS */
|
|
#include "FreeRTOS.h"
|
|
#include "task.h"
|
|
|
|
/* SDK drivers */
|
|
#include "fsl_lpspi.h"
|
|
|
|
/* Board */
|
|
#include "board.h"
|
|
#include "clock_config.h"
|
|
#include "peripherals.h"
|
|
#include "pin_mux.h"
|
|
|
|
/* LCD */
|
|
#include "app_impl_lcd.h"
|
|
|
|
int app_lcd_impl_init(void *handle) {
|
|
CLOCK_EnableClock(kCLOCK_Lpspi4);
|
|
|
|
lpspi_master_config_t spi_cfg;
|
|
LPSPI_MasterGetDefaultConfig(&spi_cfg);
|
|
|
|
spi_cfg.baudRate = 48000000UL;
|
|
|
|
LPSPI_MasterInit(LPSPI4, &spi_cfg, CLOCK_GetClockRootFreq(kCLOCK_LpspiClkRoot));
|
|
|
|
return 0;
|
|
}
|
|
|
|
epd_ret_t app_lcd_impl_write_command(void *handle, uint8_t *command, uint32_t len) {
|
|
/* 02 - 00 - CMD - 00 - DATA0 - ... - DATAN */
|
|
|
|
uint8_t command_buf[4] = {0x02, 0x00, command[0], 0x00};
|
|
|
|
LPSPI4->TCR |= LPSPI_TCR_CONT(1U) | LPSPI_TCR_CONTC(1U) | LPSPI_TCR_RXMSK(1U);
|
|
while (LPSPI4->FSR & LPSPI_FSR_TXCOUNT_MASK) {
|
|
/* -- */
|
|
}
|
|
|
|
uint8_t fifo_length = (LPSPI4->PARAM & LPSPI_PARAM_TXFIFO_MASK) >> LPSPI_PARAM_TXFIFO_SHIFT;
|
|
|
|
for (uint8_t i = 0; i < sizeof(command_buf); i++) {
|
|
while ((LPSPI4->FSR & LPSPI_FSR_TXCOUNT_MASK) >> LPSPI_FSR_TXCOUNT_SHIFT == fifo_length) {
|
|
/* -- */
|
|
}
|
|
|
|
LPSPI4->TDR = command_buf[i];
|
|
}
|
|
|
|
for (uint32_t i = 0; i < (len - 1); i++) {
|
|
while ((LPSPI4->FSR & LPSPI_FSR_TXCOUNT_MASK) >> LPSPI_FSR_TXCOUNT_SHIFT == fifo_length) {
|
|
/* -- */
|
|
}
|
|
|
|
LPSPI4->TDR = command[i + 1];
|
|
}
|
|
|
|
while (LPSPI4->FSR & LPSPI_FSR_TXCOUNT_MASK) {
|
|
/* -- */
|
|
}
|
|
|
|
LPSPI4->TCR &= ~(LPSPI_TCR_CONT_MASK | LPSPI_TCR_CONTC_MASK);
|
|
while (LPSPI4->FSR & LPSPI_FSR_TXCOUNT_MASK) {
|
|
/* -- */
|
|
}
|
|
|
|
return EPD_OK;
|
|
}
|
|
|
|
epd_ret_t app_lcd_impl_write_data(void *handle, const uint8_t *data, uint32_t len) {
|
|
/* 02 - 00 - CMD(2C) - 00 - DATA0 - ... - DATAN */
|
|
|
|
uint8_t command_buf[4] = {0x02, 0x00, 0x2C, 0x00};
|
|
|
|
LPSPI4->TCR |= LPSPI_TCR_CONT(1U) | LPSPI_TCR_CONTC(1U) | LPSPI_TCR_RXMSK(1U);
|
|
while (LPSPI4->FSR & LPSPI_FSR_TXCOUNT_MASK) {
|
|
/* -- */
|
|
}
|
|
|
|
uint8_t fifo_length = (LPSPI4->PARAM & LPSPI_PARAM_TXFIFO_MASK) >> LPSPI_PARAM_TXFIFO_SHIFT;
|
|
|
|
for (uint8_t i = 0; i < sizeof(command_buf); i++) {
|
|
while ((LPSPI4->FSR & LPSPI_FSR_TXCOUNT_MASK) >> LPSPI_FSR_TXCOUNT_SHIFT == fifo_length) {
|
|
/* -- */
|
|
}
|
|
|
|
LPSPI4->TDR = command_buf[i];
|
|
}
|
|
|
|
for (uint32_t i = 0; i < len; i++) {
|
|
while ((LPSPI4->FSR & LPSPI_FSR_TXCOUNT_MASK) >> LPSPI_FSR_TXCOUNT_SHIFT == fifo_length) {
|
|
/* -- */
|
|
}
|
|
|
|
LPSPI4->TDR = data[i];
|
|
}
|
|
|
|
while (LPSPI4->FSR & LPSPI_FSR_TXCOUNT_MASK) {
|
|
/* -- */
|
|
}
|
|
|
|
LPSPI4->TCR &= ~(LPSPI_TCR_CONT_MASK | LPSPI_TCR_CONTC_MASK);
|
|
while (LPSPI4->FSR & LPSPI_FSR_TXCOUNT_MASK) {
|
|
/* -- */
|
|
}
|
|
return EPD_OK;
|
|
}
|
|
|
|
epd_ret_t app_lcd_impl_delay(void *handle, uint32_t msec) {
|
|
vTaskDelay(pdMS_TO_TICKS(msec));
|
|
|
|
return EPD_OK;
|
|
} |