diff --git a/.clang-format b/.clang-format
index 7ba2003..be0aa9b 100644
--- a/.clang-format
+++ b/.clang-format
@@ -1,7 +1,7 @@
BasedOnStyle: Google
IndentWidth: 4
AlignConsecutiveMacros: AcrossEmptyLines
-AlignConsecutiveDeclarations: AcrossEmptyLines
+AlignConsecutiveDeclarations: Consecutive
AlignConsecutiveAssignments: AcrossEmptyLinesAndComments
BreakBeforeBraces: Custom
BraceWrapping:
diff --git a/.clang-tidy b/.clang-tidy
index 8ccd448..9092803 100644
--- a/.clang-tidy
+++ b/.clang-tidy
@@ -1,4 +1,6 @@
Checks: >
*,
-altera-unroll-loops,
- -hicpp-no-assembler
\ No newline at end of file
+ -hicpp-no-assembler,
+ -modernize-macro-to-enum,
+ -cppcoreguidelines-avoid-non-const-global-variables
\ No newline at end of file
diff --git a/.gitmodules b/.gitmodules
index e537b8d..135a318 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -1,3 +1,6 @@
[submodule "SDK"]
path = SDK
- url = git@git.minori.work:Embedded_SDK/MCUXpresso_MIMXRT1052xxxxB.git
+ url = https://git.minori.work/Embedded_SDK/MCUXpresso_MIMXRT1052xxxxB.git
+[submodule "lib/freertos"]
+ path = lib/freertos
+ url = https://github.com/FreeRTOS/FreeRTOS-Kernel.git
diff --git a/CMakeLists.txt b/CMakeLists.txt
index 5698557..7e25c04 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -1,15 +1,17 @@
cmake_minimum_required(VERSION 3.10)
-project(fire_rt1052_pro_template)
+project(fire_rt1052_pro_sdio)
enable_language(CXX)
enable_language(ASM)
# Different linker scripts
-set(TARGET_LDSCRIPT_FLASH "${CMAKE_SOURCE_DIR}/SDK/devices/MIMXRT1052/gcc/MIMXRT1052xxxxx_flexspi_nor.ld")
-set(TARGET_LDSCRIPT_RAM "${CMAKE_SOURCE_DIR}/SDK/devices/MIMXRT1052/gcc/MIMXRT1052xxxxx_ram.ld")
+set(TARGET_LDSCRIPT_FLASH "${CMAKE_SOURCE_DIR}/app_flexspi.ld")
+set(TARGET_LDSCRIPT_RAM "${CMAKE_SOURCE_DIR}/app_ram.ld")
set(TARGET_SOURCES
+ "SDK/components/lists/fsl_component_generic_list.c"
+ "SDK/components/osa/fsl_os_abstraction_free_rtos.c"
"SDK/components/serial_manager/fsl_component_serial_manager.c"
"SDK/components/serial_manager/fsl_component_serial_port_uart.c"
"SDK/components/uart/fsl_adapter_lpuart.c"
@@ -90,11 +92,17 @@ set(TARGET_SOURCES
"SDK/devices/MIMXRT1052/utilities/fsl_sbrk.c"
"SDK/devices/MIMXRT1052/utilities/str/fsl_str.c"
"SDK/devices/MIMXRT1052/xip/fsl_flexspi_nor_boot.c"
+ "SDK/middleware/sdmmc/common/fsl_sdmmc_common.c"
+ "SDK/middleware/sdmmc/osa/fsl_sdmmc_osa.c"
+ "SDK/middleware/sdmmc/sdio/fsl_sdio.c"
+ "SDK/middleware/sdmmc/host/usdhc/non_blocking/fsl_sdmmc_host.c"
"board/board.c"
"board/clock_config.c"
"board/dcd.c"
"board/peripherals.c"
"board/pin_mux.c"
+ "src/app_freertos.c"
+ "src/app_sdio.c"
"src/main.c"
"xip/fire_rt1052_pro_flexspi_nor_config.c"
)
@@ -104,7 +112,9 @@ set(TARGET_C_DEFINES
"MCUXPRESSO_SDK"
"PRINTF_ADVANCED_ENABLE=1"
"PRINTF_FLOAT_ENABLE=1"
+ "SDK_OS_FREE_RTOS"
"SERIAL_PORT_TYPE_UART"
+ "USE_RTOS=1"
"__STARTUP_CLEAR_BSS"
"__STARTUP_INITIALIZE_NONCACHEDATA"
)
@@ -118,6 +128,8 @@ set(TARGET_C_DEFINES_XIP
set(TARGET_C_INCLUDES
"SDK/CMSIS/Core/Include"
+ "SDK/components/lists"
+ "SDK/components/osa"
"SDK/components/serial_manager"
"SDK/components/uart"
"SDK/devices/MIMXRT1052"
@@ -125,20 +137,24 @@ set(TARGET_C_INCLUDES
"SDK/devices/MIMXRT1052/utilities"
"SDK/devices/MIMXRT1052/utilities/debug_console"
"SDK/devices/MIMXRT1052/utilities/str"
+ "SDK/middleware/sdmmc/common"
+ "SDK/middleware/sdmmc/host/usdhc"
+ "SDK/middleware/sdmmc/osa"
+ "SDK/middleware/sdmmc/sdio"
"board"
"include"
)
# Shared libraries linked with application
set(TARGET_LIBS
- "c"
+ "freertos_kernel"
"m"
"nosys"
)
# Shared library and linker script search paths
set(TARGET_LIB_DIRECTORIES
-
+ "SDK/devices/MIMXRT1052/gcc"
)
# Conditional flags
@@ -159,6 +175,11 @@ set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wall -fno-common -fno-builtin -f
set(CMAKE_ASM_FLAGS "${CMAKE_C_FLAGS} -x assembler-with-cpp")
set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--gc-sections")
+set(FREERTOS_HEAP "4" CACHE STRING "" FORCE)
+set(FREERTOS_PORT "GCC_ARM_CM7" CACHE STRING "" FORCE)
+set(FREERTOS_CONFIG_FILE_DIRECTORY "${CMAKE_SOURCE_DIR}/include" CACHE STRING "" FORCE)
+add_subdirectory(lib/freertos)
+
# Shared sources, includes and definitions
add_compile_definitions(${TARGET_C_DEFINES})
include_directories(${TARGET_C_INCLUDES})
diff --git a/MIMXRT1052xxxxB.mex b/MIMXRT1052xxxxB.mex
index bda67f2..9273e4a 100644
--- a/MIMXRT1052xxxxB.mex
+++ b/MIMXRT1052xxxxB.mex
@@ -23,14 +23,14 @@
- 12.0.0
+ 12.0.1
-
+
@@ -144,7 +144,6 @@
-
@@ -195,7 +194,7 @@
Configures pin routing and optionally pin electrical features.
- false
+ true
core0
true
@@ -215,6 +214,11 @@
true
+
+
+ true
+
+
@@ -223,6 +227,13 @@
+
+
+
+
+
+
+
@@ -720,7 +731,7 @@
- 12.0.0
+ 12.0.1
@@ -984,7 +995,7 @@
- 12.0.0
+ 12.0.1
c_array
@@ -1001,7 +1012,7 @@
- 12.0.0
+ 12.0.1
diff --git a/SDK b/SDK
new file mode 160000
index 0000000..ded8674
--- /dev/null
+++ b/SDK
@@ -0,0 +1 @@
+Subproject commit ded867438906eef783e00cf1effe5328c658cfc3
diff --git a/app_flexspi.ld b/app_flexspi.ld
new file mode 100644
index 0000000..eada081
--- /dev/null
+++ b/app_flexspi.ld
@@ -0,0 +1,14 @@
+INCLUDE "MIMXRT1052xxxxx_flexspi_nor.ld"
+
+SECTIONS {
+ .data2 : {
+ . = ALIGN(4);
+ *(.sdio_buf)
+ *(.sdio_buf*)
+ *(.freertos_heap)
+ *(.freertos_heap*)
+ *(.lwip_mem)
+ *(.lwip_mem*)
+ . = ALIGN(4);
+ } > m_data2
+}
\ No newline at end of file
diff --git a/app_ram.ld b/app_ram.ld
new file mode 100644
index 0000000..143b7dd
--- /dev/null
+++ b/app_ram.ld
@@ -0,0 +1,14 @@
+INCLUDE "MIMXRT1052xxxxx_ram.ld"
+
+SECTIONS {
+ .data2 : {
+ . = ALIGN(4);
+ *(.sdio_buf)
+ *(.sdio_buf*)
+ *(.freertos_heap)
+ *(.freertos_heap*)
+ *(.lwip_mem)
+ *(.lwip_mem*)
+ . = ALIGN(4);
+ } > m_data2
+}
\ No newline at end of file
diff --git a/board/clock_config.c b/board/clock_config.c
index 211269f..115be05 100644
--- a/board/clock_config.c
+++ b/board/clock_config.c
@@ -19,7 +19,7 @@ product: Clocks v10.0
processor: MIMXRT1052xxxxB
package_id: MIMXRT1052DVL6B
mcu_data: ksdk2_0
-processor_version: 12.0.0
+processor_version: 12.0.1
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
#include "clock_config.h"
diff --git a/board/dcd.c b/board/dcd.c
index d3bf9dc..35d7464 100644
--- a/board/dcd.c
+++ b/board/dcd.c
@@ -24,7 +24,7 @@ product: DCDx v3.0
processor: MIMXRT1052xxxxB
package_id: MIMXRT1052DVL6B
mcu_data: ksdk2_0
-processor_version: 12.0.0
+processor_version: 12.0.1
output_format: c_array
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* COMMENTS BELOW ARE USED AS SETTINGS FOR DCD DATA */
diff --git a/board/peripherals.c b/board/peripherals.c
index 2007c30..95cc2f5 100644
--- a/board/peripherals.c
+++ b/board/peripherals.c
@@ -10,7 +10,7 @@ product: Peripherals v11.0
processor: MIMXRT1052xxxxB
package_id: MIMXRT1052DVL6B
mcu_data: ksdk2_0
-processor_version: 12.0.0
+processor_version: 12.0.1
functionalGroups:
- name: BOARD_InitPeripherals
UUID: 19596643-a9d0-4000-b44d-6a0a05ec6830
diff --git a/board/pin_mux.c b/board/pin_mux.c
index 2874cf0..bb7cb00 100644
--- a/board/pin_mux.c
+++ b/board/pin_mux.c
@@ -10,14 +10,14 @@ product: Pins v12.0
processor: MIMXRT1052xxxxB
package_id: MIMXRT1052DVL6B
mcu_data: ksdk2_0
-processor_version: 12.0.0
+processor_version: 12.0.1
pin_labels:
- {pin_num: C7, pin_signal: GPIO_EMC_41, label: LED_B, identifier: LED_R;LED_B}
- {pin_num: B12, pin_signal: GPIO_B1_07, label: LED_G, identifier: LED_G}
- {pin_num: A7, pin_signal: GPIO_EMC_40, label: LED_R, identifier: LED_B;LED_R}
- {pin_num: G14, pin_signal: GPIO_AD_B0_05, label: USDHC1_PWR, identifier: USDHC1_PWR}
- {pin_num: M11, pin_signal: GPIO_AD_B0_02, label: LCD_RST, identifier: LCD_RST}
-- {pin_num: M14, pin_signal: GPIO_AD_B0_00, label: CSI_, identifier: CSI_;CSI_PDN}
+- {pin_num: M14, pin_signal: GPIO_AD_B0_00, label: PWR, identifier: CSI_;CSI_PDN;PWR}
- {pin_num: H10, pin_signal: GPIO_AD_B0_01, label: CSI_RST, identifier: CSI_RST}
- {pin_num: G11, pin_signal: GPIO_AD_B0_03, label: BUZZER, identifier: BUZZER}
- {pin_num: L6, pin_signal: WAKEUP, label: WAKEUP, identifier: WAKEUP}
@@ -41,6 +41,7 @@ void BOARD_InitBootPins(void) {
BOARD_InitUARTDbgPins();
BOARD_InitSWDPins();
BOARD_InitFlexSPIPins();
+ BOARD_InitSDWiFiPins();
}
/*
@@ -110,7 +111,6 @@ BOARD_InitFlexSPIPins:
- {pin_num: P5, peripheral: FLEXSPI, signal: FLEXSPI_A_DATA3, pin_signal: GPIO_SD_B1_11}
- {pin_num: L3, peripheral: FLEXSPI, signal: FLEXSPI_A_SS0_B, pin_signal: GPIO_SD_B1_06}
- {pin_num: L4, peripheral: FLEXSPI, signal: FLEXSPI_A_SCLK, pin_signal: GPIO_SD_B1_07}
- - {pin_num: N3, peripheral: FLEXSPI, signal: FLEXSPI_A_DQS, pin_signal: GPIO_SD_B1_05}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
@@ -123,11 +123,6 @@ BOARD_InitFlexSPIPins:
void BOARD_InitFlexSPIPins(void) {
CLOCK_EnableClock(kCLOCK_Iomuxc);
-#if FSL_IOMUXC_DRIVER_VERSION >= MAKE_VERSION(2, 0, 3)
- IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_05_FLEXSPI_A_DQS, 0U);
-#else
- IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_05_FLEXSPIA_DQS, 0U);
-#endif
#if FSL_IOMUXC_DRIVER_VERSION >= MAKE_VERSION(2, 0, 3)
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_06_FLEXSPI_A_SS0_B, 0U);
#else
@@ -209,7 +204,7 @@ void BOARD_InituSDPins(void) {
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitSDWiFiPins:
-- options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
+- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
- pin_list:
- {pin_num: N3, peripheral: USDHC2, signal: usdhc_cmd, pin_signal: GPIO_SD_B1_05}
- {pin_num: P2, peripheral: USDHC2, signal: usdhc_clk, pin_signal: GPIO_SD_B1_04}
@@ -217,6 +212,7 @@ BOARD_InitSDWiFiPins:
- {pin_num: M3, peripheral: USDHC2, signal: 'usdhc_data, 1', pin_signal: GPIO_SD_B1_02}
- {pin_num: M5, peripheral: USDHC2, signal: 'usdhc_data, 2', pin_signal: GPIO_SD_B1_01}
- {pin_num: L5, peripheral: USDHC2, signal: 'usdhc_data, 3', pin_signal: GPIO_SD_B1_00}
+ - {pin_num: M14, peripheral: GPIO1, signal: 'gpio_io, 00', pin_signal: GPIO_AD_B0_00, identifier: PWR, direction: OUTPUT, gpio_init_state: 'false'}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
@@ -229,6 +225,16 @@ BOARD_InitSDWiFiPins:
void BOARD_InitSDWiFiPins(void) {
CLOCK_EnableClock(kCLOCK_Iomuxc);
+ /* GPIO configuration of PWR on GPIO_AD_B0_00 (pin M14) */
+ gpio_pin_config_t PWR_config = {
+ .direction = kGPIO_DigitalOutput,
+ .outputLogic = 0U,
+ .interruptMode = kGPIO_NoIntmode
+ };
+ /* Initialize GPIO functionality on GPIO_AD_B0_00 (pin M14) */
+ GPIO_PinInit(GPIO1, 0U, &PWR_config);
+
+ IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_00_GPIO1_IO00, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_00_USDHC2_DATA3, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_01_USDHC2_DATA2, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_02_USDHC2_DATA1, 0U);
diff --git a/board/pin_mux.h b/board/pin_mux.h
index d87c119..f7ba43d 100644
--- a/board/pin_mux.h
+++ b/board/pin_mux.h
@@ -79,6 +79,20 @@ void BOARD_InitFlexSPIPins(void);
*/
void BOARD_InituSDPins(void);
+/* GPIO_AD_B0_00 (coord M14), PWR */
+/* Routed pin properties */
+#define BOARD_INITSDWIFIPINS_PWR_PERIPHERAL GPIO1 /*!< Peripheral name */
+#define BOARD_INITSDWIFIPINS_PWR_SIGNAL gpio_io /*!< Signal name */
+#define BOARD_INITSDWIFIPINS_PWR_CHANNEL 0U /*!< Signal channel */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITSDWIFIPINS_PWR_GPIO GPIO1 /*!< GPIO peripheral base pointer */
+#define BOARD_INITSDWIFIPINS_PWR_GPIO_PIN 0U /*!< GPIO pin number */
+#define BOARD_INITSDWIFIPINS_PWR_GPIO_PIN_MASK (1U << 0U) /*!< GPIO pin mask */
+#define BOARD_INITSDWIFIPINS_PWR_PORT GPIO1 /*!< PORT peripheral base pointer */
+#define BOARD_INITSDWIFIPINS_PWR_PIN 0U /*!< PORT pin number */
+#define BOARD_INITSDWIFIPINS_PWR_PIN_MASK (1U << 0U) /*!< PORT pin mask */
+
/*!
* @brief Configures pin routing and optionally pin electrical features.
@@ -121,7 +135,7 @@ void BOARD_InitLCDPins(void);
*/
void BOARD_InitCodecPins(void);
-/* GPIO_AD_B0_00 (coord M14), CSI_ */
+/* GPIO_AD_B0_00 (coord M14), PWR */
/* Routed pin properties */
#define BOARD_INITCSIPINS_CSI_PDN_PERIPHERAL GPIO1 /*!< Peripheral name */
#define BOARD_INITCSIPINS_CSI_PDN_SIGNAL gpio_io /*!< Signal name */
diff --git a/include/FreeRTOSConfig.h b/include/FreeRTOSConfig.h
new file mode 100644
index 0000000..13431c6
--- /dev/null
+++ b/include/FreeRTOSConfig.h
@@ -0,0 +1,153 @@
+/*
+* FreeRTOS Kernel V10.4.3
+* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy of
+* this software and associated documentation files (the "Software"), to deal in
+* the Software without restriction, including without limitation the rights to
+* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+* the Software, and to permit persons to whom the Software is furnished to do so,
+* subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in all
+* copies or substantial portions of the Software.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*
+* https://www.FreeRTOS.org
+* https://github.com/FreeRTOS
+*
+*/
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+* Application specific definitions.
+*
+* These definitions should be adjusted for your particular hardware and
+* application requirements.
+*
+* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+*
+* See http://www.freertos.org/a00110.html.
+*----------------------------------------------------------*/
+
+#define configUSE_PREEMPTION 1
+#define configUSE_TICKLESS_IDLE 0
+#define configCPU_CLOCK_HZ (SystemCoreClock)
+#define configTICK_RATE_HZ ((TickType_t)1000)
+#define configMAX_PRIORITIES 8
+#define configMINIMAL_STACK_SIZE ((unsigned short)90)
+#define configMAX_TASK_NAME_LEN 20
+#define configUSE_16_BIT_TICKS 0
+#define configIDLE_SHOULD_YIELD 1
+#define configUSE_TASK_NOTIFICATIONS 1
+#define configUSE_MUTEXES 1
+#define configUSE_RECURSIVE_MUTEXES 1
+#define configUSE_COUNTING_SEMAPHORES 1
+#define configUSE_ALTERNATIVE_API 0 /* Deprecated! */
+#define configQUEUE_REGISTRY_SIZE 8
+#define configUSE_QUEUE_SETS 0
+#define configUSE_TIME_SLICING 0
+#define configUSE_NEWLIB_REENTRANT 0
+#define configENABLE_BACKWARD_COMPATIBILITY 0
+#define configNUM_THREAD_LOCAL_STORAGE_POINTERS 5
+
+/* Memory allocation related definitions. */
+#define configSUPPORT_STATIC_ALLOCATION 0
+#define configSUPPORT_DYNAMIC_ALLOCATION 1
+#define configTOTAL_HEAP_SIZE ((size_t)(128 * 1024))
+#define configAPPLICATION_ALLOCATED_HEAP 1
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK 0
+#define configUSE_TICK_HOOK 0
+#define configCHECK_FOR_STACK_OVERFLOW 0
+#define configUSE_MALLOC_FAILED_HOOK 0
+#define configUSE_DAEMON_TASK_STARTUP_HOOK 0
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS 0
+#define configUSE_TRACE_FACILITY 1
+#define configUSE_STATS_FORMATTING_FUNCTIONS 0
+
+/* Task aware debugging. */
+#define configRECORD_STACK_HIGH_ADDRESS 1
+
+/* Co-routine related definitions. */
+#define configUSE_CO_ROUTINES 0
+#define configMAX_CO_ROUTINE_PRIORITIES 2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS 1
+#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES - 1)
+#define configTIMER_QUEUE_LENGTH 10
+#define configTIMER_TASK_STACK_DEPTH (configMINIMAL_STACK_SIZE * 2)
+
+/* Define to trap errors during development. */
+#define configASSERT(x) if(( x) == 0) {taskDISABLE_INTERRUPTS(); for (;;);}
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet 1
+#define INCLUDE_uxTaskPriorityGet 1
+#define INCLUDE_vTaskDelete 1
+#define INCLUDE_vTaskSuspend 1
+#define INCLUDE_vTaskDelayUntil 1
+#define INCLUDE_vTaskDelay 1
+#define INCLUDE_xTaskGetSchedulerState 1
+#define INCLUDE_xTaskGetCurrentTaskHandle 1
+#define INCLUDE_uxTaskGetStackHighWaterMark 0
+#define INCLUDE_xTaskGetIdleTaskHandle 0
+#define INCLUDE_eTaskGetState 0
+#define INCLUDE_xTimerPendFunctionCall 1
+#define INCLUDE_xTaskAbortDelay 0
+#define INCLUDE_xTaskGetHandle 0
+#define INCLUDE_xTaskResumeFromISR 1
+
+
+
+#if defined(__ICCARM__)||defined(__CC_ARM)||defined(__GNUC__)
+/* Clock manager provides in this variable system core clock frequency */
+#include
+extern uint32_t SystemCoreClock;
+#endif
+
+/* Interrupt nesting behaviour configuration. Cortex-M specific. */
+#ifdef __NVIC_PRIO_BITS
+/* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
+#define configPRIO_BITS __NVIC_PRIO_BITS
+#else
+#define configPRIO_BITS 4 /* 15 priority levels */
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority"
+function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1U << (configPRIO_BITS)) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 2
+
+/* Interrupt priorities used by the kernel port layer itself. These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY (configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS))
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY (configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS))
+
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
+standard names. */
+#define vPortSVCHandler SVC_Handler
+#define xPortPendSVHandler PendSV_Handler
+#define xPortSysTickHandler SysTick_Handler
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/include/app_sdio.h b/include/app_sdio.h
new file mode 100644
index 0000000..3ebfb67
--- /dev/null
+++ b/include/app_sdio.h
@@ -0,0 +1,6 @@
+#ifndef APP_SDIO_H
+#define APP_SDIO_H
+
+int app_sdio_init(void);
+uint32_t app_sdio_get_id(void);
+#endif
\ No newline at end of file
diff --git a/lib/freertos b/lib/freertos
new file mode 160000
index 0000000..def7d2d
--- /dev/null
+++ b/lib/freertos
@@ -0,0 +1 @@
+Subproject commit def7d2df2b0506d3d249334974f51e427c17a41c
diff --git a/src/app_freertos.c b/src/app_freertos.c
new file mode 100644
index 0000000..674b409
--- /dev/null
+++ b/src/app_freertos.c
@@ -0,0 +1,5 @@
+#include "FreeRTOS.h"
+#include "task.h"
+
+/* Allocate the DMA-capable heap in OCRAM. */
+__attribute__((section(".freertos_heap"))) uint8_t ucHeap[configTOTAL_HEAP_SIZE];
\ No newline at end of file
diff --git a/src/app_sdio.c b/src/app_sdio.c
new file mode 100644
index 0000000..bfc47c9
--- /dev/null
+++ b/src/app_sdio.c
@@ -0,0 +1,86 @@
+#include "fsl_gpio.h"
+#include "fsl_sdio.h"
+
+#define SDIO_INSTANCE USDHC2
+#define SDIO_INSTANCE_IRQ USDHC2_IRQn
+#define SDIO_INSTANCE_IRQ_PRIO 5
+#define SDIO_CLOCK_FREQ (198000000U)
+#define SDIO_CLOCK_MAX_FREQ (200000000U)
+#define SDIO_DMA_BUF_SIZE 32
+#define SDIO_CARD_POWER_GPIO GPIO1
+#define SDIO_CARD_POWER_PIN 0
+
+static sdio_card_t s_card;
+sdio_card_int_t s_card_int;
+static sd_detect_card_t s_cd;
+static sdmmchost_t s_host;
+static sd_io_voltage_t s_io_voltage = {
+ .type = kSD_IOVoltageCtrlNotSupport,
+ .func = NULL,
+};
+
+__attribute__((section(".sdio_buf"))) static uint32_t s_sdio_dma_buffer[SDIO_DMA_BUF_SIZE];
+
+static void app_sdio_power_control(bool enable);
+static void app_sdio_interrupt_handler(void *user_data);
+
+int app_sdio_init(void) {
+ s_host.dmaDesBuffer = s_sdio_dma_buffer;
+ s_host.dmaDesBufferWordsNum = SDIO_DMA_BUF_SIZE;
+ s_host.enableCacheControl = kSDMMCHOST_CacheControlRWBuffer;
+
+ s_card.host = &s_host;
+ s_card.host->hostController.base = SDIO_INSTANCE;
+ s_card.host->hostController.sourceClock_Hz = SDIO_CLOCK_FREQ;
+
+ s_card_int.cardInterrupt = app_sdio_interrupt_handler;
+ s_card_int.userData = NULL;
+
+ s_card.usrParam.cd = &s_cd;
+ s_card.usrParam.ioVoltage = &s_io_voltage;
+ s_card.usrParam.maxFreq = SDIO_CLOCK_MAX_FREQ;
+ s_card.usrParam.pwr = app_sdio_power_control;
+ s_card.usrParam.sdioInt = &s_card_int;
+
+ /* 3V only */
+ s_card.currentTiming = kSD_TimingSDR25HighSpeedMode;
+
+ NVIC_SetPriority(SDIO_INSTANCE_IRQ, SDIO_INSTANCE_IRQ_PRIO);
+
+ if (SDIO_HostInit(&s_card) != kStatus_Success) {
+ return -1;
+ }
+
+ SDIO_SetCardPower(&s_card, false);
+ SDIO_SetCardPower(&s_card, true);
+
+ if (SDIO_CardInit(&s_card) != kStatus_Success) {
+ return -2;
+ }
+
+ if (SDIO_GetCardCapability(&s_card, kSDIO_FunctionNum1) != kStatus_Success) {
+ return -3;
+ }
+
+ return 0;
+}
+
+uint32_t app_sdio_get_id(void) {
+ uint32_t tuple_list[] = {SDIO_TPL_CODE_FUNCID, SDIO_TPL_CODE_FUNCE, SDIO_TPL_CODE_MANIFID};
+ if (SDIO_ReadCIS(&s_card, kSDIO_FunctionNum1, tuple_list, 3U) != kStatus_Success) {
+ return 0UL;
+ }
+
+ return (uint32_t)(s_card.commonCIS.mID << 16U) | (s_card.commonCIS.mInfo);
+}
+
+static void app_sdio_power_control(bool enable) {
+ if (enable) {
+ GPIO_PinWrite(SDIO_CARD_POWER_GPIO, SDIO_CARD_POWER_PIN, 1U);
+ } else {
+ GPIO_PinWrite(SDIO_CARD_POWER_GPIO, SDIO_CARD_POWER_PIN, 0U);
+ }
+}
+
+static void app_sdio_interrupt_handler(void *user_data) { /* -- */
+}
\ No newline at end of file
diff --git a/src/main.c b/src/main.c
index 4c63a63..c2285a0 100644
--- a/src/main.c
+++ b/src/main.c
@@ -6,6 +6,17 @@
/* Debug console */
#include "fsl_debug_console.h"
+/* FreeRTOS */
+#include "FreeRTOS.h"
+#include "task.h"
+
+/* App */
+#include "app_sdio.h"
+
+#define INITIALIZE_TASK_STACK_DEPTH (2048)
+
+static void initialize_task(void *parameters);
+
int main(void) {
BOARD_InitBootPins();
BOARD_InitBootClocks();
@@ -18,7 +29,31 @@ int main(void) {
PRINTF("CPU frequency: %d\r\n", CLOCK_GetCoreSysClkFreq());
+ if (xTaskCreate(initialize_task, "INIT", INITIALIZE_TASK_STACK_DEPTH, NULL, 2, NULL) != pdPASS) {
+ PRINTF("Failed to create initialization task.\r\n");
+ }
+
+ vTaskStartScheduler();
+
for (;;) {
__WFI();
}
}
+
+static void initialize_task(void *parameters) {
+ PRINTF("Initialization task running...\r\n");
+
+ int ret = app_sdio_init();
+ if (ret != 0) {
+ PRINTF("SDIO card initialization failed...\r\n");
+ } else {
+ PRINTF("SDIO card initialization succeeded.\r\n");
+
+ uint32_t mfid = app_sdio_get_id();
+
+ PRINTF("Read card VID/PID: %04x:%04x\r\n", (mfid >> 16U), (mfid & 0xFFFFU));
+ }
+
+ PRINTF("Initialization task exit.\r\n");
+ vTaskDelete(NULL);
+}
\ No newline at end of file