generated from Embedded_Projects/Fire_RT1052_Pro_Template
67 lines
2.8 KiB
C
67 lines
2.8 KiB
C
/*
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* Copyright 2017-2020 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "fire_rt1052_pro_flexspi_nor_config.h"
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/* Component ID definition, used by tools. */
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#ifndef FSL_COMPONENT_ID
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#define FSL_COMPONENT_ID "platform.drivers.xip_board"
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#endif
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/*******************************************************************************
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* Code
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******************************************************************************/
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#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
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#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
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__attribute__((section(".boot_hdr.conf"), used))
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#elif defined(__ICCARM__)
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#pragma location = ".boot_hdr.conf"
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#endif
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const flexspi_nor_config_t spiflash_config = {
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.memConfig = {
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.tag = FLEXSPI_CFG_BLK_TAG,
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.version = FLEXSPI_CFG_BLK_VERSION,
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.readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackInternally,
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.csHoldTime = 3U,
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.csSetupTime = 3U,
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.columnAddressWidth = 0U,
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.deviceType = kFlexSpiDeviceType_SerialNOR,
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.sflashPadType = kSerialFlash_4Pads,
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.serialClkFreq = kFlexSpiSerialClk_133MHz,
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.sflashA1Size = 32U * 1024U * 1024U,
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.busyOffset = 0U,
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.busyBitPolarity = 1U,
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.lookupTable = {
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// Fast read quad IO (EBh) [NOR_CMD_LUT_SEQ_IDX_READ]
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[4U * 0 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
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[4U * 0 + 1U] = FLEXSPI_LUT_SEQ(MODE8_SDR, FLEXSPI_4PAD, 0xF0, DUMMY_SDR, FLEXSPI_4PAD, 0x04),
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[4U * 0 + 2U] = FLEXSPI_LUT_SEQ(READ_SDR, FLEXSPI_4PAD, 0x00, STOP, FLEXSPI_1PAD, 0x00),
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// Read SR1 (05h) [NOR_CMD_LUT_SEQ_IDX_READSTATUS]
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[4U * 1 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x00),
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// Write enable (06h) [NOR_CMD_LUT_SEQ_IDX_WRITEENABLE]
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[4U * 3 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, FLEXSPI_1PAD, 0x00),
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// Page program () [NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM]
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[4U * 4 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x32, RADDR_SDR, FLEXSPI_4PAD, 0x18),
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[4U * 4 + 1U] = FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_4PAD, 0x00, STOP, FLEXSPI_1PAD, 0x00),
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// Erase sector (20h) [NOR_CMD_LUT_SEQ_IDX_ERASESECTOR]
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[4U * 5 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20, RADDR_SDR, FLEXSPI_1PAD, 0x18),
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// Erase block 32kB (52h) [NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK]
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[4U * 8 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x52, RADDR_SDR, FLEXSPI_1PAD, 0x18),
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},
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},
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.pageSize = 256u,
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.sectorSize = 4u * 1024u,
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.blockSize = 32u * 1024u,
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};
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#endif /* XIP_BOOT_HEADER_ENABLE */
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