Added header, use PERCK to avoid QSPI frequency change.
Signed-off-by: Yilin Sun <imi415@imi.moe>
This commit is contained in:
parent
e721d02736
commit
2a7a123d53
|
@ -29,6 +29,7 @@ set(TARGET_SOURCES
|
|||
"SDK/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.c"
|
||||
"SDK/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.c"
|
||||
"SDK/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.c"
|
||||
"board/board.c"
|
||||
"board/clock_config.c"
|
||||
"board/peripherals.c"
|
||||
"board/pin_mux.c"
|
||||
|
|
|
@ -0,0 +1,7 @@
|
|||
#include "board.h"
|
||||
|
||||
void Error_Handler(void) {
|
||||
for (;;) {
|
||||
/* -- */
|
||||
}
|
||||
}
|
|
@ -0,0 +1,6 @@
|
|||
#ifndef BOARD_H
|
||||
#define BOARD_H
|
||||
|
||||
void Error_Handler(void);
|
||||
|
||||
#endif // BOARD_H
|
|
@ -1,12 +1,17 @@
|
|||
#include "clock_config.h"
|
||||
|
||||
#include "board.h"
|
||||
#include "stm32h7xx_hal.h"
|
||||
|
||||
static void Error_Handler(void) {
|
||||
for (;;) {
|
||||
/* -- */
|
||||
}
|
||||
}
|
||||
static void SystemClock_Config(void);
|
||||
static void PeriphCommonClock_Config(void);
|
||||
|
||||
void BOARD_InitBootClocks(void) {
|
||||
SystemClock_Config();
|
||||
PeriphCommonClock_Config();
|
||||
}
|
||||
|
||||
static void SystemClock_Config(void) {
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||
|
||||
|
@ -21,19 +26,13 @@ void BOARD_InitBootClocks(void) {
|
|||
while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {
|
||||
}
|
||||
|
||||
/** Macro to configure the PLL clock source
|
||||
*/
|
||||
__HAL_RCC_PLL_PLLSOURCE_CONFIG(RCC_PLLSOURCE_HSE);
|
||||
|
||||
/** Initializes the RCC Oscillators according to the specified parameters
|
||||
* in the RCC_OscInitTypeDef structure.
|
||||
*/
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
|
||||
RCC_OscInitStruct.HSIState = RCC_HSI_DIV1;
|
||||
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
|
@ -53,4 +52,16 @@ void BOARD_InitBootClocks(void) {
|
|||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
}
|
||||
|
||||
static void PeriphCommonClock_Config(void) {
|
||||
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
|
||||
|
||||
/** Initializes the peripherals clock
|
||||
*/
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CKPER;
|
||||
PeriphClkInitStruct.CkperClockSelection = RCC_CLKPSOURCE_HSI;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
}
|
|
@ -1,23 +1,18 @@
|
|||
#include "peripherals.h"
|
||||
|
||||
#include "board.h"
|
||||
|
||||
QSPI_HandleTypeDef hqspi;
|
||||
|
||||
static void Error_Handler(void);
|
||||
static void QUADSPI_Init(void);
|
||||
|
||||
void BOARD_InitBootPeripherals(void) {
|
||||
QUADSPI_Init();
|
||||
}
|
||||
|
||||
static void Error_Handler(void) {
|
||||
for (;;) {
|
||||
/* -- */
|
||||
}
|
||||
}
|
||||
|
||||
static void QUADSPI_Init(void) {
|
||||
hqspi.Instance = QUADSPI;
|
||||
hqspi.Init.ClockPrescaler = 1;
|
||||
hqspi.Init.ClockPrescaler = 0;
|
||||
hqspi.Init.FifoThreshold = 4;
|
||||
hqspi.Init.SampleShifting = QSPI_SAMPLE_SHIFTING_NONE;
|
||||
hqspi.Init.FlashSize = 25;
|
||||
|
@ -34,15 +29,7 @@ void HAL_QSPI_MspInit(QSPI_HandleTypeDef* qspiHandle) {
|
|||
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
|
||||
if (qspiHandle->Instance == QUADSPI) {
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_QSPI;
|
||||
PeriphClkInitStruct.PLL2.PLL2M = 5;
|
||||
PeriphClkInitStruct.PLL2.PLL2N = 120;
|
||||
PeriphClkInitStruct.PLL2.PLL2P = 2;
|
||||
PeriphClkInitStruct.PLL2.PLL2Q = 2;
|
||||
PeriphClkInitStruct.PLL2.PLL2R = 4;
|
||||
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_2;
|
||||
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOWIDE;
|
||||
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
|
||||
PeriphClkInitStruct.QspiClockSelection = RCC_QSPICLKSOURCE_PLL2;
|
||||
PeriphClkInitStruct.QspiClockSelection = RCC_QSPICLKSOURCE_CLKP;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
|
|
|
@ -0,0 +1,16 @@
|
|||
#ifndef BOOT_HEADER_H
|
||||
#define BOOT_HEADER_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#define BOOT_HEADER_SIGNATURE_VALID 0x46434642 /* FCFB */
|
||||
#define BOOT_HEADER_CONFIG_INIT_SDRAM_Pos 0
|
||||
#define BOOT_HEADER_CONFIG_INIT_SDRAM_Msk (1 << BOOT_HEADER_CONFIG_INIT_SDRAM_Pos)
|
||||
|
||||
typedef struct {
|
||||
uint32_t signature;
|
||||
uint32_t config;
|
||||
uint32_t base;
|
||||
} boot_header_t;
|
||||
|
||||
#endif // BOOT_HEADER_H
|
19
src/main.c
19
src/main.c
|
@ -1,9 +1,9 @@
|
|||
#include "boot_header.h"
|
||||
#include "clock_config.h"
|
||||
#include "peripherals.h"
|
||||
#include "pin_mux.h"
|
||||
|
||||
#define APP_BASE (0x90000000)
|
||||
#define APP_MAX_SIZE (256 * 1024 * 1024) /* Maximum Quad SPI address space */
|
||||
#define APP_FCFB_BASE (0x90000000)
|
||||
|
||||
typedef void (*app_entry_t)(void);
|
||||
|
||||
|
@ -56,18 +56,21 @@ static int app_map_qspi(void) {
|
|||
}
|
||||
|
||||
static int app_boot_xip(void) {
|
||||
uint32_t initial_sp = *(uint32_t *)APP_BASE;
|
||||
uint32_t reset_vect = *(uint32_t *)(APP_BASE + 4);
|
||||
boot_header_t *hdr = (boot_header_t *)(APP_FCFB_BASE);
|
||||
|
||||
if ((reset_vect < APP_BASE) || (reset_vect > (APP_BASE + APP_MAX_SIZE))) {
|
||||
/* PC is invalid */
|
||||
/* Invalid configuration header */
|
||||
if (hdr->signature != BOOT_HEADER_SIGNATURE_VALID) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
app_entry_t entry = (app_entry_t)reset_vect;
|
||||
uint32_t app_base = hdr->base;
|
||||
|
||||
uint32_t initial_sp = *(uint32_t *)app_base;
|
||||
uint32_t reset_vect = *(uint32_t *)(app_base + 4);
|
||||
app_entry_t entry = (app_entry_t)reset_vect;
|
||||
|
||||
SysTick->CTRL = 0U; /* Disable SysTick interrupt */
|
||||
SCB->VTOR = APP_BASE; /* Initialize */
|
||||
SCB->VTOR = app_base; /* Initialize vector table */
|
||||
__set_MSP(initial_sp);
|
||||
entry();
|
||||
|
||||
|
|
Loading…
Reference in New Issue