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LPC5410x_Wearable_AzRTOS
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Initial ThreadX project. 

Signed-off-by: Yilin Sun <imi415@imi.moe>
This commit is contained in:
Yilin Sun 2023-12-05 22:15:34 +08:00
parent 97e7442b51
commit e654739d7d
Signed by: imi415
GPG Key ID: 17F01E106F9F5E0A
16 changed files with 1009 additions and 106 deletions
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5
.clang-format
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@ -1,8 +1,9 @@
BasedOnStyle: Google
IndentWidth: 4
AlignConsecutiveMacros: Consecutive
AlignConsecutiveDeclarations: true
AlignConsecutiveAssignments: true
AlignConsecutiveDeclarations: Consecutive
AlignConsecutiveAssignments: Consecutive
AllowShortFunctionsOnASingleLine: None
BreakBeforeBraces: Custom
BraceWrapping:
AfterEnum: false

3
.gitmodules vendored
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@ -1,3 +1,6 @@
[submodule "SDK"]
path = SDK
url = https://git.minori.work/Embedded_SDK/MCUXpresso_LPC54102.git
[submodule "lib/threadx"]
path = lib/threadx
url = https://github.com/azure-rtos/threadx.git

12
CMakeLists.txt
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@ -1,6 +1,6 @@
cmake_minimum_required(VERSION 3.10)
project(lpc54102_hello)
project(lpc54102_azrtos)
enable_language(CXX)
enable_language(ASM)
@ -51,6 +51,7 @@ set(TARGET_SOURCES
"board/clock_config.c"
"board/peripherals.c"
"board/pin_mux.c"
"src/app_init.c"
"src/main.c"
"src/pah8001_impl.c"
)
@ -77,8 +78,12 @@ set(TARGET_C_INCLUDES
# Shared libraries linked with application
set(TARGET_LIBS
"threadx"
"power_cm4_hardabi"
"pah8001"
"c"
"m"
"nosys"
)
# Shared library and linker script search paths
@ -106,6 +111,11 @@ set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--gc-sections")
add_subdirectory(lib/pixart_pah8001ei)
set(THREADX_ARCH "cortex_m4" CACHE STRING "")
set(THREADX_TOOLCHAIN "gnu" CACHE STRING "")
set(TX_USER_FILE "${CMAKE_CURRENT_SOURCE_DIR}/include/tx_user.h" CACHE STRING "")
add_subdirectory(lib/threadx)
# Shared sources, includes and definitions
add_compile_definitions(${TARGET_C_DEFINES})
include_directories(${TARGET_C_INCLUDES})

302
LPC54102J512_M4F.mex Normal file
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@ -0,0 +1,302 @@
<?xml version="1.0" encoding= "UTF-8" ?>
<configuration name="LPC54102J512" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_14 http://mcuxpresso.nxp.com/XSD/mex_configuration_14.xsd" uuid="1ea9ba79-e007-415b-b3ad-7f5dc302a761" version="14" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_14" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<common>
<processor>LPC54102J512</processor>
<package>LPC54102J512BD64</package>
<mcu_data>ksdk2_0</mcu_data>
<cores selected="cm4">
<core name="Cortex-M0P" id="cm0plus" description=""/>
<core name="Cortex-M4F" id="cm4" description=""/>
</cores>
<description></description>
</common>
<preferences>
<validate_boot_init_only>true</validate_boot_init_only>
<generate_extended_information>false</generate_extended_information>
<generate_code_modified_registers_only>false</generate_code_modified_registers_only>
<update_include_paths>true</update_include_paths>
<generate_registers_defines>false</generate_registers_defines>
</preferences>
<tools>
<pins name="Pins" version="14.0" enabled="true" update_project_code="true">
<generated_project_files>
<file path="board/pin_mux.c" update_enabled="true"/>
<file path="board/pin_mux.h" update_enabled="true"/>
</generated_project_files>
<pins_profile>
<processor_version>14.0.0</processor_version>
<pin_labels>
<pin_label pin_num="28" pin_signal="PIO1_8/ADC_11/SPI1_MISO/CT32B1_MAT3/CT32B1_CAP3" label="R" identifier="LED_R;R"/>
<pin_label pin_num="41" pin_signal="PIO0_7/U1_SCLK/SCT0_OUT0/CT32B0_MAT2/CT32B0_CAP2" label="BMM_DRDY" identifier="BMM_DRDY"/>
</pin_labels>
</pins_profile>
<functions_list>
<function name="BOARD_InitDbgUARTPins">
<description>Configures pin routing and optionally pin electrical features.</description>
<options>
<callFromInitBoot>true</callFromInitBoot>
<coreID>cm4</coreID>
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="Peripheral" resourceId="USART0" description="Peripheral USART0 is not initialized" problem_level="1" source="Pins:BOARD_InitDbgUARTPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitDbgUARTPins">
<feature name="enabled" evaluation="equal">
<data>true</data>
</feature>
</dependency>
</dependencies>
<pins>
<pin peripheral="USART0" signal="RXD" pin_num="31" pin_signal="PIO0_0/U0_RXD/SPI0_SSEL0/CT32B0_CAP0/SCT0_OUT3"/>
<pin peripheral="USART0" signal="TXD" pin_num="32" pin_signal="PIO0_1/U0_TXD/SPI0_SSEL1/CT32B0_CAP1/SCT0_OUT1"/>
</pins>
</function>
<function name="BOARD_InitI2CSensorPins">
<description>Configures pin routing and optionally pin electrical features.</description>
<options>
<callFromInitBoot>true</callFromInitBoot>
<coreID>cm4</coreID>
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="Peripheral" resourceId="I2C0" description="Peripheral I2C0 is not initialized" problem_level="1" source="Pins:BOARD_InitI2CSensorPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="Peripheral" resourceId="PINT" description="Peripheral PINT is not initialized" problem_level="1" source="Pins:BOARD_InitI2CSensorPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitI2CSensorPins">
<feature name="enabled" evaluation="equal">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.inputmux" description="Pins initialization requires the INPUTMUX Driver in the project." problem_level="2" source="Pins:BOARD_InitI2CSensorPins">
<feature name="enabled" evaluation="equal">
<data>true</data>
</feature>
</dependency>
</dependencies>
<pins>
<pin peripheral="I2C0" signal="SCL" pin_num="1" pin_signal="PIO0_23/I2C0_SCL/CT32B0_CAP0"/>
<pin peripheral="I2C0" signal="SDA" pin_num="2" pin_signal="PIO0_24/I2C0_SDA/CT32B0_CAP1/CT32B0_MAT0"/>
<pin peripheral="PINT" signal="PINT, 0" pin_num="41" pin_signal="PIO0_7/U1_SCLK/SCT0_OUT0/CT32B0_MAT2/CT32B0_CAP2"/>
</pins>
</function>
<function name="BOARD_InitLEDPins">
<description>Configures pin routing and optionally pin electrical features.</description>
<options>
<callFromInitBoot>true</callFromInitBoot>
<coreID>cm4</coreID>
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitLEDPins">
<feature name="enabled" evaluation="equal">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_gpio" description="Pins initialization requires the LPC_GPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitLEDPins">
<feature name="enabled" evaluation="equal">
<data>true</data>
</feature>
</dependency>
</dependencies>
<pins>
<pin peripheral="GPIO" signal="PIO1, 8" pin_num="28" pin_signal="PIO1_8/ADC_11/SPI1_MISO/CT32B1_MAT3/CT32B1_CAP3">
<pin_features>
<pin_feature name="identifier" value="R"/>
<pin_feature name="direction" value="OUTPUT"/>
<pin_feature name="gpio_init_state" value="true"/>
<pin_feature name="open_drain" value="enabled"/>
</pin_features>
</pin>
</pins>
</function>
</functions_list>
</pins>
<clocks name="Clocks" version="12.0" enabled="true" update_project_code="true">
<generated_project_files>
<file path="board/clock_config.c" update_enabled="true"/>
<file path="board/clock_config.h" update_enabled="true"/>
</generated_project_files>
<clocks_profile>
<processor_version>14.0.0</processor_version>
</clocks_profile>
<clock_configurations>
<clock_configuration name="BOARD_BootClockIRC12M" id_prefix="" prefix_user_defined="false">
<description></description>
<options/>
<dependencies>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockIRC12M">
<feature name="enabled" evaluation="equal" configuration="cm0plus">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockIRC12M">
<feature name="enabled" evaluation="equal" configuration="cm4">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockIRC12M">
<feature name="enabled" evaluation="equal" configuration="cm0plus">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockIRC12M">
<feature name="enabled" evaluation="equal" configuration="cm4">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockIRC12M">
<feature name="enabled" evaluation="equal" configuration="cm0plus">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockIRC12M">
<feature name="enabled" evaluation="equal" configuration="cm4">
<data>true</data>
</feature>
</dependency>
</dependencies>
<clock_sources/>
<clock_outputs>
<clock_output id="ASYNCAPB_clock.outFreq" value="12 MHz" locked="false" accuracy=""/>
<clock_output id="FRG_clock.outFreq" value="12 MHz" locked="false" accuracy=""/>
<clock_output id="MAIN_clock.outFreq" value="12 MHz" locked="false" accuracy=""/>
<clock_output id="System_clock.outFreq" value="12 MHz" locked="false" accuracy=""/>
</clock_outputs>
<clock_settings/>
<called_from_default_init>false</called_from_default_init>
</clock_configuration>
<clock_configuration name="BOARD_BootClockPLL150M" id_prefix="" prefix_user_defined="false">
<description></description>
<options/>
<dependencies>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
<feature name="enabled" evaluation="equal" configuration="cm0plus">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
<feature name="enabled" evaluation="equal" configuration="cm4">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
<feature name="enabled" evaluation="equal" configuration="cm0plus">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
<feature name="enabled" evaluation="equal" configuration="cm4">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
<feature name="enabled" evaluation="equal" configuration="cm0plus">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
<feature name="enabled" evaluation="equal" configuration="cm4">
<data>true</data>
</feature>
</dependency>
</dependencies>
<clock_sources/>
<clock_outputs>
<clock_output id="ASYNCAPB_clock.outFreq" value="50 MHz" locked="false" accuracy=""/>
<clock_output id="FRG_clock.outFreq" value="50 MHz" locked="false" accuracy=""/>
<clock_output id="MAIN_clock.outFreq" value="150 MHz" locked="false" accuracy=""/>
<clock_output id="SYSTICK_clock.outFreq" value="10 MHz" locked="false" accuracy=""/>
<clock_output id="System_clock.outFreq" value="150 MHz" locked="false" accuracy=""/>
</clock_outputs>
<clock_settings>
<setting id="PLL_Mode" value="Normal" locked="false"/>
<setting id="ASYNC_SYSCON.ASYNCAPBCLKSELB.sel" value="SYSCON.pll_clk" locked="false"/>
<setting id="ASYNC_SYSCON.ASYNCCLKDIV.scale" value="3" locked="false"/>
<setting id="SYSCON.CLKOUTDIV.scale" value="0" locked="true"/>
<setting id="SYSCON.DIRECTO.sel" value="SYSCON.PLL" locked="false"/>
<setting id="SYSCON.MAINCLKSELB.sel" value="SYSCON.PLL_BYPASS" locked="false"/>
<setting id="SYSCON.M_MULT.scale" value="50" locked="true"/>
<setting id="SYSCON.N_DIV.scale" value="4" locked="true"/>
<setting id="SYSCON.PLL_BYPASS.sel" value="SYSCON.DIRECTO" locked="false"/>
<setting id="SYSCON.SYSTICKCLKDIV.scale" value="15" locked="true"/>
</clock_settings>
<called_from_default_init>true</called_from_default_init>
</clock_configuration>
</clock_configurations>
</clocks>
<dcdx name="DCDx" version="3.0" enabled="false" update_project_code="true">
<generated_project_files/>
<dcdx_profile>
<processor_version>N/A</processor_version>
</dcdx_profile>
<dcdx_configurations/>
</dcdx>
<periphs name="Peripherals" version="13.0" enabled="true" update_project_code="true">
<generated_project_files>
<file path="board/peripherals.c" update_enabled="true"/>
<file path="board/peripherals.h" update_enabled="true"/>
</generated_project_files>
<peripherals_profile>
<processor_version>14.0.0</processor_version>
</peripherals_profile>
<functional_groups>
<functional_group name="BOARD_InitPeripherals" uuid="bf976c30-387a-4c02-956c-44a37954526e" called_from_default_init="true" id_prefix="" core="cm4">
<description></description>
<options/>
<dependencies/>
<instances>
<instance name="NVIC" uuid="95540aad-a83e-4f89-94d4-464eb84246d4" type="nvic" type_id="nvic_57b5eef3774cc60acaede6f5b8bddc67" mode="general" peripheral="NVIC" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
<config_set name="nvic">
<array name="interrupt_table"/>
<array name="interrupts"/>
</config_set>
</instance>
</instances>
</functional_group>
</functional_groups>
<components>
<component name="system" uuid="cc67576e-3877-4631-9c7a-e1d9b9e83de8" type_id="system_54b53072540eeeb8f8e9343e71f28176">
<config_set_global name="global_system_definitions">
<setting name="user_definitions" value=""/>
<setting name="user_includes" value=""/>
</config_set_global>
</component>
<component name="generic_enet" uuid="5ffbd600-f4df-47f4-a24a-89f26ae3ed5d" type_id="generic_enet_74db5c914f0ddbe47d86af40cb77a619">
<config_set_global name="global_enet"/>
</component>
<component name="gpio_adapter_common" uuid="5c9d5317-8314-492b-a7aa-30770c852e97" type_id="gpio_adapter_common_57579b9ac814fe26bf95df0a384c36b6">
<config_set_global name="global_gpio_adapter_common" quick_selection="default"/>
</component>
<component name="generic_uart" uuid="bec6b8dc-b0c5-4d78-abf3-d017e2ce7fb5" type_id="generic_uart_8cae00565451cf2346eb1b8c624e73a6">
<config_set_global name="global_uart"/>
</component>
<component name="msg" uuid="e18af729-56ac-47f2-8d00-92b4ba3f397c" type_id="msg_6e2baaf3b97dbeef01c0043275f9a0e7">
<config_set_global name="global_messages"/>
</component>
<component name="uart_cmsis_common" uuid="479c3868-fe65-4e98-8a49-98e528e48024" type_id="uart_cmsis_common_9cb8e302497aa696fdbb5a4fd622c2a8">
<config_set_global name="global_USART_CMSIS_common" quick_selection="default"/>
</component>
<component name="generic_can" uuid="0cb95633-444b-4c6d-aa5f-880a06665ab5" type_id="generic_can_1bfdd78b1af214566c1f23cf6a582d80">
<config_set_global name="global_can"/>
</component>
</components>
</periphs>
<tee name="TEE" version="4.0" enabled="false" update_project_code="true">
<generated_project_files/>
<tee_profile>
<processor_version>N/A</processor_version>
</tee_profile>
</tee>
</tools>
</configuration>

1
SDK Submodule

@ -0,0 +1 @@
Subproject commit ada43e86a127cf8ad552012e98a4eeb63d717606

97
board/clock_config.c
View File

@ -19,11 +19,11 @@
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Clocks v9.0
product: Clocks v12.0
processor: LPC54102J512
package_id: LPC54102J512BD64
mcu_data: ksdk2_0
processor_version: 11.0.1
processor_version: 14.0.0
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
@ -38,25 +38,22 @@ processor_version: 11.0.1
/*******************************************************************************
* Variables
******************************************************************************/
/* System clock frequency. */
extern uint32_t SystemCoreClock;
/*******************************************************************************
************************ BOARD_InitBootClocks function ************************
******************************************************************************/
void BOARD_InitBootClocks(void)
{
BOARD_BootClockRUN();
BOARD_BootClockPLL150M();
}
/*******************************************************************************
********************** Configuration BOARD_BootClockRUN ***********************
******************** Configuration BOARD_BootClockIRC12M **********************
******************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockRUN
called_from_default_init: true
name: BOARD_BootClockIRC12M
outputs:
- {id: ASYNCAPB_clock.outFreq, value: 12 MHz}
- {id: FRG_clock.outFreq, value: 12 MHz}
@ -66,12 +63,12 @@ outputs:
/* clang-format on */
/*******************************************************************************
* Variables for BOARD_BootClockRUN configuration
* Variables for BOARD_BootClockIRC12M configuration
******************************************************************************/
/*******************************************************************************
* Code for BOARD_BootClockRUN configuration
* Code for BOARD_BootClockIRC12M configuration
******************************************************************************/
void BOARD_BootClockRUN(void)
void BOARD_BootClockIRC12M(void)
{
/*!< Set up the clock sources */
/*!< Set up IRC */
@ -96,6 +93,82 @@ void BOARD_BootClockRUN(void)
CLOCK_AttachClk(kIRC12M_to_MAIN_CLK); /*!< Switch MAIN_CLK to IRC12M */
/*!< Set SystemCoreClock variable. */
SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
SystemCoreClock = BOARD_BOOTCLOCKIRC12M_CORE_CLOCK;
}
/*******************************************************************************
******************** Configuration BOARD_BootClockPLL150M *********************
******************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockPLL150M
called_from_default_init: true
outputs:
- {id: ASYNCAPB_clock.outFreq, value: 50 MHz}
- {id: FRG_clock.outFreq, value: 50 MHz}
- {id: MAIN_clock.outFreq, value: 150 MHz}
- {id: SYSTICK_clock.outFreq, value: 10 MHz}
- {id: System_clock.outFreq, value: 150 MHz}
settings:
- {id: PLL_Mode, value: Normal}
- {id: ASYNC_SYSCON.ASYNCAPBCLKSELB.sel, value: SYSCON.pll_clk}
- {id: ASYNC_SYSCON.ASYNCCLKDIV.scale, value: '3'}
- {id: SYSCON.CLKOUTDIV.scale, value: '0', locked: true}
- {id: SYSCON.DIRECTO.sel, value: SYSCON.PLL}
- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL_BYPASS}
- {id: SYSCON.M_MULT.scale, value: '50', locked: true}
- {id: SYSCON.N_DIV.scale, value: '4', locked: true}
- {id: SYSCON.PLL_BYPASS.sel, value: SYSCON.DIRECTO}
- {id: SYSCON.SYSTICKCLKDIV.scale, value: '15', locked: true}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
/*******************************************************************************
* Variables for BOARD_BootClockPLL150M configuration
******************************************************************************/
/*******************************************************************************
* Code for BOARD_BootClockPLL150M configuration
******************************************************************************/
void BOARD_BootClockPLL150M(void)
{
/*!< Set up the clock sources */
/*!< Set up IRC */
POWER_DisablePD(kPDRUNCFG_PD_IRC_OSC); /*!< Ensure IRC OSC is on */
POWER_DisablePD(kPDRUNCFG_PD_IRC); /*!< Ensure IRC is on */
CLOCK_AttachClk(kIRC12M_to_MAIN_CLK); /*!< Switch to IRC 12MHz first to ensure we can change voltage without accidentally
being below the voltage for current speed */
/*!< Set up PLL */
CLOCK_AttachClk(kIRC12M_to_SYS_PLL); /*!< Switch SYSPLLCLKSEL to IRC12M */
POWER_DisablePD(kPDRUNCFG_PD_SYS_PLL); /*!< Ensure PLL is on */
const pll_setup_t pllSetup = {
.syspllctrl = SYSCON_SYSPLLCTRL_BANDSEL_MASK | SYSCON_SYSPLLCTRL_SELI(52U) | SYSCON_SYSPLLCTRL_SELP(26U) | SYSCON_SYSPLLCTRL_DIRECTO_MASK,
.syspllndec = SYSCON_SYSPLLNDEC_NDEC(2U),
.syspllpdec = SYSCON_SYSPLLPDEC_PDEC(2U),
.syspllssctrl = {(SYSCON_SYSPLLSSCTRL0_MDEC(32597U) | SYSCON_SYSPLLSSCTRL0_SEL_EXT_MASK),0x0U},
.pllRate = 150000000U,
.flags = PLL_SETUPFLAG_WAITLOCK
};
CLOCK_SetPLLFreq(&pllSetup); /*!< Configure PLL to the desired values */
POWER_SetVoltageForFreq(150000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
CLOCK_SetFLASHAccessCyclesForFreq(150000000U); /*!< Set FLASH wait states for core */
/*!< Set up dividers */
CLOCK_SetClkDiv(kCLOCK_DivSystickClk, 15U, false); /*!< Set SYSTICKCLKDIV divider to value 15 */
CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
SYSCON->ASYNCAPBCTRL = SYSCON_ASYNCAPBCTRL_ENABLE_MASK; /*!< Enable ASYNC APB subsystem */
Clock_SetAsyncClkDiv(3U); /*!< Set ASYNCCLKDIV divider to value 3 */
ASYNC_SYSCON->FRGCTRL = ((ASYNC_SYSCON->FRGCTRL & ~ASYNC_SYSCON_FRGCTRL_MULT_MASK) | ASYNC_SYSCON_FRGCTRL_MULT(0U)); /*!< Set FRG MULT to value 0 */
ASYNC_SYSCON->ASYNCAPBCLKCTRL |= ASYNC_SYSCON_ASYNCAPBCLKCTRL_FRG0_MASK; /*!< Enable FRG clock */
/*!< Set up clock selectors - Attach clocks to the peripheries */
CLOCK_AttachClk(kSYS_PLL_OUT_to_MAIN_CLK); /*!< Switch MAIN_CLK to SYS_PLL_OUT */
CLOCK_AttachClk(kSYS_PLL_OUT_to_ASYNC_APB); /*!< Switch ASYNC_APB to SYS_PLL_OUT */
/*!< Set SystemCoreClock variable. */
SystemCoreClock = BOARD_BOOTCLOCKPLL150M_CORE_CLOCK;
}

60
board/clock_config.h
View File

@ -33,16 +33,28 @@ void BOARD_InitBootClocks(void);
#endif /* __cplusplus*/
/*******************************************************************************
********************** Configuration BOARD_BootClockRUN ***********************
******************** Configuration BOARD_BootClockIRC12M **********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockRUN configuration
* Definitions for BOARD_BootClockIRC12M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 12000000U /*!< Core clock frequency: 12000000Hz */
#define BOARD_BOOTCLOCKIRC12M_CORE_CLOCK 12000000U /*!< Core clock frequency: 12000000Hz */
/* Clock outputs (values are in Hz): */
#define BOARD_BOOTCLOCKIRC12M_ASYNCADC_CLOCK 0UL /* Clock consumers of ASYNCADC_clock output : ADC0 */
#define BOARD_BOOTCLOCKIRC12M_ASYNCAPB_CLOCK 12000000UL /* Clock consumers of ASYNCAPB_clock output : CTIMER0, CTIMER1, I2C0, I2C1, I2C2, SPI0, SPI1, USART0, USART1, USART2, USART3 */
#define BOARD_BOOTCLOCKIRC12M_CLK32K_CLOCK 0UL /* Clock consumers of CLK32K_clock output : USART0, USART1, USART2, USART3 */
#define BOARD_BOOTCLOCKIRC12M_CLKOUT_CLOCK 0UL /* Clock consumers of CLKOUT_clock output : N/A */
#define BOARD_BOOTCLOCKIRC12M_FRG_CLOCK 12000000UL /* Clock consumers of FRG_clock output : USART0, USART1, USART2, USART3 */
#define BOARD_BOOTCLOCKIRC12M_MAIN_CLOCK 12000000UL /* Clock consumers of MAIN_clock output : RIT */
#define BOARD_BOOTCLOCKIRC12M_SYSTICK_CLOCK 0UL /* Clock consumers of SYSTICK_clock output : N/A */
#define BOARD_BOOTCLOCKIRC12M_SYSTEM_CLOCK 12000000UL /* Clock consumers of System_clock output : ADC0, CTIMER2, CTIMER3, CTIMER4, DMA0, GINT0, GINT1, GPIO, INPUTMUX, IOCON, MAILBOX, MRT0, NVIC, PINT, RIT, SCT0, SWD, UTICK0, WWDT */
#define BOARD_BOOTCLOCKIRC12M_TRACE_CLOCK 0UL /* Clock consumers of TRACE_clock output : SWD */
#define BOARD_BOOTCLOCKIRC12M_WDT_CLOCK 0UL /* Clock consumers of WDT_clock output : UTICK0, WWDT */
/*******************************************************************************
* API for BOARD_BootClockRUN configuration
* API for BOARD_BootClockIRC12M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
@ -52,7 +64,45 @@ extern "C" {
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockRUN(void);
void BOARD_BootClockIRC12M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************** Configuration BOARD_BootClockPLL150M *********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockPLL150M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKPLL150M_CORE_CLOCK 150000000U /*!< Core clock frequency: 150000000Hz */
/* Clock outputs (values are in Hz): */
#define BOARD_BOOTCLOCKPLL150M_ASYNCADC_CLOCK 0UL /* Clock consumers of ASYNCADC_clock output : ADC0 */
#define BOARD_BOOTCLOCKPLL150M_ASYNCAPB_CLOCK 50000000UL /* Clock consumers of ASYNCAPB_clock output : CTIMER0, CTIMER1, I2C0, I2C1, I2C2, SPI0, SPI1, USART0, USART1, USART2, USART3 */
#define BOARD_BOOTCLOCKPLL150M_CLK32K_CLOCK 0UL /* Clock consumers of CLK32K_clock output : USART0, USART1, USART2, USART3 */
#define BOARD_BOOTCLOCKPLL150M_CLKOUT_CLOCK 0UL /* Clock consumers of CLKOUT_clock output : N/A */
#define BOARD_BOOTCLOCKPLL150M_FRG_CLOCK 50000000UL /* Clock consumers of FRG_clock output : USART0, USART1, USART2, USART3 */
#define BOARD_BOOTCLOCKPLL150M_MAIN_CLOCK 150000000UL /* Clock consumers of MAIN_clock output : RIT */
#define BOARD_BOOTCLOCKPLL150M_SYSTICK_CLOCK 10000000UL /* Clock consumers of SYSTICK_clock output : N/A */
#define BOARD_BOOTCLOCKPLL150M_SYSTEM_CLOCK 150000000UL /* Clock consumers of System_clock output : ADC0, CTIMER2, CTIMER3, CTIMER4, DMA0, GINT0, GINT1, GPIO, INPUTMUX, IOCON, MAILBOX, MRT0, NVIC, PINT, RIT, SCT0, SWD, UTICK0, WWDT */
#define BOARD_BOOTCLOCKPLL150M_TRACE_CLOCK 0UL /* Clock consumers of TRACE_clock output : SWD */
#define BOARD_BOOTCLOCKPLL150M_WDT_CLOCK 0UL /* Clock consumers of WDT_clock output : UTICK0, WWDT */
/*******************************************************************************
* API for BOARD_BootClockPLL150M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockPLL150M(void);
#if defined(__cplusplus)
}

40
board/peripherals.c
View File

@ -6,11 +6,11 @@
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Peripherals v11.0
product: Peripherals v13.0
processor: LPC54102J512
package_id: LPC54102J512BD64
mcu_data: ksdk2_0
processor_version: 11.0.1
processor_version: 14.0.0
functionalGroups:
- name: BOARD_InitPeripherals
UUID: bf976c30-387a-4c02-956c-44a37954526e
@ -76,48 +76,12 @@ instance:
static void NVIC_init(void) {
} */
/***********************************************************************************************************************
* I2C0 initialization code
**********************************************************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
instance:
- name: 'I2C0'
- type: 'lpc_i2c'
- mode: 'I2C_Polling'
- custom_name_enabled: 'false'
- type_id: 'lpc_i2c_f5051a0134792729f1007113ec6ddccd'
- functional_group: 'BOARD_InitPeripherals'
- peripheral: 'I2C0'
- config_sets:
- fsl_i2c:
- i2c_mode: 'kI2C_Master'
- clockSource: 'FunctionClock'
- clockSourceFreq: 'BOARD_BootClockRUN'
- i2c_master_config:
- enableMaster: 'true'
- baudRate_Bps: '100000'
- enableTimeout: 'false'
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
const i2c_master_config_t I2C0_config = {
.enableMaster = true,
.baudRate_Bps = 100000UL,
.enableTimeout = false
};
static void I2C0_init(void) {
/* Initialization function */
I2C_MasterInit(I2C0_PERIPHERAL, &I2C0_config, I2C0_CLOCK_SOURCE);
}
/***********************************************************************************************************************
* Initialization functions
**********************************************************************************************************************/
void BOARD_InitPeripherals(void)
{
/* Initialize components */
I2C0_init();
}
/***********************************************************************************************************************

16
board/peripherals.h
View File

@ -10,27 +10,11 @@
* Included files
**********************************************************************************************************************/
#include "fsl_common.h"
#include "fsl_i2c.h"
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus */
/***********************************************************************************************************************
* Definitions
**********************************************************************************************************************/
/* Definitions for BOARD_InitPeripherals functional group */
/* BOARD_InitPeripherals defines for I2C0 */
/* Definition of peripheral ID */
#define I2C0_PERIPHERAL ((I2C_Type *)I2C0)
/* Definition of the clock source frequency */
#define I2C0_CLOCK_SOURCE 12000000UL
/***********************************************************************************************************************
* Global variables
**********************************************************************************************************************/
extern const i2c_master_config_t I2C0_config;
/***********************************************************************************************************************
* Initialization functions
**********************************************************************************************************************/

114
board/pin_mux.c
View File

@ -7,16 +7,21 @@
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Pins v11.0
product: Pins v14.0
processor: LPC54102J512
package_id: LPC54102J512BD64
mcu_data: ksdk2_0
processor_version: 11.0.1
processor_version: 14.0.0
pin_labels:
- {pin_num: '28', pin_signal: PIO1_8/ADC_11/SPI1_MISO/CT32B1_MAT3/CT32B1_CAP3, label: R, identifier: LED_R;R}
- {pin_num: '41', pin_signal: PIO0_7/U1_SCLK/SCT0_OUT0/CT32B0_MAT2/CT32B0_CAP2, label: BMM_DRDY, identifier: BMM_DRDY}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
#include "fsl_common.h"
#include "fsl_gpio.h"
#include "fsl_inputmux.h"
#include "pin_mux.h"
/* FUNCTION ************************************************************************************************************
@ -27,31 +32,31 @@ processor_version: 11.0.1
* END ****************************************************************************************************************/
void BOARD_InitBootPins(void)
{
BOARD_InitPins();
BOARD_InitDbgUARTPins();
BOARD_InitI2CSensorPins();
BOARD_InitLEDPins();
}
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitPins:
BOARD_InitDbgUARTPins:
- options: {callFromInitBoot: 'true', coreID: cm4, enableClock: 'true'}
- pin_list:
- {pin_num: '31', peripheral: USART0, signal: RXD, pin_signal: PIO0_0/U0_RXD/SPI0_SSEL0/CT32B0_CAP0/SCT0_OUT3}
- {pin_num: '32', peripheral: USART0, signal: TXD, pin_signal: PIO0_1/U0_TXD/SPI0_SSEL1/CT32B0_CAP1/SCT0_OUT1}
- {pin_num: '1', peripheral: I2C0, signal: SCL, pin_signal: PIO0_23/I2C0_SCL/CT32B0_CAP0}
- {pin_num: '2', peripheral: I2C0, signal: SDA, pin_signal: PIO0_24/I2C0_SDA/CT32B0_CAP1/CT32B0_MAT0}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitPins
* Function Name : BOARD_InitDbgUARTPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
/* Function assigned for the Cortex-M4F */
void BOARD_InitPins(void)
void BOARD_InitDbgUARTPins(void)
{
/* Enables the clock for the IOCON block. 0 = Disable; 1 = Enable.: 0x01u */
CLOCK_EnableClock(kCLOCK_Iocon);
@ -79,6 +84,36 @@ void BOARD_InitPins(void)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO01_DIGIMODE_DIGITAL));
}
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitI2CSensorPins:
- options: {callFromInitBoot: 'true', coreID: cm4, enableClock: 'true'}
- pin_list:
- {pin_num: '1', peripheral: I2C0, signal: SCL, pin_signal: PIO0_23/I2C0_SCL/CT32B0_CAP0}
- {pin_num: '2', peripheral: I2C0, signal: SDA, pin_signal: PIO0_24/I2C0_SDA/CT32B0_CAP1/CT32B0_MAT0}
- {pin_num: '41', peripheral: PINT, signal: 'PINT, 0', pin_signal: PIO0_7/U1_SCLK/SCT0_OUT0/CT32B0_MAT2/CT32B0_CAP2}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitI2CSensorPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
/* Function assigned for the Cortex-M4F */
void BOARD_InitI2CSensorPins(void)
{
/* Enables the clock for the input muxes. 0 = Disable; 1 = Enable.: 0x01u */
CLOCK_EnableClock(kCLOCK_InputMux);
/* Enables the clock for the IOCON block. 0 = Disable; 1 = Enable.: 0x01u */
CLOCK_EnableClock(kCLOCK_Iocon);
/* PIO0_7 is selected for PINT input 0 */
INPUTMUX_AttachSignal(INPUTMUX, 0U, kINPUTMUX_GpioPort0Pin7ToPintsel);
IOCON->PIO[0][23] = ((IOCON->PIO[0][23] &
/* Mask bits to zero which are setting */
@ -103,6 +138,69 @@ void BOARD_InitPins(void)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO024_DIGIMODE_DIGITAL));
IOCON->PIO[0][7] = ((IOCON->PIO[0][7] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT07 (pin 41) is configured as PIO0_7. */
| IOCON_PIO_FUNC(PIO07_FUNC_ALT0)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO07_DIGIMODE_DIGITAL));
}
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitLEDPins:
- options: {callFromInitBoot: 'true', coreID: cm4, enableClock: 'true'}
- pin_list:
- {pin_num: '28', peripheral: GPIO, signal: 'PIO1, 8', pin_signal: PIO1_8/ADC_11/SPI1_MISO/CT32B1_MAT3/CT32B1_CAP3, identifier: R, direction: OUTPUT, gpio_init_state: 'true',
open_drain: enabled}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitLEDPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
/* Function assigned for the Cortex-M4F */
void BOARD_InitLEDPins(void)
{
/* Enables the clock for the IOCON block. 0 = Disable; 1 = Enable.: 0x01u */
CLOCK_EnableClock(kCLOCK_Iocon);
/* Enables the clock for the GPIO1 module */
CLOCK_EnableClock(kCLOCK_Gpio1);
gpio_pin_config_t R_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 1U
};
/* Initialize GPIO functionality on pin PIO1_8 (pin 28) */
GPIO_PinInit(BOARD_INITLEDPINS_R_GPIO, BOARD_INITLEDPINS_R_PORT, BOARD_INITLEDPINS_R_PIN, &R_config);
IOCON->PIO[1][8] = ((IOCON->PIO[1][8] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK | IOCON_PIO_OD_MASK)))
/* Selects pin function.
* : PORT18 (pin 28) is configured as PIO1_8. */
| IOCON_PIO_FUNC(PIO18_FUNC_ALT0)
/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO18_DIGIMODE_DIGITAL)
/* Controls open-drain mode.
* : Open-drain.
* Simulated open-drain output (high drive disabled). */
| IOCON_PIO_OD(PIO18_OD_OPEN_DRAIN));
}
/***********************************************************************************************************************
* EOF

61
board/pin_mux.h
View File

@ -25,20 +25,63 @@ extern "C" {
*/
void BOARD_InitBootPins(void);
#define PIO00_DIGIMODE_DIGITAL 0x01u /*!<@brief Select Analog/Digital mode.: Digital mode. */
#define PIO00_FUNC_ALT1 0x01u /*!<@brief Selects pin function.: Alternative connection 1. */
#define PIO01_DIGIMODE_DIGITAL 0x01u /*!<@brief Select Analog/Digital mode.: Digital mode. */
#define PIO01_FUNC_ALT1 0x01u /*!<@brief Selects pin function.: Alternative connection 1. */
#define PIO023_DIGIMODE_DIGITAL 0x01u /*!<@brief Select Analog/Digital mode.: Digital mode. */
#define PIO023_FUNC_ALT1 0x01u /*!<@brief Selects pin function.: Alternative connection 1. */
#define PIO024_DIGIMODE_DIGITAL 0x01u /*!<@brief Select Analog/Digital mode.: Digital mode. */
#define PIO024_FUNC_ALT1 0x01u /*!<@brief Selects pin function.: Alternative connection 1. */
#define PIO00_DIGIMODE_DIGITAL 0x01u /*!<@brief Select Analog/Digital mode.: Digital mode. */
#define PIO00_FUNC_ALT1 0x01u /*!<@brief Selects pin function.: Alternative connection 1. */
#define PIO01_DIGIMODE_DIGITAL 0x01u /*!<@brief Select Analog/Digital mode.: Digital mode. */
#define PIO01_FUNC_ALT1 0x01u /*!<@brief Selects pin function.: Alternative connection 1. */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitPins(void); /* Function assigned for the Cortex-M4F */
void BOARD_InitDbgUARTPins(void); /* Function assigned for the Cortex-M4F */
#define PIO023_DIGIMODE_DIGITAL 0x01u /*!<@brief Select Analog/Digital mode.: Digital mode. */
#define PIO023_FUNC_ALT1 0x01u /*!<@brief Selects pin function.: Alternative connection 1. */
#define PIO024_DIGIMODE_DIGITAL 0x01u /*!<@brief Select Analog/Digital mode.: Digital mode. */
#define PIO024_FUNC_ALT1 0x01u /*!<@brief Selects pin function.: Alternative connection 1. */
#define PIO07_DIGIMODE_DIGITAL 0x01u /*!<@brief Select Analog/Digital mode.: Digital mode. */
#define PIO07_FUNC_ALT0 0x00u /*!<@brief Selects pin function.: Alternative connection 0. */
/*! @name PIO0_7 (number 41), BMM_DRDY
@{ */
#define BOARD_INITI2CSENSORPINS_BMM_DRDY_PORT 0U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITI2CSENSORPINS_BMM_DRDY_PIN 7U /*!<@brief PORT pin number */
#define BOARD_INITI2CSENSORPINS_BMM_DRDY_PIN_MASK (1U << 7U) /*!<@brief PORT pin mask */
/* @} */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitI2CSensorPins(void); /* Function assigned for the Cortex-M4F */
/*!
* @brief Select Analog/Digital mode.: Digital mode. */
#define PIO18_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO18_FUNC_ALT0 0x00u
/*!
* @brief Controls open-drain mode.: Open-drain. Simulated open-drain output (high drive disabled). */
#define PIO18_OD_OPEN_DRAIN 0x01u
/*! @name PIO1_8 (number 28), R
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITLEDPINS_R_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITLEDPINS_R_GPIO_PIN_MASK (1U << 8U) /*!<@brief GPIO pin mask */
#define BOARD_INITLEDPINS_R_PORT 1U /*!<@brief PORT peripheral base pointer */
#define BOARD_INITLEDPINS_R_PIN 8U /*!<@brief PORT pin number */
#define BOARD_INITLEDPINS_R_PIN_MASK (1U << 8U) /*!<@brief PORT pin mask */
/* @} */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitLEDPins(void); /* Function assigned for the Cortex-M4F */
#if defined(__cplusplus)
}

9
include/app_init.h Normal file
View File

@ -0,0 +1,9 @@
#ifndef APP_INIT_H
#define APP_INIT_H
#include "tx_api.h"
extern TX_THREAD app_init_thread_id;
void app_init_thread(ULONG thread_input);
#endif // APP_INIT_H

318
include/tx_user.h Normal file
View File

@ -0,0 +1,318 @@
/**************************************************************************/
/* */
/* Copyright (c) Microsoft Corporation. All rights reserved. */
/* */
/* This software is licensed under the Microsoft Software License */
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
/* and in the root directory of this software. */
/* */
/**************************************************************************/
/**************************************************************************/
/**************************************************************************/
/** */
/** ThreadX Component */
/** */
/** User Specific */
/** */
/**************************************************************************/
/**************************************************************************/
/**************************************************************************/
/* */
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_user.h PORTABLE C */
/* 6.3.0 */
/* */
/* AUTHOR */
/* */
/* William E. Lamie, Microsoft Corporation */
/* */
/* DESCRIPTION */
/* */
/* This file contains user defines for configuring ThreadX in specific */
/* ways. This file will have an effect only if the application and */
/* ThreadX library are built with TX_INCLUDE_USER_DEFINE_FILE defined. */
/* Note that all the defines in this file may also be made on the */
/* command line when building ThreadX library and application objects. */
/* */
/* RELEASE HISTORY */
/* */
/* DATE NAME DESCRIPTION */
/* */
/* 05-19-2020 William E. Lamie Initial Version 6.0 */
/* 09-30-2020 Yuxin Zhou Modified comment(s), */
/* resulting in version 6.1 */
/* 03-02-2021 Scott Larson Modified comment(s), */
/* added option to remove */
/* FileX pointer, */
/* resulting in version 6.1.5 */
/* 06-02-2021 Scott Larson Added options for multiple */
/* block pool search & delay, */
/* resulting in version 6.1.7 */
/* 10-15-2021 Yuxin Zhou Modified comment(s), added */
/* user-configurable symbol */
/* TX_TIMER_TICKS_PER_SECOND */
/* resulting in version 6.1.9 */
/* 04-25-2022 Wenhui Xie Modified comment(s), */
/* optimized the definition of */
/* TX_TIMER_TICKS_PER_SECOND, */
/* resulting in version 6.1.11 */
/* 10-31-2023 Xiuwen Cai Modified comment(s), */
/* added option for random */
/* number stack filling, */
/* resulting in version 6.3.0 */
/* */
/**************************************************************************/
#ifndef TX_USER_H
#define TX_USER_H
/* Define various build options for the ThreadX port. The application should either make changes
here by commenting or un-commenting the conditional compilation defined OR supply the defines
though the compiler's equivalent of the -D option.
For maximum speed, the following should be defined:
TX_MAX_PRIORITIES 32
TX_DISABLE_PREEMPTION_THRESHOLD
TX_DISABLE_REDUNDANT_CLEARING
TX_DISABLE_NOTIFY_CALLBACKS
TX_NOT_INTERRUPTABLE
TX_TIMER_PROCESS_IN_ISR
TX_REACTIVATE_INLINE
TX_DISABLE_STACK_FILLING
TX_INLINE_THREAD_RESUME_SUSPEND
For minimum size, the following should be defined:
TX_MAX_PRIORITIES 32
TX_DISABLE_PREEMPTION_THRESHOLD
TX_DISABLE_REDUNDANT_CLEARING
TX_DISABLE_NOTIFY_CALLBACKS
TX_NO_FILEX_POINTER
TX_NOT_INTERRUPTABLE
TX_TIMER_PROCESS_IN_ISR
Of course, many of these defines reduce functionality and/or change the behavior of the
system in ways that may not be worth the trade-off. For example, the TX_TIMER_PROCESS_IN_ISR
results in faster and smaller code, however, it increases the amount of processing in the ISR.
In addition, some services that are available in timers are not available from ISRs and will
therefore return an error if this option is used. This may or may not be desirable for a
given application. */
/* Override various options with default values already assigned in tx_port.h. Please also refer
to tx_port.h for descriptions on each of these options. */
/*
#define TX_MAX_PRIORITIES 32
#define TX_MINIMUM_STACK ????
#define TX_THREAD_USER_EXTENSION ????
#define TX_TIMER_THREAD_STACK_SIZE ????
#define TX_TIMER_THREAD_PRIORITY ????
*/
/* Define the common timer tick reference for use by other middleware components. The default
value is 10ms (i.e. 100 ticks, defined in tx_api.h), but may be replaced by a port-specific
version in tx_port.h or here.
Note: the actual hardware timer value may need to be changed (usually in tx_initialize_low_level). */
#define TX_TIMER_TICKS_PER_SECOND (1000UL)
/* Determine if there is a FileX pointer in the thread control block.
By default, the pointer is there for legacy/backwards compatibility.
The pointer must also be there for applications using FileX.
Define this to save space in the thread control block.
*/
/*
#define TX_NO_FILEX_POINTER
*/
/* Determine if timer expirations (application timers, timeouts, and tx_thread_sleep calls
should be processed within the a system timer thread or directly in the timer ISR.
By default, the timer thread is used. When the following is defined, the timer expiration
processing is done directly from the timer ISR, thereby eliminating the timer thread control
block, stack, and context switching to activate it. */
/*
#define TX_TIMER_PROCESS_IN_ISR
*/
/* Determine if in-line timer reactivation should be used within the timer expiration processing.
By default, this is disabled and a function call is used. When the following is defined,
reactivating is performed in-line resulting in faster timer processing but slightly larger
code size. */
/*
#define TX_REACTIVATE_INLINE
*/
/* Determine is stack filling is enabled. By default, ThreadX stack filling is enabled,
which places an 0xEF pattern in each byte of each thread's stack. This is used by
debuggers with ThreadX-awareness and by the ThreadX run-time stack checking feature. */
/*
#define TX_DISABLE_STACK_FILLING
*/
/* Determine whether or not stack checking is enabled. By default, ThreadX stack checking is
disabled. When the following is defined, ThreadX thread stack checking is enabled. If stack
checking is enabled (TX_ENABLE_STACK_CHECKING is defined), the TX_DISABLE_STACK_FILLING
define is negated, thereby forcing the stack fill which is necessary for the stack checking
logic. */
/*
#define TX_ENABLE_STACK_CHECKING
*/
/* Determine if random number is used for stack filling. By default, ThreadX uses a fixed
pattern for stack filling. When the following is defined, ThreadX uses a random number
for stack filling. This is effective only when TX_ENABLE_STACK_CHECKING is defined. */
/*
#define TX_ENABLE_RANDOM_NUMBER_STACK_FILLING
*/
/* Determine if preemption-threshold should be disabled. By default, preemption-threshold is
enabled. If the application does not use preemption-threshold, it may be disabled to reduce
code size and improve performance. */
/*
#define TX_DISABLE_PREEMPTION_THRESHOLD
*/
/* Determine if global ThreadX variables should be cleared. If the compiler startup code clears
the .bss section prior to ThreadX running, the define can be used to eliminate unnecessary
clearing of ThreadX global variables. */
/*
#define TX_DISABLE_REDUNDANT_CLEARING
*/
/* Determine if no timer processing is required. This option will help eliminate the timer
processing when not needed. The user will also have to comment out the call to
tx_timer_interrupt, which is typically made from assembly language in
tx_initialize_low_level. Note: if TX_NO_TIMER is used, the define TX_TIMER_PROCESS_IN_ISR
must also be used and tx_timer_initialize must be removed from ThreadX library. */
/*
#define TX_NO_TIMER
#ifndef TX_TIMER_PROCESS_IN_ISR
#define TX_TIMER_PROCESS_IN_ISR
#endif
*/
/* Determine if the notify callback option should be disabled. By default, notify callbacks are
enabled. If the application does not use notify callbacks, they may be disabled to reduce
code size and improve performance. */
/*
#define TX_DISABLE_NOTIFY_CALLBACKS
*/
/* Determine if the tx_thread_resume and tx_thread_suspend services should have their internal
code in-line. This results in a larger image, but improves the performance of the thread
resume and suspend services. */
/*
#define TX_INLINE_THREAD_RESUME_SUSPEND
*/
/* Determine if the internal ThreadX code is non-interruptable. This results in smaller code
size and less processing overhead, but increases the interrupt lockout time. */
/*
#define TX_NOT_INTERRUPTABLE
*/
/* Determine if the trace event logging code should be enabled. This causes slight increases in
code size and overhead, but provides the ability to generate system trace information which
is available for viewing in TraceX. */
/*
#define TX_ENABLE_EVENT_TRACE
*/
/* Determine if block pool performance gathering is required by the application. When the following is
defined, ThreadX gathers various block pool performance information. */
/*
#define TX_BLOCK_POOL_ENABLE_PERFORMANCE_INFO
*/
/* Determine if byte pool performance gathering is required by the application. When the following is
defined, ThreadX gathers various byte pool performance information. */
/*
#define TX_BYTE_POOL_ENABLE_PERFORMANCE_INFO
*/
/* Determine if event flags performance gathering is required by the application. When the following is
defined, ThreadX gathers various event flags performance information. */
/*
#define TX_EVENT_FLAGS_ENABLE_PERFORMANCE_INFO
*/
/* Determine if mutex performance gathering is required by the application. When the following is
defined, ThreadX gathers various mutex performance information. */
/*
#define TX_MUTEX_ENABLE_PERFORMANCE_INFO
*/
/* Determine if queue performance gathering is required by the application. When the following is
defined, ThreadX gathers various queue performance information. */
/*
#define TX_QUEUE_ENABLE_PERFORMANCE_INFO
*/
/* Determine if semaphore performance gathering is required by the application. When the following is
defined, ThreadX gathers various semaphore performance information. */
/*
#define TX_SEMAPHORE_ENABLE_PERFORMANCE_INFO
*/
/* Determine if thread performance gathering is required by the application. When the following is
defined, ThreadX gathers various thread performance information. */
/*
#define TX_THREAD_ENABLE_PERFORMANCE_INFO
*/
/* Determine if timer performance gathering is required by the application. When the following is
defined, ThreadX gathers various timer performance information. */
/*
#define TX_TIMER_ENABLE_PERFORMANCE_INFO
*/
/* Override options for byte pool searches of multiple blocks. */
/*
#define TX_BYTE_POOL_MULTIPLE_BLOCK_SEARCH 20
*/
/* Override options for byte pool search delay to avoid thrashing. */
/*
#define TX_BYTE_POOL_DELAY_VALUE 3
*/
#endif

1
lib/threadx Submodule

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Subproject commit 13b700fd3ed763cedcba7dbd17b859077a01aa9c

16
src/app_init.c Normal file
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/* Board */
#include "pin_mux.h"
/* SDK drivers */
#include "fsl_gpio.h"
/* App */
#include "app_init.h"
TX_THREAD app_init_thread_id;
void app_init_thread(ULONG thread_input) {
for (;;) {
GPIO_PortToggle(BOARD_INITLEDPINS_R_GPIO, BOARD_INITLEDPINS_R_PORT, BOARD_INITLEDPINS_R_PIN_MASK);
tx_thread_sleep(1000);
}
}

60
src/main.c
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@ -1,37 +1,67 @@
/* Board */
#include "board.h"
#include "clock_config.h"
#include "peripherals.h"
#include "pin_mux.h"
/* SDK drivers */
/* Debug Console */
#include "fsl_debug_console.h"
/* ThreadX */
#include "tx_api.h"
/* Sensor */
#include "pixart_pah8001ei.h"
pah_ret_t pah8001_impl_init(void *pdev);
pah_ret_t pah8001_impl_write(void *pdev, uint8_t reg, uint8_t *value, uint16_t len);
pah_ret_t pah8001_impl_read(void *pdev, uint8_t reg, uint8_t *value, uint16_t len);
/* App */
pah_t s_pah = {
.ops = {
.init = pah8001_impl_init,
.write = pah8001_impl_write,
.read = pah8001_impl_read,
},
.pdev = NULL,
};
#include "app_init.h"
extern void *__HeapLimit;
extern void *_tx_initialize_unused_memory;
extern void _tx_timer_interrupt(void);
void tx_application_define(void *first_unused_memory) {
tx_thread_create(&app_init_thread_id, "INIT", app_init_thread, 0, first_unused_memory, 1024, 3, 3, TX_NO_TIME_SLICE,
TX_AUTO_START);
}
void _tx_initialize_low_level(void) {
const uint32_t primask = DisableGlobalIRQ();
_tx_initialize_unused_memory = (void *)&__HeapLimit;
DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;
SysTick_Config(CLOCK_GetCoreClkFreq() / TX_TIMER_TICKS_PER_SECOND);
NVIC_SetPriority(SVCall_IRQn, 7);
NVIC_SetPriority(PendSV_IRQn, 7);
NVIC_SetPriority(SysTick_IRQn, 6);
EnableGlobalIRQ(primask);
}
void SysTick_Handler(void) {
_tx_timer_interrupt();
}
int main(void) {
BOARD_InitBootPins();
BOARD_BootClockRUN();
BOARD_InitBootClocks();
BOARD_InitBootPeripherals();
BOARD_InitDebugConsole();
PRINTF("Hello world!!\r\n");
CLOCK_EnableClock(kCLOCK_I2c0);
pah8001_init(&s_pah);
tx_kernel_enter();
for(;;) {
for (;;) {
__WFI();
}
}