From 2839de3323f9f472d1c48ce1d6a7f9522a76a7bd Mon Sep 17 00:00:00 2001 From: imi415 Date: Sat, 3 Sep 2022 16:49:32 +0800 Subject: [PATCH] Use 0.96" LCD. --- LPCXpresso55S69.mex | 24 +++++++++++++++--------- board/pin_mux.c | 37 +++++++++++++++++++++++++++---------- board/pin_mux.h | 43 +++++++++++++++++++++++-------------------- lib/lcd | 2 +- src/epd_impl.c | 14 +++----------- src/main.c | 10 +++++----- 6 files changed, 74 insertions(+), 56 deletions(-) diff --git a/LPCXpresso55S69.mex b/LPCXpresso55S69.mex index 186d25d..13b2b31 100644 --- a/LPCXpresso55S69.mex +++ b/LPCXpresso55S69.mex @@ -30,7 +30,8 @@ - + + @@ -546,12 +547,6 @@ - - - - - - @@ -560,13 +555,24 @@ - + + + + + + + + + + + + @@ -957,7 +963,7 @@ - + diff --git a/board/pin_mux.c b/board/pin_mux.c index 9687c1f..7397342 100644 --- a/board/pin_mux.c +++ b/board/pin_mux.c @@ -16,7 +16,9 @@ board: LPCXpresso55S69 pin_labels: - {pin_num: '81', pin_signal: PIO0_2/FC3_TXD_SCL_MISO_WS/CT_INP1/SCT0_OUT0/SCT_GPI2/SECURE_GPIO0_2, label: 'U6[11]/P20[5]/FC3_SPI_MISO', identifier: LCD_DC} - {pin_num: '86', pin_signal: PIO0_4/FC4_SCK/CT_INP12/SCT_GPI4/FC3_CTS_SDA_SSEL0/SECURE_GPIO0_4, label: 'U3[14]/P20[1]/FC3_SPI_SSEL0', identifier: LCD_CS} -- {pin_num: '41', pin_signal: PIO1_22/SD0_CMD/CTIMER2_MAT3/SCT_GPI5/FC4_SSEL3/PLU_OUT4, label: 'P20[4]/PLU_OUT4/GPIO', identifier: LCS_RST;LCD_RST} +- {pin_num: '71', pin_signal: PIO0_13/FC1_CTS_SDA_SSEL0/UTICK_CAP0/CT_INP0/SCT_GPI0/FC1_RXD_SDA_MOSI_DATA/PLU_IN0/SECURE_GPIO0_13, label: 'P19[9]/P19[10]/U2[E6]/P20[8]/FC1_I2C_SDA', + identifier: LCD_RST_0IN9} +- {pin_num: '41', pin_signal: PIO1_22/SD0_CMD/CTIMER2_MAT3/SCT_GPI5/FC4_SSEL3/PLU_OUT4, label: 'P20[4]/PLU_OUT4/GPIO', identifier: LCS_RST;LCD_RST;LCD_RST_4IN3} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ @@ -857,12 +859,14 @@ void BOARD_InitACCELPins(void) BOARD_InitPMODPins: - options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'} - pin_list: - - {pin_num: '86', peripheral: GPIO, signal: 'PIO0, 4', pin_signal: PIO0_4/FC4_SCK/CT_INP12/SCT_GPI4/FC3_CTS_SDA_SSEL0/SECURE_GPIO0_4, direction: OUTPUT, gpio_init_state: 'true'} - {pin_num: '81', peripheral: GPIO, signal: 'PIO0, 2', pin_signal: PIO0_2/FC3_TXD_SCL_MISO_WS/CT_INP1/SCT0_OUT0/SCT_GPI2/SECURE_GPIO0_2, direction: OUTPUT, gpio_init_state: 'true'} - - {pin_num: '41', peripheral: GPIO, signal: 'PIO1, 22', pin_signal: PIO1_22/SD0_CMD/CTIMER2_MAT3/SCT_GPI5/FC4_SSEL3/PLU_OUT4, identifier: LCD_RST, direction: OUTPUT, + - {pin_num: '41', peripheral: GPIO, signal: 'PIO1, 22', pin_signal: PIO1_22/SD0_CMD/CTIMER2_MAT3/SCT_GPI5/FC4_SSEL3/PLU_OUT4, identifier: LCD_RST_4IN3, direction: OUTPUT, gpio_init_state: 'true'} - {pin_num: '83', peripheral: FLEXCOMM3, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_3/FC3_RXD_SDA_MOSI_DATA/CTIMER0_MAT1/SCT0_OUT1/SCT_GPI3/SECURE_GPIO0_3} - {pin_num: '89', peripheral: FLEXCOMM3, signal: SCK, pin_signal: PIO0_6/FC3_SCK/CT_INP13/CTIMER4_MAT0/SCT_GPI6/SECURE_GPIO0_6} + - {pin_num: '71', peripheral: GPIO, signal: 'PIO0, 13', pin_signal: PIO0_13/FC1_CTS_SDA_SSEL0/UTICK_CAP0/CT_INP0/SCT_GPI0/FC1_RXD_SDA_MOSI_DATA/PLU_IN0/SECURE_GPIO0_13, + direction: OUTPUT, gpio_init_state: 'true'} + - {pin_num: '86', peripheral: FLEXCOMM3, signal: CTS_SDA_SSEL0, pin_signal: PIO0_4/FC4_SCK/CT_INP12/SCT_GPI4/FC3_CTS_SDA_SSEL0/SECURE_GPIO0_4, identifier: ''} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ @@ -892,19 +896,32 @@ void BOARD_InitPMODPins(void) /* Initialize GPIO functionality on pin PIO0_2 (pin 81) */ GPIO_PinInit(BOARD_INITPMODPINS_LCD_DC_GPIO, BOARD_INITPMODPINS_LCD_DC_PORT, BOARD_INITPMODPINS_LCD_DC_PIN, &LCD_DC_config); - gpio_pin_config_t LCD_CS_config = { + gpio_pin_config_t LCD_RST_0IN9_config = { .pinDirection = kGPIO_DigitalOutput, .outputLogic = 1U }; - /* Initialize GPIO functionality on pin PIO0_4 (pin 86) */ - GPIO_PinInit(BOARD_INITPMODPINS_LCD_CS_GPIO, BOARD_INITPMODPINS_LCD_CS_PORT, BOARD_INITPMODPINS_LCD_CS_PIN, &LCD_CS_config); + /* Initialize GPIO functionality on pin PIO0_13 (pin 71) */ + GPIO_PinInit(BOARD_INITPMODPINS_LCD_RST_0IN9_GPIO, BOARD_INITPMODPINS_LCD_RST_0IN9_PORT, BOARD_INITPMODPINS_LCD_RST_0IN9_PIN, &LCD_RST_0IN9_config); - gpio_pin_config_t LCD_RST_config = { + gpio_pin_config_t LCD_RST_4IN3_config = { .pinDirection = kGPIO_DigitalOutput, .outputLogic = 1U }; /* Initialize GPIO functionality on pin PIO1_22 (pin 41) */ - GPIO_PinInit(BOARD_INITPMODPINS_LCD_RST_GPIO, BOARD_INITPMODPINS_LCD_RST_PORT, BOARD_INITPMODPINS_LCD_RST_PIN, &LCD_RST_config); + GPIO_PinInit(BOARD_INITPMODPINS_LCD_RST_4IN3_GPIO, BOARD_INITPMODPINS_LCD_RST_4IN3_PORT, BOARD_INITPMODPINS_LCD_RST_4IN3_PIN, &LCD_RST_4IN3_config); + + IOCON->PIO[0][13] = ((IOCON->PIO[0][13] & + /* Mask bits to zero which are setting */ + (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK))) + + /* Selects pin function. + * : PORT013 (pin 71) is configured as PIO0_13. */ + | IOCON_PIO_FUNC(PIO0_13_FUNC_ALT0) + + /* Select Digital mode. + * : Enable Digital mode. + * Digital input is enabled. */ + | IOCON_PIO_DIGIMODE(PIO0_13_DIGIMODE_DIGITAL)); IOCON->PIO[0][2] = ((IOCON->PIO[0][2] & /* Mask bits to zero which are setting */ @@ -937,8 +954,8 @@ void BOARD_InitPMODPins(void) (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK))) /* Selects pin function. - * : PORT04 (pin 86) is configured as PIO0_4. */ - | IOCON_PIO_FUNC(PIO0_4_FUNC_ALT0) + * : PORT04 (pin 86) is configured as FC3_CTS_SDA_SSEL0. */ + | IOCON_PIO_FUNC(0x08u) /* Select Digital mode. * : Enable Digital mode. diff --git a/board/pin_mux.h b/board/pin_mux.h index 8af90d0..1874028 100644 --- a/board/pin_mux.h +++ b/board/pin_mux.h @@ -435,6 +435,12 @@ void BOARD_InitI2SPins(void); /* Function assigned for the Cortex-M33 (Core #0) */ void BOARD_InitACCELPins(void); /* Function assigned for the Cortex-M33 (Core #0) */ +/*! + * @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */ +#define PIO0_13_DIGIMODE_DIGITAL 0x01u +/*! + * @brief Selects pin function.: Alternative connection 0. */ +#define PIO0_13_FUNC_ALT0 0x00u /*! * @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */ #define PIO0_2_DIGIMODE_DIGITAL 0x01u @@ -450,9 +456,6 @@ void BOARD_InitACCELPins(void); /* Function assigned for the Cortex-M33 (Core #0 /*! * @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */ #define PIO0_4_DIGIMODE_DIGITAL 0x01u -/*! - * @brief Selects pin function.: Alternative connection 0. */ -#define PIO0_4_FUNC_ALT0 0x00u /*! * @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */ #define PIO0_6_DIGIMODE_DIGITAL 0x01u @@ -466,17 +469,6 @@ void BOARD_InitACCELPins(void); /* Function assigned for the Cortex-M33 (Core #0 * @brief Selects pin function.: Alternative connection 0. */ #define PIO1_22_FUNC_ALT0 0x00u -/*! @name PIO0_4 (number 86), U3[14]/P20[1]/FC3_SPI_SSEL0 - @{ */ - -/* Symbols to be used with GPIO driver */ -#define BOARD_INITPMODPINS_LCD_CS_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ -#define BOARD_INITPMODPINS_LCD_CS_GPIO_PIN_MASK (1U << 4U) /*!<@brief GPIO pin mask */ -#define BOARD_INITPMODPINS_LCD_CS_PORT 0U /*!<@brief PORT peripheral base pointer */ -#define BOARD_INITPMODPINS_LCD_CS_PIN 4U /*!<@brief PORT pin number */ -#define BOARD_INITPMODPINS_LCD_CS_PIN_MASK (1U << 4U) /*!<@brief PORT pin mask */ - /* @} */ - /*! @name PIO0_2 (number 81), U6[11]/P20[5]/FC3_SPI_MISO @{ */ @@ -492,12 +484,23 @@ void BOARD_InitACCELPins(void); /* Function assigned for the Cortex-M33 (Core #0 @{ */ /* Symbols to be used with GPIO driver */ -#define BOARD_INITPMODPINS_LCD_RST_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ -#define BOARD_INITPMODPINS_LCD_RST_GPIO_PIN_MASK (1U << 22U) /*!<@brief GPIO pin mask */ -#define BOARD_INITPMODPINS_LCD_RST_PORT 1U /*!<@brief PORT peripheral base pointer */ -#define BOARD_INITPMODPINS_LCD_RST_PIN 22U /*!<@brief PORT pin number */ -#define BOARD_INITPMODPINS_LCD_RST_PIN_MASK (1U << 22U) /*!<@brief PORT pin mask */ - /* @} */ +#define BOARD_INITPMODPINS_LCD_RST_4IN3_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ +#define BOARD_INITPMODPINS_LCD_RST_4IN3_GPIO_PIN_MASK (1U << 22U) /*!<@brief GPIO pin mask */ +#define BOARD_INITPMODPINS_LCD_RST_4IN3_PORT 1U /*!<@brief PORT peripheral base pointer */ +#define BOARD_INITPMODPINS_LCD_RST_4IN3_PIN 22U /*!<@brief PORT pin number */ +#define BOARD_INITPMODPINS_LCD_RST_4IN3_PIN_MASK (1U << 22U) /*!<@brief PORT pin mask */ + /* @} */ + +/*! @name PIO0_13 (number 71), P19[9]/P19[10]/U2[E6]/P20[8]/FC1_I2C_SDA + @{ */ + +/* Symbols to be used with GPIO driver */ +#define BOARD_INITPMODPINS_LCD_RST_0IN9_GPIO GPIO /*!<@brief GPIO peripheral base pointer */ +#define BOARD_INITPMODPINS_LCD_RST_0IN9_GPIO_PIN_MASK (1U << 13U) /*!<@brief GPIO pin mask */ +#define BOARD_INITPMODPINS_LCD_RST_0IN9_PORT 0U /*!<@brief PORT peripheral base pointer */ +#define BOARD_INITPMODPINS_LCD_RST_0IN9_PIN 13U /*!<@brief PORT pin number */ +#define BOARD_INITPMODPINS_LCD_RST_0IN9_PIN_MASK (1U << 13U) /*!<@brief PORT pin mask */ + /* @} */ /*! * @brief Configures pin routing and optionally pin electrical features. diff --git a/lib/lcd b/lib/lcd index 40bef05..5739cc8 160000 --- a/lib/lcd +++ b/lib/lcd @@ -1 +1 @@ -Subproject commit 40bef05c632b9e9699b827cf6fded712325bfdec +Subproject commit 5739cc831b775568fce04c715c70f8f5924fecea diff --git a/src/epd_impl.c b/src/epd_impl.c index 92e4171..b465398 100644 --- a/src/epd_impl.c +++ b/src/epd_impl.c @@ -12,14 +12,12 @@ BOARD_INITPMODPINS_LCD_##x##_PIN, v) void lcd_impl_init(void) { - SET_GPIO(CS, 1U); SET_GPIO(DC, 1U); - SET_GPIO(RST, 1U); + SET_GPIO(RST_0IN9, 1U); } epd_ret_t lcd_impl_write_cmd(void *handle, uint8_t *cmd, uint32_t len) { SET_GPIO(DC, 0U); - SET_GPIO(CS, 0U); spi_transfer_t xfer = { .txData = cmd, @@ -39,15 +37,11 @@ epd_ret_t lcd_impl_write_cmd(void *handle, uint8_t *cmd, uint32_t len) { SPI_MasterTransferBlocking(LCD_SPI, &xfer); } - SET_GPIO(CS, 1U); - return EPD_OK; } epd_ret_t lcd_impl_write_data(void *handle, uint8_t *data, uint32_t len) { SET_GPIO(DC, 1U); - SET_GPIO(CS, 0U); - spi_transfer_t xfer = { .txData = data, .rxData = NULL, @@ -57,16 +51,14 @@ epd_ret_t lcd_impl_write_data(void *handle, uint8_t *data, uint32_t len) { SPI_MasterTransferBlocking(LCD_SPI, &xfer); - SET_GPIO(CS, 1U); - return EPD_OK; } epd_ret_t lcd_impl_reset(void *handle) { - SET_GPIO(RST, 0U); + SET_GPIO(RST_0IN9, 0U); SDK_DelayAtLeastUs(50 * 1000, CLOCK_GetCoreSysClkFreq()); - SET_GPIO(RST, 1U); + SET_GPIO(RST_0IN9, 1U); SDK_DelayAtLeastUs(50 * 1000, CLOCK_GetCoreSysClkFreq()); return EPD_OK; diff --git a/src/main.c b/src/main.c index cde3cca..b925c1e 100644 --- a/src/main.c +++ b/src/main.c @@ -7,19 +7,19 @@ #include "fsl_debug_console.h" /* LCD */ -#include "epd-spi/panel/lcd_zjy350c4001.h" +#include "epd-spi/panel/lcd_zjy096s0800.h" void lcd_impl_init(void); epd_ret_t lcd_impl_write_cmd(void *handle, uint8_t *cmd, uint32_t len); epd_ret_t lcd_impl_write_data(void *handle, uint8_t *data, uint32_t len); epd_ret_t lcd_impl_reset(void *handle); -static lcd_zjy350c4001_t s_lcd = { +static lcd_zjy096s0800_t s_lcd = { .user_data = NULL, .config = { - .direction = LCD_ZJY350C4001_DIR_0, - .pix_fmt = LCD_ZJY350C4001_RGB565, + .direction = LCD_ZJY096S0800_DIR_0, + .pix_fmt = LCD_ZJY096S0800_RGB565, .bgr_mode = 1, .inversion = 1, }, @@ -43,7 +43,7 @@ int main(void) { lcd_impl_init(); - lcd_zjy350c4001_init(&s_lcd); + lcd_zjy096s0800_init(&s_lcd); for (;;) { __WFI();