From 897532b01575d9b5340f80b6be459da04b2e1d84 Mon Sep 17 00:00:00 2001 From: Yilin Sun Date: Fri, 12 Apr 2024 22:04:31 +0800 Subject: [PATCH] Updated SDK to v2.15.000 Signed-off-by: Yilin Sun --- .clang-format | 12 ++++ LPCXpresso55S69.mex | 37 +++++------ SDK | 2 +- board/clock_config.c | 4 +- board/clock_config.h | 144 +++++++++++++++++++++++++++++++++++++++++++ board/peripherals.c | 5 +- board/pin_mux.c | 4 +- src/main.c | 2 +- 8 files changed, 184 insertions(+), 26 deletions(-) create mode 100644 .clang-format diff --git a/.clang-format b/.clang-format new file mode 100644 index 0000000..214adf0 --- /dev/null +++ b/.clang-format @@ -0,0 +1,12 @@ +BasedOnStyle: Google +IndentWidth: 4 +AlignConsecutiveMacros: Consecutive +AlignConsecutiveDeclarations: Consecutive +AlignConsecutiveAssignments: Consecutive +AllowShortFunctionsOnASingleLine: None +BreakBeforeBraces: Custom +BraceWrapping: + AfterEnum: false + AfterStruct: false + SplitEmptyFunction: false +ColumnLimit: 120 \ No newline at end of file diff --git a/LPCXpresso55S69.mex b/LPCXpresso55S69.mex index 5bc9c26..98115e5 100644 --- a/LPCXpresso55S69.mex +++ b/LPCXpresso55S69.mex @@ -1,5 +1,5 @@ - + LPC55S69 LPC55S69JBD100 @@ -20,13 +20,13 @@ false - + - 12.0.0 + 15.0.1 @@ -37,7 +37,7 @@ true - + true @@ -80,7 +80,7 @@ true - + true @@ -135,12 +135,12 @@ true - + true - + true @@ -257,7 +257,7 @@ true - + true @@ -350,22 +350,22 @@ true - + true - + true - + true - + true @@ -466,7 +466,7 @@ true - + true @@ -518,13 +518,13 @@ - + - 12.0.0 + 15.0.1 @@ -771,13 +771,13 @@ - + - 12.0.0 + 15.0.1 @@ -789,7 +789,7 @@ - + @@ -851,6 +851,7 @@ + diff --git a/SDK b/SDK index 3969019..6e8d03e 160000 --- a/SDK +++ b/SDK @@ -1 +1 @@ -Subproject commit 3969019d6a43b0b76c8227cbd5b9640047c41c0d +Subproject commit 6e8d03ec0afee59d138bb39f27842ba07a5a4784 diff --git a/board/clock_config.c b/board/clock_config.c index 5f21ddd..6e56ad9 100644 --- a/board/clock_config.c +++ b/board/clock_config.c @@ -17,11 +17,11 @@ /* clang-format off */ /* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* !!GlobalInfo -product: Clocks v10.0 +product: Clocks v13.0 processor: LPC55S69 package_id: LPC55S69JBD100 mcu_data: ksdk2_0 -processor_version: 12.0.0 +processor_version: 15.0.1 board: LPCXpresso55S69 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ /* clang-format on */ diff --git a/board/clock_config.h b/board/clock_config.h index 69a7bc6..3fe2789 100644 --- a/board/clock_config.h +++ b/board/clock_config.h @@ -41,6 +41,42 @@ void BOARD_InitBootClocks(void); #define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK 12000000U /*!< Core clock frequency: 12000000Hz */ +/* Clock outputs (values are in Hz): */ +#define BOARD_BOOTCLOCKFRO12M_ASYNCADC_CLOCK 0UL /* Clock consumers of ASYNCADC_clock output : ADC0 */ +#define BOARD_BOOTCLOCKFRO12M_CLKOUT_CLOCK 0UL /* Clock consumers of CLKOUT_clock output : N/A */ +#define BOARD_BOOTCLOCKFRO12M_CTIMER0_CLOCK 0UL /* Clock consumers of CTIMER0_clock output : CTIMER0 */ +#define BOARD_BOOTCLOCKFRO12M_CTIMER1_CLOCK 0UL /* Clock consumers of CTIMER1_clock output : CTIMER1 */ +#define BOARD_BOOTCLOCKFRO12M_CTIMER2_CLOCK 0UL /* Clock consumers of CTIMER2_clock output : CTIMER2 */ +#define BOARD_BOOTCLOCKFRO12M_CTIMER3_CLOCK 0UL /* Clock consumers of CTIMER3_clock output : CTIMER3 */ +#define BOARD_BOOTCLOCKFRO12M_CTIMER4_CLOCK 0UL /* Clock consumers of CTIMER4_clock output : CTIMER4 */ +#define BOARD_BOOTCLOCKFRO12M_FXCOM0_CLOCK 0UL /* Clock consumers of FXCOM0_clock output : FLEXCOMM0 */ +#define BOARD_BOOTCLOCKFRO12M_FXCOM1_CLOCK 0UL /* Clock consumers of FXCOM1_clock output : FLEXCOMM1 */ +#define BOARD_BOOTCLOCKFRO12M_FXCOM2_CLOCK 0UL /* Clock consumers of FXCOM2_clock output : FLEXCOMM2 */ +#define BOARD_BOOTCLOCKFRO12M_FXCOM3_CLOCK 0UL /* Clock consumers of FXCOM3_clock output : FLEXCOMM3 */ +#define BOARD_BOOTCLOCKFRO12M_FXCOM4_CLOCK 0UL /* Clock consumers of FXCOM4_clock output : FLEXCOMM4 */ +#define BOARD_BOOTCLOCKFRO12M_FXCOM5_CLOCK 0UL /* Clock consumers of FXCOM5_clock output : FLEXCOMM5 */ +#define BOARD_BOOTCLOCKFRO12M_FXCOM6_CLOCK 0UL /* Clock consumers of FXCOM6_clock output : FLEXCOMM6 */ +#define BOARD_BOOTCLOCKFRO12M_FXCOM7_CLOCK 0UL /* Clock consumers of FXCOM7_clock output : FLEXCOMM7 */ +#define BOARD_BOOTCLOCKFRO12M_HSLSPI_CLOCK 0UL /* Clock consumers of HSLSPI_clock output : FLEXCOMM8 */ +#define BOARD_BOOTCLOCKFRO12M_MCLK_CLOCK 0UL /* Clock consumers of MCLK_clock output : N/A */ +#define BOARD_BOOTCLOCKFRO12M_OSC32KHZ_CLOCK 0UL /* Clock consumers of OSC32KHZ_clock output : FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, USBHSD, USBHSH, USBPHY */ +#define BOARD_BOOTCLOCKFRO12M_OSTIMER32KHZ_CLOCK 0UL /* Clock consumers of OSTIMER32KHZ_clock output : OSTIMER */ +#define BOARD_BOOTCLOCKFRO12M_PLUCLKIN_CLOCK 0UL /* Clock consumers of PLUCLKIN_clock output : PLU */ +#define BOARD_BOOTCLOCKFRO12M_PLU_GLITCH_12MHZ_CLOCK 0UL /* Clock consumers of PLU_GLITCH_12MHz_clock output : PLU */ +#define BOARD_BOOTCLOCKFRO12M_PLU_GLITCH_1MHZ_CLOCK 0UL /* Clock consumers of PLU_GLITCH_1MHz_clock output : PLU */ +#define BOARD_BOOTCLOCKFRO12M_RTC1HZ_CLOCK 0UL /* Clock consumers of RTC1HZ_clock output : N/A */ +#define BOARD_BOOTCLOCKFRO12M_RTC1KHZ_CLOCK 0UL /* Clock consumers of RTC1KHZ_clock output : N/A */ +#define BOARD_BOOTCLOCKFRO12M_SCT_CLOCK 0UL /* Clock consumers of SCT_clock output : SCT0 */ +#define BOARD_BOOTCLOCKFRO12M_SDIO_CLOCK 0UL /* Clock consumers of SDIO_clock output : SDIF */ +#define BOARD_BOOTCLOCKFRO12M_SYSTICK0_CLOCK 0UL /* Clock consumers of SYSTICK0_clock output : N/A */ +#define BOARD_BOOTCLOCKFRO12M_SYSTICK1_CLOCK 0UL /* Clock consumers of SYSTICK1_clock output : N/A */ +#define BOARD_BOOTCLOCKFRO12M_SYSTEM_CLOCK 12000000UL /* Clock consumers of System_clock output : ADC0, ANACTRL, CASPER, CRC_ENGINE, CTIMER0, CTIMER1, CTIMER2, CTIMER3, CTIMER4, DMA0, DMA1, FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, GINT0, GINT1, GPIO, INPUTMUX, IOCON, MAILBOX, MRT0, OSTIMER, PINT, PLU, PUF, SCT0, SDIF, SECGPIO, SECPINT, SWD, SYSCTL, USB0, USBFSH, USBHSD, USBHSH, USBPHY, UTICK0, WWDT */ +#define BOARD_BOOTCLOCKFRO12M_TRACE_CLOCK 0UL /* Clock consumers of TRACE_clock output : SWD */ +#define BOARD_BOOTCLOCKFRO12M_USB0_CLOCK 0UL /* Clock consumers of USB0_clock output : USB0, USBFSH */ +#define BOARD_BOOTCLOCKFRO12M_USB1_PHY_CLOCK 0UL /* Clock consumers of USB1_PHY_clock output : USBHSD, USBHSH, USBPHY */ +#define BOARD_BOOTCLOCKFRO12M_UTICK_CLOCK 0UL /* Clock consumers of UTICK_clock output : UTICK0 */ +#define BOARD_BOOTCLOCKFRO12M_WDT_CLOCK 0UL /* Clock consumers of WDT_clock output : WWDT */ + /******************************************************************************* * API for BOARD_BootClockFRO12M configuration ******************************************************************************/ @@ -67,6 +103,42 @@ void BOARD_BootClockFRO12M(void); #define BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK 96000000U /*!< Core clock frequency: 96000000Hz */ +/* Clock outputs (values are in Hz): */ +#define BOARD_BOOTCLOCKFROHF96M_ASYNCADC_CLOCK 0UL /* Clock consumers of ASYNCADC_clock output : ADC0 */ +#define BOARD_BOOTCLOCKFROHF96M_CLKOUT_CLOCK 0UL /* Clock consumers of CLKOUT_clock output : N/A */ +#define BOARD_BOOTCLOCKFROHF96M_CTIMER0_CLOCK 0UL /* Clock consumers of CTIMER0_clock output : CTIMER0 */ +#define BOARD_BOOTCLOCKFROHF96M_CTIMER1_CLOCK 0UL /* Clock consumers of CTIMER1_clock output : CTIMER1 */ +#define BOARD_BOOTCLOCKFROHF96M_CTIMER2_CLOCK 0UL /* Clock consumers of CTIMER2_clock output : CTIMER2 */ +#define BOARD_BOOTCLOCKFROHF96M_CTIMER3_CLOCK 0UL /* Clock consumers of CTIMER3_clock output : CTIMER3 */ +#define BOARD_BOOTCLOCKFROHF96M_CTIMER4_CLOCK 0UL /* Clock consumers of CTIMER4_clock output : CTIMER4 */ +#define BOARD_BOOTCLOCKFROHF96M_FXCOM0_CLOCK 0UL /* Clock consumers of FXCOM0_clock output : FLEXCOMM0 */ +#define BOARD_BOOTCLOCKFROHF96M_FXCOM1_CLOCK 0UL /* Clock consumers of FXCOM1_clock output : FLEXCOMM1 */ +#define BOARD_BOOTCLOCKFROHF96M_FXCOM2_CLOCK 0UL /* Clock consumers of FXCOM2_clock output : FLEXCOMM2 */ +#define BOARD_BOOTCLOCKFROHF96M_FXCOM3_CLOCK 0UL /* Clock consumers of FXCOM3_clock output : FLEXCOMM3 */ +#define BOARD_BOOTCLOCKFROHF96M_FXCOM4_CLOCK 0UL /* Clock consumers of FXCOM4_clock output : FLEXCOMM4 */ +#define BOARD_BOOTCLOCKFROHF96M_FXCOM5_CLOCK 0UL /* Clock consumers of FXCOM5_clock output : FLEXCOMM5 */ +#define BOARD_BOOTCLOCKFROHF96M_FXCOM6_CLOCK 0UL /* Clock consumers of FXCOM6_clock output : FLEXCOMM6 */ +#define BOARD_BOOTCLOCKFROHF96M_FXCOM7_CLOCK 0UL /* Clock consumers of FXCOM7_clock output : FLEXCOMM7 */ +#define BOARD_BOOTCLOCKFROHF96M_HSLSPI_CLOCK 0UL /* Clock consumers of HSLSPI_clock output : FLEXCOMM8 */ +#define BOARD_BOOTCLOCKFROHF96M_MCLK_CLOCK 0UL /* Clock consumers of MCLK_clock output : N/A */ +#define BOARD_BOOTCLOCKFROHF96M_OSC32KHZ_CLOCK 0UL /* Clock consumers of OSC32KHZ_clock output : FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, USBHSD, USBHSH, USBPHY */ +#define BOARD_BOOTCLOCKFROHF96M_OSTIMER32KHZ_CLOCK 0UL /* Clock consumers of OSTIMER32KHZ_clock output : OSTIMER */ +#define BOARD_BOOTCLOCKFROHF96M_PLUCLKIN_CLOCK 0UL /* Clock consumers of PLUCLKIN_clock output : PLU */ +#define BOARD_BOOTCLOCKFROHF96M_PLU_GLITCH_12MHZ_CLOCK0UL /* Clock consumers of PLU_GLITCH_12MHz_clock output : PLU */ +#define BOARD_BOOTCLOCKFROHF96M_PLU_GLITCH_1MHZ_CLOCK 0UL /* Clock consumers of PLU_GLITCH_1MHz_clock output : PLU */ +#define BOARD_BOOTCLOCKFROHF96M_RTC1HZ_CLOCK 0UL /* Clock consumers of RTC1HZ_clock output : N/A */ +#define BOARD_BOOTCLOCKFROHF96M_RTC1KHZ_CLOCK 0UL /* Clock consumers of RTC1KHZ_clock output : N/A */ +#define BOARD_BOOTCLOCKFROHF96M_SCT_CLOCK 0UL /* Clock consumers of SCT_clock output : SCT0 */ +#define BOARD_BOOTCLOCKFROHF96M_SDIO_CLOCK 0UL /* Clock consumers of SDIO_clock output : SDIF */ +#define BOARD_BOOTCLOCKFROHF96M_SYSTICK0_CLOCK 0UL /* Clock consumers of SYSTICK0_clock output : N/A */ +#define BOARD_BOOTCLOCKFROHF96M_SYSTICK1_CLOCK 0UL /* Clock consumers of SYSTICK1_clock output : N/A */ +#define BOARD_BOOTCLOCKFROHF96M_SYSTEM_CLOCK 96000000UL /* Clock consumers of System_clock output : ADC0, ANACTRL, CASPER, CRC_ENGINE, CTIMER0, CTIMER1, CTIMER2, CTIMER3, CTIMER4, DMA0, DMA1, FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, GINT0, GINT1, GPIO, INPUTMUX, IOCON, MAILBOX, MRT0, OSTIMER, PINT, PLU, PUF, SCT0, SDIF, SECGPIO, SECPINT, SWD, SYSCTL, USB0, USBFSH, USBHSD, USBHSH, USBPHY, UTICK0, WWDT */ +#define BOARD_BOOTCLOCKFROHF96M_TRACE_CLOCK 0UL /* Clock consumers of TRACE_clock output : SWD */ +#define BOARD_BOOTCLOCKFROHF96M_USB0_CLOCK 0UL /* Clock consumers of USB0_clock output : USB0, USBFSH */ +#define BOARD_BOOTCLOCKFROHF96M_USB1_PHY_CLOCK 0UL /* Clock consumers of USB1_PHY_clock output : USBHSD, USBHSH, USBPHY */ +#define BOARD_BOOTCLOCKFROHF96M_UTICK_CLOCK 0UL /* Clock consumers of UTICK_clock output : UTICK0 */ +#define BOARD_BOOTCLOCKFROHF96M_WDT_CLOCK 0UL /* Clock consumers of WDT_clock output : WWDT */ + /******************************************************************************* * API for BOARD_BootClockFROHF96M configuration ******************************************************************************/ @@ -93,6 +165,42 @@ void BOARD_BootClockFROHF96M(void); #define BOARD_BOOTCLOCKPLL100M_CORE_CLOCK 100000000U /*!< Core clock frequency: 100000000Hz */ +/* Clock outputs (values are in Hz): */ +#define BOARD_BOOTCLOCKPLL100M_ASYNCADC_CLOCK 0UL /* Clock consumers of ASYNCADC_clock output : ADC0 */ +#define BOARD_BOOTCLOCKPLL100M_CLKOUT_CLOCK 0UL /* Clock consumers of CLKOUT_clock output : N/A */ +#define BOARD_BOOTCLOCKPLL100M_CTIMER0_CLOCK 0UL /* Clock consumers of CTIMER0_clock output : CTIMER0 */ +#define BOARD_BOOTCLOCKPLL100M_CTIMER1_CLOCK 0UL /* Clock consumers of CTIMER1_clock output : CTIMER1 */ +#define BOARD_BOOTCLOCKPLL100M_CTIMER2_CLOCK 0UL /* Clock consumers of CTIMER2_clock output : CTIMER2 */ +#define BOARD_BOOTCLOCKPLL100M_CTIMER3_CLOCK 0UL /* Clock consumers of CTIMER3_clock output : CTIMER3 */ +#define BOARD_BOOTCLOCKPLL100M_CTIMER4_CLOCK 0UL /* Clock consumers of CTIMER4_clock output : CTIMER4 */ +#define BOARD_BOOTCLOCKPLL100M_FXCOM0_CLOCK 0UL /* Clock consumers of FXCOM0_clock output : FLEXCOMM0 */ +#define BOARD_BOOTCLOCKPLL100M_FXCOM1_CLOCK 0UL /* Clock consumers of FXCOM1_clock output : FLEXCOMM1 */ +#define BOARD_BOOTCLOCKPLL100M_FXCOM2_CLOCK 0UL /* Clock consumers of FXCOM2_clock output : FLEXCOMM2 */ +#define BOARD_BOOTCLOCKPLL100M_FXCOM3_CLOCK 0UL /* Clock consumers of FXCOM3_clock output : FLEXCOMM3 */ +#define BOARD_BOOTCLOCKPLL100M_FXCOM4_CLOCK 0UL /* Clock consumers of FXCOM4_clock output : FLEXCOMM4 */ +#define BOARD_BOOTCLOCKPLL100M_FXCOM5_CLOCK 0UL /* Clock consumers of FXCOM5_clock output : FLEXCOMM5 */ +#define BOARD_BOOTCLOCKPLL100M_FXCOM6_CLOCK 0UL /* Clock consumers of FXCOM6_clock output : FLEXCOMM6 */ +#define BOARD_BOOTCLOCKPLL100M_FXCOM7_CLOCK 0UL /* Clock consumers of FXCOM7_clock output : FLEXCOMM7 */ +#define BOARD_BOOTCLOCKPLL100M_HSLSPI_CLOCK 0UL /* Clock consumers of HSLSPI_clock output : FLEXCOMM8 */ +#define BOARD_BOOTCLOCKPLL100M_MCLK_CLOCK 0UL /* Clock consumers of MCLK_clock output : N/A */ +#define BOARD_BOOTCLOCKPLL100M_OSC32KHZ_CLOCK 0UL /* Clock consumers of OSC32KHZ_clock output : FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, USBHSD, USBHSH, USBPHY */ +#define BOARD_BOOTCLOCKPLL100M_OSTIMER32KHZ_CLOCK 0UL /* Clock consumers of OSTIMER32KHZ_clock output : OSTIMER */ +#define BOARD_BOOTCLOCKPLL100M_PLUCLKIN_CLOCK 0UL /* Clock consumers of PLUCLKIN_clock output : PLU */ +#define BOARD_BOOTCLOCKPLL100M_PLU_GLITCH_12MHZ_CLOCK 0UL /* Clock consumers of PLU_GLITCH_12MHz_clock output : PLU */ +#define BOARD_BOOTCLOCKPLL100M_PLU_GLITCH_1MHZ_CLOCK 0UL /* Clock consumers of PLU_GLITCH_1MHz_clock output : PLU */ +#define BOARD_BOOTCLOCKPLL100M_RTC1HZ_CLOCK 0UL /* Clock consumers of RTC1HZ_clock output : N/A */ +#define BOARD_BOOTCLOCKPLL100M_RTC1KHZ_CLOCK 0UL /* Clock consumers of RTC1KHZ_clock output : N/A */ +#define BOARD_BOOTCLOCKPLL100M_SCT_CLOCK 0UL /* Clock consumers of SCT_clock output : SCT0 */ +#define BOARD_BOOTCLOCKPLL100M_SDIO_CLOCK 0UL /* Clock consumers of SDIO_clock output : SDIF */ +#define BOARD_BOOTCLOCKPLL100M_SYSTICK0_CLOCK 0UL /* Clock consumers of SYSTICK0_clock output : N/A */ +#define BOARD_BOOTCLOCKPLL100M_SYSTICK1_CLOCK 0UL /* Clock consumers of SYSTICK1_clock output : N/A */ +#define BOARD_BOOTCLOCKPLL100M_SYSTEM_CLOCK 100000000UL /* Clock consumers of System_clock output : ADC0, ANACTRL, CASPER, CRC_ENGINE, CTIMER0, CTIMER1, CTIMER2, CTIMER3, CTIMER4, DMA0, DMA1, FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, GINT0, GINT1, GPIO, INPUTMUX, IOCON, MAILBOX, MRT0, OSTIMER, PINT, PLU, PUF, SCT0, SDIF, SECGPIO, SECPINT, SWD, SYSCTL, USB0, USBFSH, USBHSD, USBHSH, USBPHY, UTICK0, WWDT */ +#define BOARD_BOOTCLOCKPLL100M_TRACE_CLOCK 0UL /* Clock consumers of TRACE_clock output : SWD */ +#define BOARD_BOOTCLOCKPLL100M_USB0_CLOCK 0UL /* Clock consumers of USB0_clock output : USB0, USBFSH */ +#define BOARD_BOOTCLOCKPLL100M_USB1_PHY_CLOCK 0UL /* Clock consumers of USB1_PHY_clock output : USBHSD, USBHSH, USBPHY */ +#define BOARD_BOOTCLOCKPLL100M_UTICK_CLOCK 0UL /* Clock consumers of UTICK_clock output : UTICK0 */ +#define BOARD_BOOTCLOCKPLL100M_WDT_CLOCK 0UL /* Clock consumers of WDT_clock output : WWDT */ + /******************************************************************************* * API for BOARD_BootClockPLL100M configuration ******************************************************************************/ @@ -119,6 +227,42 @@ void BOARD_BootClockPLL100M(void); #define BOARD_BOOTCLOCKPLL150M_CORE_CLOCK 150000000U /*!< Core clock frequency: 150000000Hz */ +/* Clock outputs (values are in Hz): */ +#define BOARD_BOOTCLOCKPLL150M_ASYNCADC_CLOCK 0UL /* Clock consumers of ASYNCADC_clock output : ADC0 */ +#define BOARD_BOOTCLOCKPLL150M_CLKOUT_CLOCK 0UL /* Clock consumers of CLKOUT_clock output : N/A */ +#define BOARD_BOOTCLOCKPLL150M_CTIMER0_CLOCK 0UL /* Clock consumers of CTIMER0_clock output : CTIMER0 */ +#define BOARD_BOOTCLOCKPLL150M_CTIMER1_CLOCK 0UL /* Clock consumers of CTIMER1_clock output : CTIMER1 */ +#define BOARD_BOOTCLOCKPLL150M_CTIMER2_CLOCK 0UL /* Clock consumers of CTIMER2_clock output : CTIMER2 */ +#define BOARD_BOOTCLOCKPLL150M_CTIMER3_CLOCK 0UL /* Clock consumers of CTIMER3_clock output : CTIMER3 */ +#define BOARD_BOOTCLOCKPLL150M_CTIMER4_CLOCK 0UL /* Clock consumers of CTIMER4_clock output : CTIMER4 */ +#define BOARD_BOOTCLOCKPLL150M_FXCOM0_CLOCK 0UL /* Clock consumers of FXCOM0_clock output : FLEXCOMM0 */ +#define BOARD_BOOTCLOCKPLL150M_FXCOM1_CLOCK 0UL /* Clock consumers of FXCOM1_clock output : FLEXCOMM1 */ +#define BOARD_BOOTCLOCKPLL150M_FXCOM2_CLOCK 0UL /* Clock consumers of FXCOM2_clock output : FLEXCOMM2 */ +#define BOARD_BOOTCLOCKPLL150M_FXCOM3_CLOCK 0UL /* Clock consumers of FXCOM3_clock output : FLEXCOMM3 */ +#define BOARD_BOOTCLOCKPLL150M_FXCOM4_CLOCK 0UL /* Clock consumers of FXCOM4_clock output : FLEXCOMM4 */ +#define BOARD_BOOTCLOCKPLL150M_FXCOM5_CLOCK 0UL /* Clock consumers of FXCOM5_clock output : FLEXCOMM5 */ +#define BOARD_BOOTCLOCKPLL150M_FXCOM6_CLOCK 0UL /* Clock consumers of FXCOM6_clock output : FLEXCOMM6 */ +#define BOARD_BOOTCLOCKPLL150M_FXCOM7_CLOCK 0UL /* Clock consumers of FXCOM7_clock output : FLEXCOMM7 */ +#define BOARD_BOOTCLOCKPLL150M_HSLSPI_CLOCK 0UL /* Clock consumers of HSLSPI_clock output : FLEXCOMM8 */ +#define BOARD_BOOTCLOCKPLL150M_MCLK_CLOCK 0UL /* Clock consumers of MCLK_clock output : N/A */ +#define BOARD_BOOTCLOCKPLL150M_OSC32KHZ_CLOCK 0UL /* Clock consumers of OSC32KHZ_clock output : FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, USBHSD, USBHSH, USBPHY */ +#define BOARD_BOOTCLOCKPLL150M_OSTIMER32KHZ_CLOCK 0UL /* Clock consumers of OSTIMER32KHZ_clock output : OSTIMER */ +#define BOARD_BOOTCLOCKPLL150M_PLUCLKIN_CLOCK 0UL /* Clock consumers of PLUCLKIN_clock output : PLU */ +#define BOARD_BOOTCLOCKPLL150M_PLU_GLITCH_12MHZ_CLOCK 0UL /* Clock consumers of PLU_GLITCH_12MHz_clock output : PLU */ +#define BOARD_BOOTCLOCKPLL150M_PLU_GLITCH_1MHZ_CLOCK 0UL /* Clock consumers of PLU_GLITCH_1MHz_clock output : PLU */ +#define BOARD_BOOTCLOCKPLL150M_RTC1HZ_CLOCK 0UL /* Clock consumers of RTC1HZ_clock output : N/A */ +#define BOARD_BOOTCLOCKPLL150M_RTC1KHZ_CLOCK 0UL /* Clock consumers of RTC1KHZ_clock output : N/A */ +#define BOARD_BOOTCLOCKPLL150M_SCT_CLOCK 0UL /* Clock consumers of SCT_clock output : SCT0 */ +#define BOARD_BOOTCLOCKPLL150M_SDIO_CLOCK 0UL /* Clock consumers of SDIO_clock output : SDIF */ +#define BOARD_BOOTCLOCKPLL150M_SYSTICK0_CLOCK 0UL /* Clock consumers of SYSTICK0_clock output : N/A */ +#define BOARD_BOOTCLOCKPLL150M_SYSTICK1_CLOCK 0UL /* Clock consumers of SYSTICK1_clock output : N/A */ +#define BOARD_BOOTCLOCKPLL150M_SYSTEM_CLOCK 150000000UL /* Clock consumers of System_clock output : ADC0, ANACTRL, CASPER, CRC_ENGINE, CTIMER0, CTIMER1, CTIMER2, CTIMER3, CTIMER4, DMA0, DMA1, FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, GINT0, GINT1, GPIO, INPUTMUX, IOCON, MAILBOX, MRT0, OSTIMER, PINT, PLU, PUF, SCT0, SDIF, SECGPIO, SECPINT, SWD, SYSCTL, USB0, USBFSH, USBHSD, USBHSH, USBPHY, UTICK0, WWDT */ +#define BOARD_BOOTCLOCKPLL150M_TRACE_CLOCK 0UL /* Clock consumers of TRACE_clock output : SWD */ +#define BOARD_BOOTCLOCKPLL150M_USB0_CLOCK 0UL /* Clock consumers of USB0_clock output : USB0, USBFSH */ +#define BOARD_BOOTCLOCKPLL150M_USB1_PHY_CLOCK 0UL /* Clock consumers of USB1_PHY_clock output : USBHSD, USBHSH, USBPHY */ +#define BOARD_BOOTCLOCKPLL150M_UTICK_CLOCK 0UL /* Clock consumers of UTICK_clock output : UTICK0 */ +#define BOARD_BOOTCLOCKPLL150M_WDT_CLOCK 0UL /* Clock consumers of WDT_clock output : WWDT */ + /******************************************************************************* * API for BOARD_BootClockPLL150M configuration ******************************************************************************/ diff --git a/board/peripherals.c b/board/peripherals.c index 2628636..88d968c 100644 --- a/board/peripherals.c +++ b/board/peripherals.c @@ -6,11 +6,11 @@ /* clang-format off */ /* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* !!GlobalInfo -product: Peripherals v11.0 +product: Peripherals v14.0 processor: LPC55S69 package_id: LPC55S69JBD100 mcu_data: ksdk2_0 -processor_version: 12.0.0 +processor_version: 15.0.1 board: LPCXpresso55S69 functionalGroups: - name: BOARD_InitPeripherals_cm33_core0 @@ -29,6 +29,7 @@ component: - global_system_definitions: - user_definitions: '' - user_includes: '' + - global_init: '' * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ /* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* diff --git a/board/pin_mux.c b/board/pin_mux.c index 1c8f15c..575cd04 100644 --- a/board/pin_mux.c +++ b/board/pin_mux.c @@ -7,11 +7,11 @@ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* !!GlobalInfo -product: Pins v12.0 +product: Pins v15.0 processor: LPC55S69 package_id: LPC55S69JBD100 mcu_data: ksdk2_0 -processor_version: 12.0.0 +processor_version: 15.0.1 board: LPCXpresso55S69 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ diff --git a/src/main.c b/src/main.c index 21245ea..2e3c203 100644 --- a/src/main.c +++ b/src/main.c @@ -17,4 +17,4 @@ int main(void) { for(;;) { __WFI(); } -} \ No newline at end of file +}