Updated NOR LUT.
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2a5e894a45
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@ -3,6 +3,7 @@ IndentWidth: 4
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AlignConsecutiveMacros: Consecutive
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AlignConsecutiveDeclarations: true
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AlignConsecutiveAssignments: true
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BreakBeforeBinaryOperators: All
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BreakBeforeBraces: Custom
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BraceWrapping:
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AfterEnum: false
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@ -23,26 +23,47 @@ __attribute__((section(".boot_hdr.conf"), used))
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#endif
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const flexspi_nor_config_t spiflash_config = {
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.memConfig =
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{
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.tag = FLEXSPI_CFG_BLK_TAG,
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.version = FLEXSPI_CFG_BLK_VERSION,
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.readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackInternally,
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.csHoldTime = 3u,
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.csSetupTime = 3u,
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.columnAddressWidth = 0u,
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.sflashPadType = kSerialFlash_4Pads,
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.serialClkFreq = kFlexSpiSerialClk_133MHz,
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.sflashA1Size = 16u * 1024u * 1024u,
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.lookupTable =
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{
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// Fast Read Quad IO
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FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
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FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),
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},
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.memConfig = {
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.tag = FLEXSPI_CFG_BLK_TAG,
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.version = FLEXSPI_CFG_BLK_VERSION,
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.readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackInternally,
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.csHoldTime = 3U,
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.csSetupTime = 3U,
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.columnAddressWidth = 0U,
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.deviceType = kFlexSpiDeviceType_SerialNOR,
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.sflashPadType = kSerialFlash_4Pads,
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.serialClkFreq = kFlexSpiSerialClk_133MHz,
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.sflashA1Size = 16U * 1024U * 1024U,
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.busyOffset = 0U,
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.busyBitPolarity = 1U,
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.lookupTable = {
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// Fast read quad IO (EBh) [NOR_CMD_LUT_SEQ_IDX_READ]
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[4U * 0 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
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[4U * 0 + 1U] = FLEXSPI_LUT_SEQ(MODE8_SDR, FLEXSPI_4PAD, 0xF0, DUMMY_SDR, FLEXSPI_4PAD, 0x04),
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[4U * 0 + 2U] = FLEXSPI_LUT_SEQ(READ_SDR, FLEXSPI_4PAD, 0x00, STOP, FLEXSPI_1PAD, 0x00),
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// Read SR1 (05h) [NOR_CMD_LUT_SEQ_IDX_READSTATUS]
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[4U * 1 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x00),
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// Write enable (06h) [NOR_CMD_LUT_SEQ_IDX_WRITEENABLE]
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[4U * 3 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, FLEXSPI_1PAD, 0x00),
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// Page program () [NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM]
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[4U * 4 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x32, RADDR_SDR, FLEXSPI_4PAD, 0x18),
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[4U * 4 + 1U] = FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_4PAD, 0x00, STOP, FLEXSPI_1PAD, 0x00),
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// Erase sector (20h) [NOR_CMD_LUT_SEQ_IDX_ERASESECTOR]
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[4U * 5 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20, RADDR_SDR, FLEXSPI_1PAD, 0x18),
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// Enter QPI mode ()
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[4U * 7 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20, RADDR_SDR, FLEXSPI_1PAD, 0x18),
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// Erase block 32kB (52h) [NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK]
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[4U * 8 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x52, RADDR_SDR, FLEXSPI_1PAD, 0x18),
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},
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.pageSize = 256u,
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.sectorSize = 4u * 1024u,
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.blockSize = 64u * 1024u,
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},
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.pageSize = 256u,
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.sectorSize = 4u * 1024u,
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.blockSize = 32u * 1024u,
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};
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#endif /* XIP_BOOT_HEADER_ENABLE */
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