Initial commit.

This commit is contained in:
imi415 2022-05-17 22:15:13 +08:00
commit 1587d92f79
Signed by: imi415
GPG Key ID: 885EC2B5A8A6F8A7
17 changed files with 1308 additions and 0 deletions

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.gitignore vendored Normal file
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/board/*.bak
/build
/cmake-build-*
/.vscode
/*.jdebug*
/*.jflash

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.gitmodules vendored Normal file
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[submodule "SDK"]
path = SDK
url = https://git.minori.work/Embedded_SDK/MCUXpresso_MK60DN512xxx10.git

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CMakeLists.txt Normal file
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cmake_minimum_required(VERSION 3.10)
project(landzo_k60_template)
enable_language(CXX)
enable_language(ASM)
# Different linker scripts
set(TARGET_LDSCRIPT_FLASH "${CMAKE_SOURCE_DIR}/SDK/devices/MK60D10/gcc/MK60DN512xxx10_flash.ld")
set(TARGET_LDSCRIPT_RAM "${CMAKE_SOURCE_DIR}/SDK/devices/MK60D10/gcc/MK60DN512xxx10_ram.ld")
set(TARGET_SOURCES
"SDK/devices/MK60D10/drivers/fsl_adc16.c"
"SDK/devices/MK60D10/drivers/fsl_clock.c"
"SDK/devices/MK60D10/drivers/fsl_cmp.c"
"SDK/devices/MK60D10/drivers/fsl_cmt.c"
"SDK/devices/MK60D10/drivers/fsl_common.c"
"SDK/devices/MK60D10/drivers/fsl_crc.c"
"SDK/devices/MK60D10/drivers/fsl_dac.c"
"SDK/devices/MK60D10/drivers/fsl_dmamux.c"
"SDK/devices/MK60D10/drivers/fsl_dspi.c"
"SDK/devices/MK60D10/drivers/fsl_dspi_edma.c"
"SDK/devices/MK60D10/drivers/fsl_edma.c"
"SDK/devices/MK60D10/drivers/fsl_enet.c"
"SDK/devices/MK60D10/drivers/fsl_ewm.c"
"SDK/devices/MK60D10/drivers/fsl_flash.c"
"SDK/devices/MK60D10/drivers/fsl_flexbus.c"
"SDK/devices/MK60D10/drivers/fsl_flexcan.c"
"SDK/devices/MK60D10/drivers/fsl_ftm.c"
"SDK/devices/MK60D10/drivers/fsl_gpio.c"
"SDK/devices/MK60D10/drivers/fsl_i2c.c"
"SDK/devices/MK60D10/drivers/fsl_i2c_edma.c"
"SDK/devices/MK60D10/drivers/fsl_llwu.c"
"SDK/devices/MK60D10/drivers/fsl_lptmr.c"
"SDK/devices/MK60D10/drivers/fsl_pdb.c"
"SDK/devices/MK60D10/drivers/fsl_pit.c"
"SDK/devices/MK60D10/drivers/fsl_pmc.c"
"SDK/devices/MK60D10/drivers/fsl_rcm.c"
"SDK/devices/MK60D10/drivers/fsl_rnga.c"
"SDK/devices/MK60D10/drivers/fsl_rtc.c"
"SDK/devices/MK60D10/drivers/fsl_sai.c"
"SDK/devices/MK60D10/drivers/fsl_sai_edma.c"
"SDK/devices/MK60D10/drivers/fsl_sdhc.c"
"SDK/devices/MK60D10/drivers/fsl_sim.c"
"SDK/devices/MK60D10/drivers/fsl_smc.c"
"SDK/devices/MK60D10/drivers/fsl_sysmpu.c"
"SDK/devices/MK60D10/drivers/fsl_tsi_v2.c"
"SDK/devices/MK60D10/drivers/fsl_uart.c"
"SDK/devices/MK60D10/drivers/fsl_uart_edma.c"
"SDK/devices/MK60D10/drivers/fsl_vref.c"
"SDK/devices/MK60D10/drivers/fsl_wdog.c"
"SDK/devices/MK60D10/system_MK60D10.c"
"SDK/devices/MK60D10/utilities/fsl_debug_console.c"
"SDK/devices/MK60D10/utilities/fsl_notifier.c"
"SDK/devices/MK60D10/utilities/fsl_sbrk.c"
"SDK/devices/MK60D10/gcc/startup_MK60D10.S"
"SDK/devices/MK60D10/system_MK60D10.c"
"board/board.c"
"board/clock_config.c"
"board/peripherals.c"
"board/pin_mux.c"
"src/main.c"
"src/system_utilities.c"
)
set(TARGET_C_DEFINES
"CPU_MK60DN512VLQ10"
"__STARTUP_CLEAR_BSS"
)
set(TARGET_C_INCLUDES
"SDK/CMSIS/Include"
"SDK/devices/MK60D10"
"SDK/devices/MK60D10/drivers"
"SDK/devices/MK60D10/utilities"
"board"
"include"
)
# Shared libraries linked with application
set(TARGET_LIBS
)
# Shared library and linker script search paths
set(TARGET_LIB_DIRECTORIES
)
# Device specific settings, goes to CFLAGS and LDFLAGS
set(TARGET_CFLAGS_HARDWARE "-mcpu=cortex-m4 -mthumb -mfloat-abi=soft")
# Conditional flags
# DEBUG
set(CMAKE_C_FLAGS_DEBUG "-DDEBUG -O0 -g")
set(CMAKE_CXX_FLAGS_DEBUG "-DDEBUG -O0 -g")
set(CMAKE_ASM_FLAGS_DEBUG "-DDEBUG -O0 -g")
# RELEASE
set(CMAKE_C_FLAGS_RELEASE "-DNDEBUG -O2 -flto")
set(CMAKE_CXX_FLAGS_RELEASE "-DNDEBUG -O2 -flto")
set(CMAKE_ASM_FLAGS_RELEASE "-DNDEBUG -O2 -flto")
set(CMAKE_EXE_LINKER_FLAGS_RELEASE "-flto")
# Final compiler flags
set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} ${TARGET_CFLAGS_HARDWARE} -Wall -fno-common -fno-builtin -ffreestanding -fdata-sections -ffunction-sections")
set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} ${TARGET_CFLAGS_HARDWARE} -Wall -fno-common -fno-builtin -ffreestanding -fdata-sections -ffunction-sections")
set(CMAKE_ASM_FLAGS "${CMAKE_ASM_FLAGS} ${CMAKE_C_FLAGS} -x assembler-with-cpp")
set(CMAKE_EXE_LINKER_FLAGS "-specs=nano.specs -specs=nosys.specs -Wl,--gc-sections -Wl,--print-memory-usage -lc -lm -lnosys ")
# Shared sources, includes and definitions
add_compile_definitions(${TARGET_C_DEFINES})
include_directories(${TARGET_C_INCLUDES})
link_directories(${TARGET_LIB_DIRECTORIES})
link_libraries(${TARGET_LIBS})
# Main targets are added here
# Create ELF
add_executable("${CMAKE_PROJECT_NAME}_FLASH.elf" ${TARGET_SOURCES})
target_link_options("${CMAKE_PROJECT_NAME}_FLASH.elf"
PRIVATE "-T${TARGET_LDSCRIPT_FLASH}"
)
add_custom_command(OUTPUT "${CMAKE_PROJECT_NAME}_FLASH.hex"
COMMAND ${CMAKE_OBJCOPY} "-O" "ihex" "${CMAKE_PROJECT_NAME}_FLASH.elf" "${CMAKE_PROJECT_NAME}_FLASH.hex"
DEPENDS "${CMAKE_PROJECT_NAME}_FLASH.elf"
)
add_custom_target("${CMAKE_PROJECT_NAME}_FLASH_HEX" DEPENDS "${CMAKE_PROJECT_NAME}_FLASH.hex")
# Create ELF
add_executable("${CMAKE_PROJECT_NAME}_RAM.elf" ${TARGET_SOURCES})
target_link_options("${CMAKE_PROJECT_NAME}_RAM.elf"
PRIVATE "-T${TARGET_LDSCRIPT_RAM}"
)
add_custom_command(OUTPUT "${CMAKE_PROJECT_NAME}_RAM.hex"
COMMAND ${CMAKE_OBJCOPY} "-O" "ihex" "${CMAKE_PROJECT_NAME}_RAM.elf" "${CMAKE_PROJECT_NAME}_RAM.hex"
DEPENDS "${CMAKE_PROJECT_NAME}_RAM.elf"
)
add_custom_target("${CMAKE_PROJECT_NAME}_RAM_HEX" DEPENDS "${CMAKE_PROJECT_NAME}_RAM.hex")

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MK60DN512xxx10.mex Normal file
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<?xml version="1.0" encoding= "UTF-8" ?>
<configuration name="MK60DN512xxx10" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_11 http://mcuxpresso.nxp.com/XSD/mex_configuration_11.xsd" uuid="9774b580-b203-4bb2-8e93-38f6a0d2a3d2" version="11" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_11" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<common>
<processor>MK60DN512xxx10</processor>
<package>MK60DN512VLQ10</package>
<mcu_data>ksdk2_0</mcu_data>
<cores selected="core0">
<core name="Cortex-M4" id="core0" description="M4 core"/>
</cores>
<description></description>
</common>
<preferences>
<validate_boot_init_only>true</validate_boot_init_only>
<generate_extended_information>false</generate_extended_information>
<generate_code_modified_registers_only>false</generate_code_modified_registers_only>
<update_include_paths>true</update_include_paths>
<generate_registers_defines>false</generate_registers_defines>
</preferences>
<tools>
<pins name="Pins" version="11.0" enabled="true" update_project_code="true">
<generated_project_files>
<file path="board/pin_mux.c" update_enabled="true"/>
<file path="board/pin_mux.h" update_enabled="true"/>
</generated_project_files>
<pins_profile>
<processor_version>11.0.1</processor_version>
<pin_labels>
<pin_label pin_num="58" pin_signal="PTA6/FTM0_CH3/TRACE_CLKOUT" label="BUZZER" identifier="BUZZER"/>
</pin_labels>
</pins_profile>
<functions_list>
<function name="BOARD_InitPins">
<description>Configures pin routing and optionally pin electrical features.</description>
<options>
<callFromInitBoot>true</callFromInitBoot>
<coreID>core0</coreID>
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="Peripheral" resourceId="UART0" description="Peripheral UART0 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.port" description="Pins initialization requires the PORT Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.gpio" description="Pins initialization requires the GPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
</dependencies>
<pins>
<pin peripheral="UART0" signal="TX" pin_num="136" pin_signal="PTD7/CMT_IRO/UART0_TX/FTM0_CH7/FTM0_FLT1"/>
<pin peripheral="UART0" signal="RX" pin_num="133" pin_signal="ADC0_SE7b/PTD6/LLWU_P15/SPI0_PCS3/UART0_RX/FTM0_CH6/FB_AD0/FTM0_FLT0"/>
<pin peripheral="GPIOA" signal="GPIO, 6" pin_num="58" pin_signal="PTA6/FTM0_CH3/TRACE_CLKOUT">
<pin_features>
<pin_feature name="direction" value="OUTPUT"/>
</pin_features>
</pin>
</pins>
</function>
</functions_list>
</pins>
<clocks name="Clocks" version="9.0" enabled="true" update_project_code="true">
<generated_project_files>
<file path="board/clock_config.c" update_enabled="true"/>
<file path="board/clock_config.h" update_enabled="true"/>
</generated_project_files>
<clocks_profile>
<processor_version>11.0.1</processor_version>
</clocks_profile>
<clock_configurations>
<clock_configuration name="BOARD_BootClockRUN" id_prefix="" prefix_user_defined="false">
<description></description>
<options/>
<dependencies>
<dependency resourceType="PinSignal" resourceId="OSC.EXTAL0" description="&apos;EXTAL0&apos; (Pins tool id: OSC.EXTAL0, Clocks tool id: OSC.EXTAL0) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
<feature name="routed" evaluation="">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="PinSignal" resourceId="OSC.EXTAL0" description="&apos;EXTAL0&apos; (Pins tool id: OSC.EXTAL0, Clocks tool id: OSC.EXTAL0) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
<feature name="direction" evaluation="">
<data>INPUT</data>
</feature>
</dependency>
<dependency resourceType="PinSignal" resourceId="RTC.EXTAL32" description="&apos;EXTAL32&apos; (Pins tool id: RTC.EXTAL32, Clocks tool id: RTC.EXTAL32) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
<feature name="routed" evaluation="">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="PinSignal" resourceId="RTC.EXTAL32" description="&apos;EXTAL32&apos; (Pins tool id: RTC.EXTAL32, Clocks tool id: RTC.EXTAL32) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
<feature name="direction" evaluation="">
<data>INPUT</data>
</feature>
</dependency>
<dependency resourceType="PinSignal" resourceId="RTC.XTAL32" description="&apos;XTAL32&apos; (Pins tool id: RTC.XTAL32, Clocks tool id: RTC.XTAL32) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
<feature name="routed" evaluation="">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="PinSignal" resourceId="RTC.XTAL32" description="&apos;XTAL32&apos; (Pins tool id: RTC.XTAL32, Clocks tool id: RTC.XTAL32) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
<feature name="direction" evaluation="">
<data>OUTPUT</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.rtc" description="Clocks initialization requires the RTC Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
</dependencies>
<clock_sources>
<clock_source id="OSC.OSC.outFreq" value="50 MHz" locked="false" enabled="true"/>
<clock_source id="RTC.RTC32kHz.outFreq" value="32.768 kHz" locked="false" enabled="true"/>
</clock_sources>
<clock_outputs>
<clock_output id="Bus_clock.outFreq" value="50 MHz" locked="false" accuracy=""/>
<clock_output id="Core_clock.outFreq" value="50 MHz" locked="false" accuracy=""/>
<clock_output id="Flash_clock.outFreq" value="25 MHz" locked="false" accuracy=""/>
<clock_output id="FlexBus_clock.outFreq" value="50 MHz" locked="false" accuracy=""/>
<clock_output id="LPO_clock.outFreq" value="1 kHz" locked="false" accuracy=""/>
<clock_output id="MCGFFCLK.outFreq" value="39.0625 kHz" locked="false" accuracy=""/>
<clock_output id="PLLFLLCLK.outFreq" value="25 MHz" locked="false" accuracy=""/>
<clock_output id="System_clock.outFreq" value="50 MHz" locked="false" accuracy=""/>
</clock_outputs>
<clock_settings>
<setting id="MCGMode" value="FBE" locked="false"/>
<setting id="MCG.CLKS.sel" value="MCG.OSCSEL" locked="false"/>
<setting id="MCG.FRDIV.scale" value="1280" locked="false"/>
<setting id="MCG.IREFS.sel" value="MCG.FRDIV" locked="false"/>
<setting id="MCG.PRDIV.scale" value="13" locked="false"/>
<setting id="MCG_C2_RANGE0_CFG" value="Very_high" locked="false"/>
<setting id="MCG_C2_RANGE0_FRDIV_CFG" value="Very_high" locked="false"/>
<setting id="OSC_CR_SYS_OSC_CAP_LOAD_CFG" value="SC18PF" locked="false"/>
<setting id="RTC_CR_OSCE_CFG" value="Enabled" locked="false"/>
<setting id="RTC_CR_OSC_CAP_LOAD_CFG" value="SC12PF" locked="false"/>
</clock_settings>
<called_from_default_init>true</called_from_default_init>
</clock_configuration>
</clock_configurations>
</clocks>
<dcdx name="DCDx" version="3.0" enabled="false" update_project_code="true">
<generated_project_files/>
<dcdx_profile>
<processor_version>N/A</processor_version>
</dcdx_profile>
<dcdx_configurations/>
</dcdx>
<periphs name="Peripherals" version="11.0" enabled="true" update_project_code="true">
<generated_project_files>
<file path="board/peripherals.c" update_enabled="true"/>
<file path="board/peripherals.h" update_enabled="true"/>
</generated_project_files>
<peripherals_profile>
<processor_version>11.0.1</processor_version>
</peripherals_profile>
<functional_groups>
<functional_group name="BOARD_InitPeripherals" uuid="ac647ac1-e799-4dfc-9b77-81b2d47bf6c6" called_from_default_init="true" id_prefix="" core="core0">
<description></description>
<options/>
<dependencies/>
<instances>
<instance name="NVIC" uuid="1245cd9f-ecda-4aa9-82a7-6244e9780588" type="nvic" type_id="nvic_57b5eef3774cc60acaede6f5b8bddc67" mode="general" peripheral="NVIC" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
<config_set name="nvic">
<array name="interrupt_table"/>
<array name="interrupts"/>
</config_set>
</instance>
</instances>
</functional_group>
</functional_groups>
<components>
<component name="system" uuid="0ac6f0c5-13d8-4500-9fb9-290c8c58d81b" type_id="system_54b53072540eeeb8f8e9343e71f28176">
<config_set_global name="global_system_definitions">
<setting name="user_definitions" value=""/>
<setting name="user_includes" value=""/>
</config_set_global>
</component>
<component name="generic_enet" uuid="9c439aef-395c-4b32-8127-c784de9fe2b9" type_id="generic_enet_74db5c914f0ddbe47d86af40cb77a619">
<config_set_global name="global_enet"/>
</component>
<component name="gpio_adapter_common" uuid="b68afe5c-0325-46e5-bf01-d4714b89fc80" type_id="gpio_adapter_common_57579b9ac814fe26bf95df0a384c36b6">
<config_set_global name="global_gpio_adapter_common" quick_selection="default"/>
</component>
<component name="generic_uart" uuid="4f193dac-3650-4f85-8f09-4275913bd092" type_id="generic_uart_8cae00565451cf2346eb1b8c624e73a6">
<config_set_global name="global_uart"/>
</component>
<component name="msg" uuid="29e39443-316b-4ee7-94e7-2b4ccb98899d" type_id="msg_6e2baaf3b97dbeef01c0043275f9a0e7">
<config_set_global name="global_messages"/>
</component>
<component name="uart_cmsis_common" uuid="580f8433-0a9d-4540-be64-cbb68ab7ba74" type_id="uart_cmsis_common_9cb8e302497aa696fdbb5a4fd622c2a8">
<config_set_global name="global_USART_CMSIS_common" quick_selection="default"/>
</component>
<component name="generic_can" uuid="125ff0ec-555a-4867-9738-2418703b4fc5" type_id="generic_can_1bfdd78b1af214566c1f23cf6a582d80">
<config_set_global name="global_can"/>
</component>
</components>
</periphs>
<tee name="TEE" version="4.0" enabled="false" update_project_code="true">
<generated_project_files/>
<tee_profile>
<processor_version>N/A</processor_version>
</tee_profile>
</tee>
</tools>
</configuration>

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Subproject commit 855e1be1225ff859dd5a9a5a3959ecc702a028df

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set(CMAKE_C_COMPILER arm-none-eabi-gcc)
set(CMAKE_CXX_COMPILER arm-none-eabi-g++)
# Make CMake happy about those compilers
set(CMAKE_TRY_COMPILE_TARGET_TYPE "STATIC_LIBRARY")
# Poor old Windows...
if(WIN32)
set(CMAKE_SYSTEM_NAME "Generic")
endif()

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/*
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdint.h>
#include "fsl_common.h"
#include "fsl_debug_console.h"
#include "board.h"
/*******************************************************************************
* Variables
******************************************************************************/
/*******************************************************************************
* Code
******************************************************************************/
/* Initialize debug console. */
void BOARD_InitDebugConsole(void)
{
uint32_t uartClkSrcFreq = BOARD_DEBUG_UART_CLK_FREQ;
DbgConsole_Init(BOARD_DEBUG_UART_BASEADDR, BOARD_DEBUG_UART_BAUDRATE, BOARD_DEBUG_UART_TYPE, uartClkSrcFreq);
}

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/*
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _BOARD_H_
#define _BOARD_H_
#include "clock_config.h"
#include "fsl_gpio.h"
/*******************************************************************************
* Definitions
******************************************************************************/
/*! @brief The board name */
#define BOARD_NAME "TWR-K60D100M"
/*! @brief The UART to use for debug messages. */
#define BOARD_USE_UART
#define BOARD_DEBUG_UART_TYPE DEBUG_CONSOLE_DEVICE_TYPE_UART
#define BOARD_DEBUG_UART_BASEADDR (uint32_t) UART0
#define BOARD_DEBUG_UART_CLKSRC kCLOCK_CoreSysClk
#define BOARD_DEBUG_UART_CLK_FREQ CLOCK_GetCoreSysClkFreq()
#define BOARD_UART_IRQ UART0_RX_TX_IRQn
#define BOARD_UART_IRQ_HANDLER UART0_RX_TX_IRQHandler
#ifndef BOARD_DEBUG_UART_BAUDRATE
#define BOARD_DEBUG_UART_BAUDRATE 115200
#endif /* BOARD_DEBUG_UART_BAUDRATE */
/*! @brief The CAN instance used for board */
#define BOARD_CAN_BASEADDR CAN1
/*! @brief The i2c instance used for i2c connection by default */
#define BOARD_I2C_BASEADDR I2C0
/*! @brief The Enet instance used for board */
#define BOARD_ENET_BASEADDR ENET
/*! @brief The FlexBus instance used for board.*/
#define BOARD_FLEXBUS_BASEADDR FB
#define BOARD_TSI_ELECTRODE_CNT 4U
/*! @brief Indexes of the TSI channels for on board electrodes */
#define BOARD_TSI_ELECTRODE_1 5U
#define BOARD_TSI_ELECTRODE_2 8U
#define BOARD_TSI_ELECTRODE_3 7U
#define BOARD_TSI_ELECTRODE_4 9U
#define BOARD_TSI_TWRPI_ELECTRODE_0 0U
#define BOARD_TSI_TWRPI_ELECTRODE_1 6U
#define BOARD_TSI_TWRPI_ELECTRODE_2 7U
#define BOARD_TSI_TWRPI_ELECTRODE_3 8U
#define BOARD_TSI_TWRPI_ELECTRODE_4 13U
#define BOARD_TSI_TWRPI_ELECTRODE_5 14U
#define BOARD_TSI_TWRPI_ELECTRODE_6 15U
#define BOARD_TSI_TWRPI_ELECTRODE_7 5U
#define BOARD_TSI_TWRPI_ELECTRODE_8 9U
#define BOARD_TSI_TWRPI_ELECTRODE_9 10U
#define BOARD_TSI_TWRPI_ELECTRODE_10 11U
#define BOARD_TSI_TWRPI_ELECTRODE_11 12U
/*! @brief ADC TWRPI ID input channel */
#define BOARD_ADC_TWRPIID0_CHANNEL 1U
#define BOARD_ADC_TWRPIID1_CHANNEL 16U
#define BOARD_ADC_TWRPI 1U
/*! @brief The SDHC instance/channel used for board */
#define BOARD_SDHC_BASEADDR SDHC
#define BOARD_SDHC_CD_GPIO_IRQ_HANDLER PORTE_IRQHandler
/*! @brief The CMP instance/channel used for board. */
#define BOARD_CMP_BASEADDR CMP0
#define BOARD_CMP_CHANNEL 0U
/*! @brief The i2c instance used for sai demo */
#define BOARD_SAI_DEMO_I2C_BASEADDR I2C0
/*! @brief The rtc instance used for rtc_func */
#define BOARD_RTC_FUNC_BASEADDR RTC
/* Board led color mapping */
#define LOGIC_LED_ON 0U
#define LOGIC_LED_OFF 1U
#define BOARD_LED_ORANGE_GPIO GPIOA
#define BOARD_LED_ORANGE_GPIO_PORT PORTA
#define BOARD_LED_ORANGE_GPIO_PIN 11U
#define BOARD_LED_YELLOW_GPIO GPIOA
#define BOARD_LED_YELLOW_GPIO_PORT PORTA
#define BOARD_LED_YELLOW_GPIO_PIN 28U
#define BOARD_LED_GREEN_GPIO GPIOA
#define BOARD_LED_GREEN_GPIO_PORT PORTA
#define BOARD_LED_GREEN_GPIO_PIN 29U
#define BOARD_LED_BLUE_GPIO GPIOA
#define BOARD_LED_BLUE_GPIO_PORT PORTA
#define BOARD_LED_BLUE_GPIO_PIN 10U
#define LED_ORANGE_INIT(output) \
GPIO_WritePinOutput(BOARD_LED_ORANGE_GPIO, BOARD_LED_ORANGE_GPIO_PIN, output);\
BOARD_LED_ORANGE_GPIO->PDDR |= (1U << BOARD_LED_ORANGE_GPIO_PIN) /*!< Enable target LED_ORANGE */
#define LED_ORANGE_ON() \
GPIO_ClearPinsOutput(BOARD_LED_ORANGE_GPIO, 1U << BOARD_LED_ORANGE_GPIO_PIN) /*!< Turn on target LED_ORANGE */
#define LED_ORANGE_OFF() \
GPIO_SetPinsOutput(BOARD_LED_ORANGE_GPIO, 1U << BOARD_LED_ORANGE_GPIO_PIN) /*!< Turn off target LED_ORANGE */
#define LED_ORANGE_TOGGLE() \
GPIO_TogglePinsOutput(BOARD_LED_ORANGE_GPIO, 1U << BOARD_LED_ORANGE_GPIO_PIN) /*!< Toggle on target LED_ORANGE */
#define LED_YELLOW_INIT(output) \
GPIO_WritePinOutput(BOARD_LED_YELLOW_GPIO, BOARD_LED_YELLOW_GPIO_PIN, output);\
BOARD_LED_YELLOW_GPIO->PDDR |= (1U << BOARD_LED_YELLOW_GPIO_PIN) /*!< Enable target LED_YELLOW */
#define LED_YELLOW_ON() \
GPIO_ClearPinsOutput(BOARD_LED_YELLOW_GPIO, 1U << BOARD_LED_YELLOW_GPIO_PIN) /*!< Turn on target LED_YELLOW */
#define LED_YELLOW_OFF() \
GPIO_SetPinsOutput(BOARD_LED_YELLOW_GPIO, 1U << BOARD_LED_YELLOW_GPIO_PIN) /*!< Turn off target LED_YELLOW */
#define LED_YELLOW_TOGGLE() \
GPIO_TogglePinsOutput(BOARD_LED_YELLOW_GPIO, 1U << BOARD_LED_YELLOW_GPIO_PIN) /*!< Toggle on target LED_YELLOW */
#define LED_GREEN_INIT(output) \
GPIO_WritePinOutput(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PIN, output);\
BOARD_LED_GREEN_GPIO->PDDR |= (1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Enable target LED_GREEN */
#define LED_GREEN_ON() \
GPIO_ClearPinsOutput(BOARD_LED_GREEN_GPIO, 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn on target LED_GREEN */
#define LED_GREEN_OFF() \
GPIO_SetPinsOutput(BOARD_LED_GREEN_GPIO, 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn off target LED_GREEN */
#define LED_GREEN_TOGGLE() \
GPIO_TogglePinsOutput(BOARD_LED_GREEN_GPIO, 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Toggle on target LED_GREEN */
#define LED_BLUE_INIT(output) \
GPIO_WritePinOutput(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PIN, output);\
BOARD_LED_BLUE_GPIO->PDDR |= (1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Enable target LED_BLUE */
#define LED_BLUE_ON() \
GPIO_ClearPinsOutput(BOARD_LED_BLUE_GPIO, 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn on target LED_BLUE */
#define LED_BLUE_OFF() \
GPIO_SetPinsOutput(BOARD_LED_BLUE_GPIO, 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn off target LED_BLUE */
#define LED_BLUE_TOGGLE() \
GPIO_TogglePinsOutput(BOARD_LED_BLUE_GPIO, 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Toggle on target LED_BLUE */
/* SDHC base address, clock and card detection pin */
#define BOARD_SDHC_BASEADDR SDHC
#define BOARD_SDHC_CLKSRC kCLOCK_CoreSysClk
#define BOARD_SDHC_CLK_FREQ CLOCK_GetFreq(kCLOCK_CoreSysClk)
#define BOARD_SDHC_IRQ SDHC_IRQn
#define BOARD_SDHC_CD_GPIO_BASE GPIOE
#define BOARD_SDHC_CD_GPIO_PIN 28U
#define BOARD_SDHC_CD_PORT_BASE PORTE
#define BOARD_SDHC_CD_PORT_IRQ PORTE_IRQn
#define BOARD_SDHC_CD_PORT_IRQ_HANDLER PORTE_IRQHandler
#define BOARD_ACCEL_I2C_BASEADDR I2C0
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus */
/*******************************************************************************
* API
******************************************************************************/
void BOARD_InitDebugConsole(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus */
#endif /* _BOARD_H_ */

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/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
/*
* How to setup clock using clock driver functions:
*
* 1. CLOCK_SetSimSafeDivs, to make sure core clock, bus clock, flexbus clock
* and flash clock are in allowed range during clock mode switch.
*
* 2. Call CLOCK_Osc0Init to setup OSC clock, if it is used in target mode.
*
* 3. Set MCG configuration, MCG includes three parts: FLL clock, PLL clock and
* internal reference clock(MCGIRCLK). Follow the steps to setup:
*
* 1). Call CLOCK_BootToXxxMode to set MCG to target mode.
*
* 2). If target mode is FBI/BLPI/PBI mode, the MCGIRCLK has been configured
* correctly. For other modes, need to call CLOCK_SetInternalRefClkConfig
* explicitly to setup MCGIRCLK.
*
* 3). Don't need to configure FLL explicitly, because if target mode is FLL
* mode, then FLL has been configured by the function CLOCK_BootToXxxMode,
* if the target mode is not FLL mode, the FLL is disabled.
*
* 4). If target mode is PEE/PBE/PEI/PBI mode, then the related PLL has been
* setup by CLOCK_BootToXxxMode. In FBE/FBI/FEE/FBE mode, the PLL could
* be enabled independently, call CLOCK_EnablePll0 explicitly in this case.
*
* 4. Call CLOCK_SetSimConfig to set the clock configuration in SIM.
*/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Clocks v9.0
processor: MK60DN512xxx10
package_id: MK60DN512VLQ10
mcu_data: ksdk2_0
processor_version: 11.0.1
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
#include "fsl_rtc.h"
#include "clock_config.h"
/*******************************************************************************
* Definitions
******************************************************************************/
#define MCG_IRCLK_DISABLE 0U /*!< MCGIRCLK disabled */
#define MCG_PLL_DISABLE 0U /*!< MCGPLLCLK disabled */
#define OSC_ER_CLK_DISABLE 0U /*!< Disable external reference clock */
#define RTC_OSC_CAP_LOAD_12PF 0x1800U /*!< RTC oscillator capacity load: 12pF */
#define RTC_RTC32KCLK_PERIPHERALS_ENABLED 1U /*!< RTC32KCLK to other peripherals: enabled */
#define SIM_OSC32KSEL_OSC32KCLK_CLK 0U /*!< OSC32KSEL select: OSC32KCLK clock */
#define SIM_PLLFLLSEL_MCGFLLCLK_CLK 0U /*!< PLLFLL select: MCGFLLCLK clock */
/*******************************************************************************
* Variables
******************************************************************************/
/* System clock frequency. */
extern uint32_t SystemCoreClock;
/*******************************************************************************
* Code
******************************************************************************/
/*FUNCTION**********************************************************************
*
* Function Name : CLOCK_CONFIG_FllStableDelay
* Description : This function is used to delay for FLL stable.
*
*END**************************************************************************/
static void CLOCK_CONFIG_FllStableDelay(void)
{
uint32_t i = 30000U;
while (i--)
{
__NOP();
}
}
/*FUNCTION**********************************************************************
*
* Function Name : CLOCK_CONFIG_SetRtcClock
* Description : This function is used to configuring RTC clock including
* enabling RTC oscillator.
* Param capLoad : RTC oscillator capacity load
* Param enableOutPeriph : Enable (1U)/Disable (0U) clock to peripherals
*
*END**************************************************************************/
static void CLOCK_CONFIG_SetRtcClock(uint32_t capLoad, uint8_t enableOutPeriph)
{
/* RTC clock gate enable */
CLOCK_EnableClock(kCLOCK_Rtc0);
if ((RTC->CR & RTC_CR_OSCE_MASK) == 0u) { /* Only if the Rtc oscillator is not already enabled */
/* Set the specified capacitor configuration for the RTC oscillator */
RTC_SetOscCapLoad(RTC, capLoad);
/* Enable the RTC 32KHz oscillator */
RTC->CR |= RTC_CR_OSCE_MASK;
}
/* Output to other peripherals */
if (enableOutPeriph) {
RTC->CR &= ~RTC_CR_CLKO_MASK;
}
else {
RTC->CR |= RTC_CR_CLKO_MASK;
}
/* Set the XTAL32/RTC_CLKIN frequency based on board setting. */
CLOCK_SetXtal32Freq(BOARD_XTAL32K_CLK_HZ);
/* Set RTC_TSR if there is fault value in RTC */
if (RTC->SR & RTC_SR_TIF_MASK) {
RTC -> TSR = RTC -> TSR;
}
/* RTC clock gate disable */
CLOCK_DisableClock(kCLOCK_Rtc0);
}
/*******************************************************************************
************************ BOARD_InitBootClocks function ************************
******************************************************************************/
void BOARD_InitBootClocks(void)
{
BOARD_BootClockRUN();
}
/*******************************************************************************
********************** Configuration BOARD_BootClockRUN ***********************
******************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockRUN
called_from_default_init: true
outputs:
- {id: Bus_clock.outFreq, value: 50 MHz}
- {id: Core_clock.outFreq, value: 50 MHz}
- {id: Flash_clock.outFreq, value: 25 MHz}
- {id: FlexBus_clock.outFreq, value: 50 MHz}
- {id: LPO_clock.outFreq, value: 1 kHz}
- {id: MCGFFCLK.outFreq, value: 39.0625 kHz}
- {id: PLLFLLCLK.outFreq, value: 25 MHz}
- {id: System_clock.outFreq, value: 50 MHz}
settings:
- {id: MCGMode, value: FBE}
- {id: MCG.CLKS.sel, value: MCG.OSCSEL}
- {id: MCG.FRDIV.scale, value: '1280'}
- {id: MCG.IREFS.sel, value: MCG.FRDIV}
- {id: MCG.PRDIV.scale, value: '13'}
- {id: MCG_C2_RANGE0_CFG, value: Very_high}
- {id: MCG_C2_RANGE0_FRDIV_CFG, value: Very_high}
- {id: OSC_CR_SYS_OSC_CAP_LOAD_CFG, value: SC18PF}
- {id: RTC_CR_OSCE_CFG, value: Enabled}
- {id: RTC_CR_OSC_CAP_LOAD_CFG, value: SC12PF}
sources:
- {id: OSC.OSC.outFreq, value: 50 MHz, enabled: true}
- {id: RTC.RTC32kHz.outFreq, value: 32.768 kHz, enabled: true}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
/*******************************************************************************
* Variables for BOARD_BootClockRUN configuration
******************************************************************************/
const mcg_config_t mcgConfig_BOARD_BootClockRUN =
{
.mcgMode = kMCG_ModeFBE, /* FBE - FLL Bypassed External */
.irclkEnableMode = MCG_IRCLK_DISABLE, /* MCGIRCLK disabled */
.ircs = kMCG_IrcSlow, /* Slow internal reference clock selected */
.fcrdiv = 0x1U, /* Fast IRC divider: divided by 2 */
.frdiv = 0x6U, /* FLL reference clock divider: divided by 1280 */
.drs = kMCG_DrsLow, /* Low frequency range */
.dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
.oscsel = kMCG_OscselOsc, /* Selects System Oscillator (OSCCLK) */
.pll0Config =
{
.enableMode = MCG_PLL_DISABLE, /* MCGPLLCLK disabled */
.prdiv = 0xcU, /* PLL Reference divider: divided by 13 */
.vdiv = 0x0U, /* VCO divider: multiplied by 24 */
},
};
const sim_clock_config_t simConfig_BOARD_BootClockRUN =
{
.pllFllSel = SIM_PLLFLLSEL_MCGFLLCLK_CLK, /* PLLFLL select: MCGFLLCLK clock */
.er32kSrc = SIM_OSC32KSEL_OSC32KCLK_CLK, /* OSC32KSEL select: OSC32KCLK clock */
.clkdiv1 = 0x10000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV2: /1, OUTDIV3: /1, OUTDIV4: /2 */
};
const osc_config_t oscConfig_BOARD_BootClockRUN =
{
.freq = 50000000U, /* Oscillator frequency: 50000000Hz */
.capLoad = (kOSC_Cap2P | kOSC_Cap16P), /* Oscillator capacity load: 18pF */
.workMode = kOSC_ModeExt, /* Use external clock */
.oscerConfig =
{
.enableMode = OSC_ER_CLK_DISABLE, /* Disable external reference clock */
}
};
/*******************************************************************************
* Code for BOARD_BootClockRUN configuration
******************************************************************************/
void BOARD_BootClockRUN(void)
{
/* Set the system clock dividers in SIM to safe value. */
CLOCK_SetSimSafeDivs();
/* Configure RTC clock including enabling RTC oscillator. */
CLOCK_CONFIG_SetRtcClock(RTC_OSC_CAP_LOAD_12PF, RTC_RTC32KCLK_PERIPHERALS_ENABLED);
/* Initializes OSC0 according to board configuration. */
CLOCK_InitOsc0(&oscConfig_BOARD_BootClockRUN);
CLOCK_SetXtal0Freq(oscConfig_BOARD_BootClockRUN.freq);
/* Set MCG to FBE mode. */
CLOCK_SetExternalRefClkConfig(mcgConfig_BOARD_BootClockRUN.oscsel);
CLOCK_SetFbeMode(mcgConfig_BOARD_BootClockRUN.frdiv,
mcgConfig_BOARD_BootClockRUN.dmx32,
mcgConfig_BOARD_BootClockRUN.drs,
CLOCK_CONFIG_FllStableDelay);
/* Set the clock configuration in SIM module. */
CLOCK_SetSimConfig(&simConfig_BOARD_BootClockRUN);
/* Set SystemCoreClock variable. */
SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
}

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/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
#ifndef _CLOCK_CONFIG_H_
#define _CLOCK_CONFIG_H_
#include "fsl_common.h"
/*******************************************************************************
* Definitions
******************************************************************************/
#define BOARD_XTAL0_CLK_HZ 50000000U /*!< Board xtal0 frequency in Hz */
#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board RTC xtal frequency in Hz */
/*******************************************************************************
************************ BOARD_InitBootClocks function ************************
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes default configuration of clocks.
*
*/
void BOARD_InitBootClocks(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
********************** Configuration BOARD_BootClockRUN ***********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockRUN configuration
******************************************************************************/
#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 50000000U /*!< Core clock frequency: 50000000Hz */
/*! @brief MCG set for BOARD_BootClockRUN configuration.
*/
extern const mcg_config_t mcgConfig_BOARD_BootClockRUN;
/*! @brief SIM module set for BOARD_BootClockRUN configuration.
*/
extern const sim_clock_config_t simConfig_BOARD_BootClockRUN;
/*! @brief OSC set for BOARD_BootClockRUN configuration.
*/
extern const osc_config_t oscConfig_BOARD_BootClockRUN;
/*******************************************************************************
* API for BOARD_BootClockRUN configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockRUN(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
#endif /* _CLOCK_CONFIG_H_ */

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/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Peripherals v11.0
processor: MK60DN512xxx10
package_id: MK60DN512VLQ10
mcu_data: ksdk2_0
processor_version: 11.0.1
functionalGroups:
- name: BOARD_InitPeripherals
UUID: ac647ac1-e799-4dfc-9b77-81b2d47bf6c6
called_from_default_init: true
selectedCore: core0
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
component:
- type: 'system'
- type_id: 'system_54b53072540eeeb8f8e9343e71f28176'
- global_system_definitions:
- user_definitions: ''
- user_includes: ''
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
component:
- type: 'gpio_adapter_common'
- type_id: 'gpio_adapter_common_57579b9ac814fe26bf95df0a384c36b6'
- global_gpio_adapter_common:
- quick_selection: 'default'
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
component:
- type: 'uart_cmsis_common'
- type_id: 'uart_cmsis_common_9cb8e302497aa696fdbb5a4fd622c2a8'
- global_USART_CMSIS_common:
- quick_selection: 'default'
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
/***********************************************************************************************************************
* Included files
**********************************************************************************************************************/
#include "peripherals.h"
/***********************************************************************************************************************
* BOARD_InitPeripherals functional group
**********************************************************************************************************************/
/***********************************************************************************************************************
* NVIC initialization code
**********************************************************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
instance:
- name: 'NVIC'
- type: 'nvic'
- mode: 'general'
- custom_name_enabled: 'false'
- type_id: 'nvic_57b5eef3774cc60acaede6f5b8bddc67'
- functional_group: 'BOARD_InitPeripherals'
- peripheral: 'NVIC'
- config_sets:
- nvic:
- interrupt_table: []
- interrupts: []
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
/* Empty initialization function (commented out)
static void NVIC_init(void) {
} */
/***********************************************************************************************************************
* Initialization functions
**********************************************************************************************************************/
void BOARD_InitPeripherals(void)
{
/* Initialize components */
}
/***********************************************************************************************************************
* BOARD_InitBootPeripherals function
**********************************************************************************************************************/
void BOARD_InitBootPeripherals(void)
{
BOARD_InitPeripherals();
}

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/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
#ifndef _PERIPHERALS_H_
#define _PERIPHERALS_H_
/***********************************************************************************************************************
* Included files
**********************************************************************************************************************/
#include "fsl_common.h"
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus */
/***********************************************************************************************************************
* Initialization functions
**********************************************************************************************************************/
void BOARD_InitPeripherals(void);
/***********************************************************************************************************************
* BOARD_InitBootPeripherals function
**********************************************************************************************************************/
void BOARD_InitBootPeripherals(void);
#if defined(__cplusplus)
}
#endif
#endif /* _PERIPHERALS_H_ */

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/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Pins v11.0
processor: MK60DN512xxx10
package_id: MK60DN512VLQ10
mcu_data: ksdk2_0
processor_version: 11.0.1
pin_labels:
- {pin_num: '58', pin_signal: PTA6/FTM0_CH3/TRACE_CLKOUT, label: BUZZER, identifier: BUZZER}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
#include "fsl_common.h"
#include "fsl_port.h"
#include "fsl_gpio.h"
#include "pin_mux.h"
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitBootPins
* Description : Calls initialization functions.
*
* END ****************************************************************************************************************/
void BOARD_InitBootPins(void)
{
BOARD_InitPins();
}
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitPins:
- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
- pin_list:
- {pin_num: '136', peripheral: UART0, signal: TX, pin_signal: PTD7/CMT_IRO/UART0_TX/FTM0_CH7/FTM0_FLT1}
- {pin_num: '133', peripheral: UART0, signal: RX, pin_signal: ADC0_SE7b/PTD6/LLWU_P15/SPI0_PCS3/UART0_RX/FTM0_CH6/FB_AD0/FTM0_FLT0}
- {pin_num: '58', peripheral: GPIOA, signal: 'GPIO, 6', pin_signal: PTA6/FTM0_CH3/TRACE_CLKOUT, direction: OUTPUT}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
void BOARD_InitPins(void)
{
/* Port A Clock Gate Control: Clock enabled */
CLOCK_EnableClock(kCLOCK_PortA);
/* Port D Clock Gate Control: Clock enabled */
CLOCK_EnableClock(kCLOCK_PortD);
gpio_pin_config_t BUZZER_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PTA6 (pin 58) */
GPIO_PinInit(BOARD_INITPINS_BUZZER_GPIO, BOARD_INITPINS_BUZZER_PIN, &BUZZER_config);
/* PORTA6 (pin 58) is configured as PTA6 */
PORT_SetPinMux(BOARD_INITPINS_BUZZER_PORT, BOARD_INITPINS_BUZZER_PIN, kPORT_MuxAsGpio);
/* PORTD6 (pin 133) is configured as UART0_RX */
PORT_SetPinMux(PORTD, 6U, kPORT_MuxAlt3);
/* PORTD7 (pin 136) is configured as UART0_TX */
PORT_SetPinMux(PORTD, 7U, kPORT_MuxAlt3);
SIM->SOPT5 = ((SIM->SOPT5 &
/* Mask bits to zero which are setting */
(~(SIM_SOPT5_UART0TXSRC_MASK | SIM_SOPT5_UART0RXSRC_MASK)))
/* UART 0 transmit data source select: UART0_TX pin. */
| SIM_SOPT5_UART0TXSRC(SOPT5_UART0TXSRC_UART_TX)
/* UART 0 receive data source select: UART0_RX pin. */
| SIM_SOPT5_UART0RXSRC(SOPT5_UART0RXSRC_UART_RX));
}
/***********************************************************************************************************************
* EOF
**********************************************************************************************************************/

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/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
#ifndef _PIN_MUX_H_
#define _PIN_MUX_H_
/*!
* @addtogroup pin_mux
* @{
*/
/***********************************************************************************************************************
* API
**********************************************************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif
/*!
* @brief Calls initialization functions.
*
*/
void BOARD_InitBootPins(void);
#define SOPT5_UART0RXSRC_UART_RX 0x00u /*!<@brief UART 0 receive data source select: UART0_RX pin */
#define SOPT5_UART0TXSRC_UART_TX 0x00u /*!<@brief UART 0 transmit data source select: UART0_TX pin */
/*! @name PORTA6 (number 58), BUZZER
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITPINS_BUZZER_GPIO GPIOA /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITPINS_BUZZER_GPIO_PIN_MASK (1U << 6U) /*!<@brief GPIO pin mask */
/* Symbols to be used with PORT driver */
#define BOARD_INITPINS_BUZZER_PORT PORTA /*!<@brief PORT peripheral base pointer */
#define BOARD_INITPINS_BUZZER_PIN 6U /*!<@brief PORT pin number */
#define BOARD_INITPINS_BUZZER_PIN_MASK (1U << 6U) /*!<@brief PORT pin mask */
/* @} */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitPins(void);
#if defined(__cplusplus)
}
#endif
/*!
* @}
*/
#endif /* _PIN_MUX_H_ */
/***********************************************************************************************************************
* EOF
**********************************************************************************************************************/

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#include "board.h"
#include "clock_config.h"
#include "peripherals.h"
#include "pin_mux.h"
#include "fsl_debug_console.h"
void print_hardware(void);
int main(void) {
BOARD_InitBootPins();
BOARD_BootClockRUN();
BOARD_InitBootPeripherals();
BOARD_InitDebugConsole();
print_hardware();
for (;;) {
__WFI();
}
}

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#include "board.h"
#include "clock_config.h"
#include "peripherals.h"
#include "pin_mux.h"
#include "fsl_debug_console.h"
void print_hardware(void) {
uint32_t kinetis_revid = (SIM->SDID & SIM_SDID_REVID_MASK) >> SIM_SDID_REVID_SHIFT;
uint32_t kinetis_family = (SIM->SDID & SIM_SDID_FAMID_MASK) >> SIM_SDID_FAMID_SHIFT;
uint32_t kinetis_pinid = (SIM->SDID & SIM_SDID_PINID_MASK) >> SIM_SDID_PINID_SHIFT;
char *family_str = NULL;
switch(kinetis_family) {
case 0:
family_str = "K10";
break;
case 1:
family_str = "K20";
break;
case 2:
family_str = "K30";
break;
case 3:
family_str = "K40";
break;
case 4:
family_str = "K60";
break;
case 6:
family_str = "K50/K52";
break;
case 7:
family_str = "K51/K53";
break;
default:
family_str = "UNKNOWN";
break;
}
char *pin_str = NULL;
switch(kinetis_pinid) {
case 0x06:
pin_str = "80";
break;
case 0x07:
pin_str = "81";
break;
case 0x08:
pin_str = "100";
break;
case 0x09:
pin_str = "121";
break;
case 0x0A:
pin_str = "144";
break;
default:
pin_str = "UNKNOWN";
break;
}
char *rev_str = NULL;
switch(kinetis_revid) {
case 0:
rev_str = "1.0 (0M33Z)";
break;
case 1:
rev_str = "1.1 (0N30D)";
break;
case 2:
rev_str = "1.2 (1N30D/2N30D)";
break;
case 3:
rev_str = "1.4 (4N30D)";
break;
case 7:
rev_str = "1.8 (8N30D)";
break;
case 10:
rev_str = "2.2 (2N22D)";
break;
case 12:
rev_str = "2.4 (4N22D)";
break;
case 13:
rev_str = "2.5 (5N22D)";
break;
default:
rev_str = "UNKNOWN";
break;
}
PRINTF("This is %s with Rev. (Mask Set): %s, %s pins.\r\n", family_str, rev_str, pin_str);
}