Embedded_Projects
/
Landzo_K60Z_LwIP
generated from Embedded_Projects/Landzo_K60Z_Hello
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

Move LwIP buffers to external SRAM, added NTP.

master
imi415 2022-05-22 23:52:47 +08:00
parent 48dd430ad2
commit b5c58fd831
Signed by: imi415
GPG Key ID: 885EC2B5A8A6F8A7
16 changed files with 458 additions and 100 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
CMakeLists.txt
View File

@ -6,8 +6,9 @@ enable_language(CXX)
enable_language(ASM)
# Different linker scripts
set(TARGET_LDSCRIPT_FLASH "${CMAKE_SOURCE_DIR}/SDK/devices/MK60D10/gcc/MK60DN512xxx10_flash.ld")
set(TARGET_LDSCRIPT_RAM "${CMAKE_SOURCE_DIR}/SDK/devices/MK60D10/gcc/MK60DN512xxx10_ram.ld")
set(TARGET_LDSCRIPT_FLASH "${CMAKE_SOURCE_DIR}/SDK/devices/MK60D10/gcc/MK60DN512xxx10_flash.ld")
set(TARGET_LDSCRIPT_FLASH_FB "${CMAKE_SOURCE_DIR}/MK60DN512xxx10_flash_sram.ld")
set(TARGET_LDSCRIPT_RAM "${CMAKE_SOURCE_DIR}/SDK/devices/MK60D10/gcc/MK60DN512xxx10_ram.ld")
set(TARGET_SOURCES
"SDK/devices/MK60D10/drivers/fsl_adc16.c"
@ -64,7 +65,9 @@ set(TARGET_SOURCES
"src/ethernetif.c"
"src/freertos_helpers.c"
"src/fsl_phy.c"
"src/ip_stack_helpers.c"
"src/main.c"
"src/syscalls.c"
"src/system_utilities.c"
)
@ -141,6 +144,19 @@ add_custom_command(OUTPUT "${CMAKE_PROJECT_NAME}_FLASH.hex"
)
add_custom_target("${CMAKE_PROJECT_NAME}_FLASH_HEX" DEPENDS "${CMAKE_PROJECT_NAME}_FLASH.hex")
# Create ELF
add_executable("${CMAKE_PROJECT_NAME}_FLASH_FB.elf" ${TARGET_SOURCES})
target_link_options("${CMAKE_PROJECT_NAME}_FLASH_FB.elf"
PRIVATE "-T${TARGET_LDSCRIPT_FLASH_FB}"
PRIVATE "-Wl,-Map=${CMAKE_PROJECT_NAME}_FLASH_FB.map"
)
add_custom_command(OUTPUT "${CMAKE_PROJECT_NAME}_FLASH_FB.hex"
COMMAND ${CMAKE_OBJCOPY} "-O" "ihex" "${CMAKE_PROJECT_NAME}_FLASH_FB.elf" "${CMAKE_PROJECT_NAME}_FLASH_FB.hex"
DEPENDS "${CMAKE_PROJECT_NAME}_FLASH_FB.elf"
)
add_custom_target("${CMAKE_PROJECT_NAME}_FLASH_FB_HEX" DEPENDS "${CMAKE_PROJECT_NAME}_FLASH_FB.hex")
# Create ELF
add_executable("${CMAKE_PROJECT_NAME}_RAM.elf" ${TARGET_SOURCES})
target_link_options("${CMAKE_PROJECT_NAME}_RAM.elf"

1
MK60DN512xxx10.mex
View File

@ -210,7 +210,6 @@
<setting id="MCG_C2_RANGE0_CFG" value="Very_high" locked="false"/>
<setting id="MCG_C2_RANGE0_FRDIV_CFG" value="Very_high" locked="false"/>
<setting id="OSC_CR_ERCLKEN_CFG" value="Enabled" locked="false"/>
<setting id="OSC_CR_SYS_OSC_CAP_LOAD_CFG" value="SC18PF" locked="false"/>
<setting id="RMIISrcConfig" value="yes" locked="false"/>
<setting id="RTC_CR_OSCE_CFG" value="Enabled" locked="false"/>
<setting id="RTC_CR_OSC_CAP_LOAD_CFG" value="SC12PF" locked="false"/>

263
MK60DN512xxx10_flash_sram.ld Normal file
View File

@ -0,0 +1,263 @@
/*
** ###################################################################
** Processors: MK60DN512VLL10
** MK60DN512VLQ10
** MK60DN512VMC10
** MK60DN512VMD10
**
** Compiler: GNU C Compiler
** Reference manual: K60P144M100SF2V2RM Rev. 2, Jun 2012
** Version: rev. 1.7, 2015-07-29
** Build: b170214
**
** Abstract:
** Linker file for the GNU C Compiler
**
** Copyright 2016 Freescale Semiconductor, Inc.
** Copyright 2016-2017 NXP
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of the copyright holder nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.nxp.com
** mail: support@nxp.com
**
** ###################################################################
*/
/* Entry Point */
ENTRY(Reset_Handler)
HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400;
STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x0400 : 0x0;
/* Specify the memory areas */
MEMORY
{
m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x00000400
m_flash_config (RX) : ORIGIN = 0x00000400, LENGTH = 0x00000010
m_text (RX) : ORIGIN = 0x00000410, LENGTH = 0x0007FBF0
m_data (RW) : ORIGIN = 0x1FFF0000, LENGTH = 0x00010000
m_data_2 (RW) : ORIGIN = 0x20000000, LENGTH = 0x00010000
m_fb_sram (RW) : ORIGIN = 0x60000000, LENGTH = 0x00080000
}
/* Define output sections */
SECTIONS
{
/* The startup code goes first into internal flash */
.interrupts :
{
__VECTOR_TABLE = .;
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
} > m_interrupts
.flash_config :
{
. = ALIGN(4);
KEEP(*(.FlashConfig)) /* Flash Configuration Field (FCF) */
. = ALIGN(4);
} > m_flash_config
/* The program code and other data goes into internal flash */
.text :
{
. = ALIGN(4);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
*(.glue_7) /* glue arm to thumb code */
*(.glue_7t) /* glue thumb to arm code */
*(.eh_frame)
KEEP (*(.init))
KEEP (*(.fini))
. = ALIGN(4);
} > m_text
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > m_text
.ARM :
{
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
} > m_text
.ctors :
{
__CTOR_LIST__ = .;
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
KEEP (*crtbegin.o(.ctors))
KEEP (*crtbegin?.o(.ctors))
/* We don't want to include the .ctor section from
from the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
__CTOR_END__ = .;
} > m_text
.dtors :
{
__DTOR_LIST__ = .;
KEEP (*crtbegin.o(.dtors))
KEEP (*crtbegin?.o(.dtors))
KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
__DTOR_END__ = .;
} > m_text
.preinit_array :
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
} > m_text
.init_array :
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
} > m_text
.fini_array :
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT(.fini_array.*)))
KEEP (*(.fini_array*))
PROVIDE_HIDDEN (__fini_array_end = .);
} > m_text
__etext = .; /* define a global symbol at end of code */
__DATA_ROM = .; /* Symbol is used by startup for data initialization */
.interrupts_ram :
{
. = ALIGN(4);
__VECTOR_RAM__ = .;
__interrupts_ram_start__ = .; /* Create a global symbol at data start */
*(.m_interrupts_ram) /* This is a user defined section */
. += M_VECTOR_RAM_SIZE;
. = ALIGN(4);
__interrupts_ram_end__ = .; /* Define a global symbol at data end */
} > m_data
__VECTOR_RAM = DEFINED(__ram_vector_table__) ? __VECTOR_RAM__ : ORIGIN(m_interrupts);
__RAM_VECTOR_TABLE_SIZE_BYTES = DEFINED(__ram_vector_table__) ? (__interrupts_ram_end__ - __interrupts_ram_start__) : 0x0;
.data : AT(__DATA_ROM)
{
. = ALIGN(4);
__DATA_RAM = .;
__data_start__ = .; /* create a global symbol at data start */
*(.data) /* .data sections */
*(.data*) /* .data* sections */
KEEP(*(.jcr*))
. = ALIGN(4);
__data_end__ = .; /* define a global symbol at data end */
} > m_data
__DATA_END = __DATA_ROM + (__data_end__ - __data_start__);
text_end = ORIGIN(m_text) + LENGTH(m_text);
ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
/* Uninitialized data section */
.bss :
{
/* This is used by the startup in order to initialize the .bss section */
. = ALIGN(4);
__START_BSS = .;
__bss_start__ = .;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
__bss_end__ = .;
__END_BSS = .;
} > m_data
.data_2 :
{
. = ALIGN(8);
*(.freertos_heap)
*(.freertos_heap*)
. = ALIGN(8);
} > m_data_2
.heap :
{
. = ALIGN(8);
__end__ = .;
PROVIDE(end = .);
__HeapBase = .;
. += HEAP_SIZE;
__HeapLimit = .;
__heap_limit = .; /* Add for _sbrk */
} > m_data_2
.stack :
{
. = ALIGN(8);
. += STACK_SIZE;
} > m_data_2
/* Initializes stack on the end of block */
__StackTop = ORIGIN(m_data_2) + LENGTH(m_data_2);
__StackLimit = __StackTop - STACK_SIZE;
PROVIDE(__stack = __StackTop);
.ARM.attributes 0 : { *(.ARM.attributes) }
ASSERT(__StackLimit >= __HeapLimit, "region m_data_2 overflowed with stack and heap")
.extmem (NOLOAD) :
{
. = ALIGN(8);
*(.lwip_pool)
*(.lwip_pool*)
. = ALIGN(8);
} > m_fb_sram
}

12
board/board.c
View File

@ -30,6 +30,7 @@
#include <stdint.h>
#include "fsl_common.h"
#include "fsl_rtc.h"
#include "fsl_debug_console.h"
#include "board.h"
@ -47,3 +48,14 @@ void BOARD_InitDebugConsole(void)
DbgConsole_Init(BOARD_DEBUG_UART_BASEADDR, BOARD_DEBUG_UART_BAUDRATE, BOARD_DEBUG_UART_TYPE, uartClkSrcFreq);
}
void BOARD_EnableRTC(void) {
rtc_config_t rtc_config;
RTC_GetDefaultConfig(&rtc_config);
RTC_Init(RTC, &rtc_config);
RTC->SR |= RTC_SR_TCE_MASK;
}

2
board/board.h
View File

@ -184,6 +184,8 @@ extern "C" {
void BOARD_InitDebugConsole(void);
void BOARD_EnableRTC(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus */

4
board/clock_config.c
View File

@ -49,6 +49,7 @@ processor_version: 11.0.1
******************************************************************************/
#define MCG_IRCLK_DISABLE 0U /*!< MCGIRCLK disabled */
#define MCG_PLL_DISABLE 0U /*!< MCGPLLCLK disabled */
#define OSC_CAP0P 0U /*!< Oscillator 0pF capacitor load */
#define RTC_OSC_CAP_LOAD_12PF 0x1800U /*!< RTC oscillator capacity load: 12pF */
#define RTC_RTC32KCLK_PERIPHERALS_ENABLED 1U /*!< RTC32KCLK to other peripherals: enabled */
#define SIM_ENET_RMII_CLK_SEL_EXTAL_CLK 0U /*!< SDHC clock select: Core/system clock */
@ -148,7 +149,6 @@ settings:
- {id: MCG_C2_RANGE0_CFG, value: Very_high}
- {id: MCG_C2_RANGE0_FRDIV_CFG, value: Very_high}
- {id: OSC_CR_ERCLKEN_CFG, value: Enabled}
- {id: OSC_CR_SYS_OSC_CAP_LOAD_CFG, value: SC18PF}
- {id: RMIISrcConfig, value: 'yes'}
- {id: RTC_CR_OSCE_CFG, value: Enabled}
- {id: RTC_CR_OSC_CAP_LOAD_CFG, value: SC12PF}
@ -190,7 +190,7 @@ const sim_clock_config_t simConfig_BOARD_BootClockRUN =
const osc_config_t oscConfig_BOARD_BootClockRUN =
{
.freq = 50000000U, /* Oscillator frequency: 50000000Hz */
.capLoad = (kOSC_Cap2P | kOSC_Cap16P), /* Oscillator capacity load: 18pF */
.capLoad = (OSC_CAP0P), /* Oscillator capacity load: 0pF */
.workMode = kOSC_ModeExt, /* Use external clock */
.oscerConfig =
{

6
include/ip_stack_helpers.h Normal file
View File

@ -0,0 +1,6 @@
#ifndef IP_STACK_HELPERS_H
#define IP_STACK_HELPERS_H
void ip_stack_setup(void);
#endif

2
lib/FreeRTOS

@ -1 +1 @@
Subproject commit 1ec8e49de4c5de50ffe71554e7e600257dec1f4b
Subproject commit ef604447adba12fc9e37e31c2980f4023f06e50d

5
lib/LwIP/port/include/arch/cc.h
View File

@ -40,4 +40,9 @@ extern unsigned int lwip_platform_rand(void);
#define LWIP_TIMEVAL_PRIVATE 0
#define LWIP_DECLARE_MEMORY_ALIGNED(variable_name, size) u8_t __attribute__((section(".lwip_pool"))) variable_name[LWIP_MEM_ALIGN_BUFFER(size)]
int set_rtc_time(int sec);
#define SNTP_SET_SYSTEM_TIME set_rtc_time
#endif /* LWIP_ARCH_CC_H */

12
lib/LwIP/port/include/lwipopts.h
View File

@ -86,10 +86,10 @@
#define PBUF_DEBUG LWIP_DBG_OFF
#define API_LIB_DEBUG LWIP_DBG_OFF
#define API_MSG_DEBUG LWIP_DBG_OFF
#define TCPIP_DEBUG LWIP_DBG_ON
#define NETIF_DEBUG LWIP_DBG_ON
#define TCPIP_DEBUG LWIP_DBG_OFF
#define NETIF_DEBUG LWIP_DBG_OFF
#define SOCKETS_DEBUG LWIP_DBG_OFF
#define DNS_DEBUG LWIP_DBG_OFF
#define DNS_DEBUG LWIP_DBG_ON
#define AUTOIP_DEBUG LWIP_DBG_OFF
#define DHCP_DEBUG LWIP_DBG_ON
#define IP_DEBUG LWIP_DBG_OFF
@ -121,7 +121,7 @@
/* MEM_SIZE: the size of the heap memory. If the application will send
a lot of data that needs to be copied, this should be set high. */
#define MEM_SIZE 10240
#define MEM_SIZE 20480
/* MEMP_NUM_PBUF: the number of memp struct pbufs. If the application
sends a lot of data out of ROM (or other static memory), this
@ -161,7 +161,7 @@ a lot of data that needs to be copied, this should be set high. */
/* ---------- Pbuf options ---------- */
/* PBUF_POOL_SIZE: the number of buffers in the pbuf pool. */
#define PBUF_POOL_SIZE 72
#define PBUF_POOL_SIZE 128
/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */
#define PBUF_POOL_BUFSIZE 256
@ -193,7 +193,7 @@ a lot of data that needs to be copied, this should be set high. */
#define TCP_MSS 1024
/* TCP sender buffer space (bytes). */
#define TCP_SND_BUF 2048
#define TCP_SND_BUF 4096
/* TCP sender buffer space (pbufs). This must be at least = 2 *
TCP_SND_BUF/TCP_MSS for things to work. */

2
lib/LwIP/port/lwip_helpers.c
View File

@ -12,4 +12,4 @@ void lwip_platform_assert(const char *msg, int line, const char *file) {
int lwip_platform_rand(void) {
/* TODO: Use RNG. */
return rand();
}
}

2
src/freertos_helpers.c
View File

@ -1,4 +1,4 @@
#include "FreeRTOS.h"
#include "task.h"
uint8_t ucHeap[configTOTAL_HEAP_SIZE] __attribute__((section(".heap")));
uint8_t ucHeap[configTOTAL_HEAP_SIZE] __attribute__((section(".freertos_heap")));

108
src/ip_stack_helpers.c Normal file
View File

@ -0,0 +1,108 @@
/* FreeRTOS */
#include "FreeRTOS.h"
#include "task.h"
/* LwIP */
#include "lwip/apps/httpd.h"
#include "lwip/apps/lwiperf.h"
#include "lwip/apps/sntp.h"
#include "lwip/dhcp.h"
#include "lwip/dns.h"
#include "lwip/init.h"
#include "lwip/prot/dhcp.h"
#include "lwip/tcpip.h"
/* ENET */
#include "ethernetif.h"
/* Debug Console */
#include "fsl_debug_console.h"
#define NTP_POOL_ADDR "cn.pool.ntp.org"
static struct netif fsl_netif0;
/* Report state => string */
static const char *report_type_str[] = {
"TCP_DONE_SERVER", /* LWIPERF_TCP_DONE_SERVER,*/
"TCP_DONE_CLIENT", /* LWIPERF_TCP_DONE_CLIENT,*/
"TCP_ABORTED_LOCAL", /* LWIPERF_TCP_ABORTED_LOCAL, */
"TCP_ABORTED_LOCAL_DATAERROR", /* LWIPERF_TCP_ABORTED_LOCAL_DATAERROR, */
"TCP_ABORTED_LOCAL_TXERROR", /* LWIPERF_TCP_ABORTED_LOCAL_TXERROR, */
"TCP_ABORTED_REMOTE", /* LWIPERF_TCP_ABORTED_REMOTE, */
"UDP_STARTED", /* LWIPERF_UDP_STARTED, */
"UDP_DONE", /* LWIPERF_UDP_DONE, */
"UDP_ABORTED_LOCAL", /* LWIPERF_UDP_ABORTED_LOCAL, */
"UDP_ABORTED_REMOTE" /* LWIPERF_UDP_ABORTED_REMOTE */
};
/** Prototype of a report function that is called when a session is finished.
This report function shows the test results. */
static void ip_stack_lwiperf_report(void *arg, enum lwiperf_report_type report_type, const ip_addr_t *local_addr,
u16_t local_port, const ip_addr_t *remote_addr, u16_t remote_port,
u32_t bytes_transferred, u32_t ms_duration, u32_t bandwidth_kbitpsec) {
PRINTF("-------------------------------------------------\r\n");
if ((report_type < sizeof(report_type_str)) && local_addr && remote_addr) {
PRINTF(" %s \r\n", report_type_str[report_type]);
PRINTF(" Local address : %u.%u.%u.%u ", ((u8_t *)local_addr)[0], ((u8_t *)local_addr)[1],
((u8_t *)local_addr)[2], ((u8_t *)local_addr)[3]);
PRINTF(" Port %d \r\n", local_port);
PRINTF(" Remote address : %u.%u.%u.%u ", ((u8_t *)remote_addr)[0], ((u8_t *)remote_addr)[1],
((u8_t *)remote_addr)[2], ((u8_t *)remote_addr)[3]);
PRINTF(" Port %d \r\n", remote_port);
PRINTF(" Bytes Transferred %d \r\n", bytes_transferred);
PRINTF(" Duration (ms) %d \r\n", ms_duration);
PRINTF(" Bandwidth (kbitpsec) %d \r\n", bandwidth_kbitpsec);
} else {
PRINTF(" IPERF Report error\r\n");
}
}
static void ip_stack_sntp_address_found(const char *name, const ip_addr_t *ipaddr, void *callback_arg) {
PRINTF("Resolved IP: %s\r\n", ipaddr_ntoa(ipaddr));
sntp_setserver(0, ipaddr);
sntp_init();
}
static void ip_stack_enable_sntp(void) {
/* We are not ESP32, we have to do the DNS resolution manually. */
ip_addr_t ntp_addr;
sntp_setoperatingmode(SNTP_OPMODE_POLL);
if(dns_gethostbyname(NTP_POOL_ADDR, &ntp_addr, ip_stack_sntp_address_found, NULL) == ERR_OK) {
/* If ERR_OK is returned, the result is cached in DNS. */
sntp_setserver(0, &ntp_addr);
sntp_init();
} else {
PRINTF("No cached DNS result found, wait for callback.\r\n");
}
}
void ip_stack_setup(void) {
ip4_addr_t fsl_netif0_ipaddr, fsl_netif0_netmask, fsl_netif0_gw;
SYSMPU->CESR &= ~(SYSMPU_CESR_VLD_MASK); /* Disable MPU */
tcpip_init(NULL, NULL);
/* Initialize netif interface */
netif_add(&fsl_netif0, &fsl_netif0_ipaddr, &fsl_netif0_netmask, &fsl_netif0_gw, NULL, ethernetif_init, tcpip_input);
netif_set_default(&fsl_netif0);
netif_set_up(&fsl_netif0);
/* Start DHCP, this configures both DNS and IP addresses. */
dhcp_start(&fsl_netif0);
/* Wait for a lease */
while(dhcp_supplied_address(&fsl_netif0) == 0) {
vTaskDelay(pdMS_TO_TICKS(500));
}
PRINTF("IP Address: %s\r\n", ipaddr_ntoa(&fsl_netif0.ip_addr));
ip_stack_enable_sntp();
/* Start IPerf server */
lwiperf_start_tcp_server_default(ip_stack_lwiperf_report, NULL);
}

100
src/main.c
View File

@ -1,3 +1,6 @@
#include <time.h>
/* HW Related */
#include "board.h"
#include "clock_config.h"
#include "peripherals.h"
@ -7,22 +10,13 @@
#include "fsl_debug_console.h"
/* MISC */
#include "ip_stack_helpers.h"
#include "system_utilities.h"
/*FreeRTOS*/
#include "FreeRTOS.h"
#include "task.h"
/* LwIP */
#include "lwip/dhcp.h"
#include "lwip/prot/dhcp.h"
#include "lwip/tcpip.h"
/* ENET */
#include "ethernetif.h"
static struct netif fsl_netif0;
static void vTaskHello(void *pvParameters);
int main(void) {
@ -31,6 +25,7 @@ int main(void) {
BOARD_InitBootPeripherals();
BOARD_InitDebugConsole();
BOARD_EnableRTC();
print_hardware();
sram_test();
@ -44,84 +39,17 @@ int main(void) {
}
}
static void setup_lwip(void) {
ip4_addr_t fsl_netif0_ipaddr, fsl_netif0_netmask, fsl_netif0_gw;
SYSMPU->CESR &= ~(SYSMPU_CESR_VLD_MASK); /* Disable MPU */
tcpip_init(NULL, NULL);
netif_add(&fsl_netif0, &fsl_netif0_ipaddr, &fsl_netif0_netmask, &fsl_netif0_gw, NULL, ethernetif_init, tcpip_input);
netif_set_default(&fsl_netif0);
netif_set_up(&fsl_netif0);
dhcp_start(&fsl_netif0);
}
static void print_dhcp_state(struct netif *netif) {
static u8_t dhcp_last_state = DHCP_STATE_OFF;
struct dhcp *dhcp = (struct dhcp *)netif_get_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP);
if (dhcp_last_state != dhcp->state) {
dhcp_last_state = dhcp->state;
PRINTF(" DHCP state : ");
switch (dhcp_last_state) {
case DHCP_STATE_OFF:
PRINTF("OFF");
break;
case DHCP_STATE_REQUESTING:
PRINTF("REQUESTING");
break;
case DHCP_STATE_INIT:
PRINTF("INIT");
break;
case DHCP_STATE_REBOOTING:
PRINTF("REBOOTING");
break;
case DHCP_STATE_REBINDING:
PRINTF("REBINDING");
break;
case DHCP_STATE_RENEWING:
PRINTF("RENEWING");
break;
case DHCP_STATE_SELECTING:
PRINTF("SELECTING");
break;
case DHCP_STATE_INFORMING:
PRINTF("INFORMING");
break;
case DHCP_STATE_CHECKING:
PRINTF("CHECKING");
break;
case DHCP_STATE_BOUND:
PRINTF("BOUND");
break;
case DHCP_STATE_BACKING_OFF:
PRINTF("BACKING_OFF");
break;
default:
PRINTF("%u", dhcp_last_state);
assert(0);
break;
}
PRINTF("\r\n");
if (dhcp_last_state == DHCP_STATE_BOUND) {
PRINTF("\r\n IPv4 Address : %u.%u.%u.%u\r\n", ((u8_t *)&netif->ip_addr.u_addr)[0],
((u8_t *)&netif->ip_addr.u_addr)[1], ((u8_t *)&netif->ip_addr.u_addr)[2],
((u8_t *)&netif->ip_addr.u_addr)[3]);
PRINTF(" IPv4 Subnet mask : %u.%u.%u.%u\r\n", ((u8_t *)&netif->netmask.u_addr)[0],
((u8_t *)&netif->netmask.u_addr)[1], ((u8_t *)&netif->netmask.u_addr)[2],
((u8_t *)&netif->netmask.u_addr)[3]);
PRINTF(" IPv4 Gateway : %u.%u.%u.%u\r\n\r\n", ((u8_t *)&netif->gw.u_addr)[0],
((u8_t *)&netif->gw.u_addr)[1], ((u8_t *)&netif->gw.u_addr)[2], ((u8_t *)&netif->gw.u_addr)[3]);
}
}
}
static void vTaskHello(void *pvParameters) {
setup_lwip();
ip_stack_setup();
time_t t;
struct tm *cur_tm;
for (;;) {
vTaskDelay(pdMS_TO_TICKS(1000));
print_dhcp_state(&fsl_netif0);
t = time(NULL);
cur_tm = localtime(&t);
PRINTF("Current time: %04d-%02d-%02d %02d:%02d:%02d\r\n", cur_tm->tm_year + 1900, cur_tm->tm_mon + 1,
cur_tm->tm_mday, cur_tm->tm_hour, cur_tm->tm_min, cur_tm->tm_sec);
}
}

11
src/syscalls.c Normal file
View File

@ -0,0 +1,11 @@
#include <sys/time.h>
#include "MK60D10.h"
int _gettimeofday(struct timeval *restrict tp, void *restrict tzp) {
tp->tv_sec = RTC->TSR;
tp->tv_usec = 0U;
return 0;
}

8
src/system_utilities.c
View File

@ -114,4 +114,12 @@ void sram_test(void) {
}
PRINTF("done.\r\n");
}
int set_rtc_time(int sec) {
RTC->SR &= ~(RTC_SR_TCE_MASK);
RTC->TSR = sec;
RTC->SR |= RTC_SR_TCE_MASK;
return 0;
}