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Added filesystem helper to LwIP.

This commit is contained in:
imi415 2022-06-11 00:10:08 +08:00
parent cecff98d07
commit bf73b1b541
Signed by: imi415
GPG Key ID: 885EC2B5A8A6F8A7
12 changed files with 190 additions and 28 deletions
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3
CMakeLists.txt
View File

@ -67,9 +67,10 @@ set(TARGET_SOURCES
"src/fatfs_diskio.c"
"src/freertos_helpers.c"
"src/fsl_phy.c"
"src/httpd_helpers.c"
"src/ip_stack_helpers.c"
"src/main.c"
"src/sdhc_helpers.c"
"src/sdhc_host.c"
"src/syscalls.c"
"src/system_utilities.c"
)

42
MK60DN512xxx10.mex
View File

@ -132,12 +132,42 @@
<pin peripheral="ENET" signal="RMII_TXD1" pin_num="69" pin_signal="ADC1_SE17/PTA17/SPI0_SIN/UART0_RTS_b/RMII0_TXD1/MII0_TXD1/I2S0_MCLK"/>
<pin peripheral="ENET" signal="rmii_txen" pin_num="67" pin_signal="PTA15/SPI0_SCK/UART0_RX/RMII0_TXEN/MII0_TXEN/I2S0_RXD0"/>
<pin peripheral="ENET" signal="RMII_CLKIN" pin_num="72" pin_signal="EXTAL0/PTA18/FTM0_FLT2/FTM_CLKIN0"/>
<pin peripheral="SDHC" signal="CMD" pin_num="4" pin_signal="ADC1_SE7a/PTE3/SPI1_SIN/UART1_RTS_b/SDHC0_CMD/SPI1_SOUT"/>
<pin peripheral="SDHC" signal="D, 0" pin_num="2" pin_signal="ADC1_SE5a/PTE1/LLWU_P0/SPI1_SOUT/UART1_RX/SDHC0_D0/I2C1_SCL/SPI1_SIN"/>
<pin peripheral="SDHC" signal="D, 1" pin_num="1" pin_signal="ADC1_SE4a/PTE0/SPI1_PCS1/UART1_TX/SDHC0_D1/I2C1_SDA/RTC_CLKOUT"/>
<pin peripheral="SDHC" signal="D, 3" pin_num="7" pin_signal="PTE4/LLWU_P2/SPI1_PCS0/UART3_TX/SDHC0_D3"/>
<pin peripheral="SDHC" signal="D, 2" pin_num="8" pin_signal="PTE5/SPI1_PCS2/UART3_RX/SDHC0_D2"/>
<pin peripheral="SDHC" signal="DCLK" pin_num="3" pin_signal="ADC1_SE6a/PTE2/LLWU_P1/SPI1_SCK/UART1_CTS_b/SDHC0_DCLK"/>
<pin peripheral="SDHC" signal="CMD" pin_num="4" pin_signal="ADC1_SE7a/PTE3/SPI1_SIN/UART1_RTS_b/SDHC0_CMD/SPI1_SOUT">
<pin_features>
<pin_feature name="pull_select" value="up"/>
<pin_feature name="pull_enable" value="enable"/>
</pin_features>
</pin>
<pin peripheral="SDHC" signal="D, 0" pin_num="2" pin_signal="ADC1_SE5a/PTE1/LLWU_P0/SPI1_SOUT/UART1_RX/SDHC0_D0/I2C1_SCL/SPI1_SIN">
<pin_features>
<pin_feature name="pull_select" value="up"/>
<pin_feature name="pull_enable" value="enable"/>
</pin_features>
</pin>
<pin peripheral="SDHC" signal="D, 1" pin_num="1" pin_signal="ADC1_SE4a/PTE0/SPI1_PCS1/UART1_TX/SDHC0_D1/I2C1_SDA/RTC_CLKOUT">
<pin_features>
<pin_feature name="pull_select" value="up"/>
<pin_feature name="pull_enable" value="enable"/>
</pin_features>
</pin>
<pin peripheral="SDHC" signal="D, 3" pin_num="7" pin_signal="PTE4/LLWU_P2/SPI1_PCS0/UART3_TX/SDHC0_D3">
<pin_features>
<pin_feature name="pull_select" value="up"/>
<pin_feature name="pull_enable" value="enable"/>
</pin_features>
</pin>
<pin peripheral="SDHC" signal="D, 2" pin_num="8" pin_signal="PTE5/SPI1_PCS2/UART3_RX/SDHC0_D2">
<pin_features>
<pin_feature name="pull_select" value="up"/>
<pin_feature name="pull_enable" value="enable"/>
</pin_features>
</pin>
<pin peripheral="SDHC" signal="DCLK" pin_num="3" pin_signal="ADC1_SE6a/PTE2/LLWU_P1/SPI1_SCK/UART1_CTS_b/SDHC0_DCLK">
<pin_features>
<pin_feature name="pull_select" value="up"/>
<pin_feature name="pull_enable" value="enable"/>
</pin_features>
</pin>
</pins>
</function>
</functions_list>

5
board/board.c
View File

@ -31,6 +31,7 @@
#include <stdint.h>
#include "fsl_common.h"
#include "fsl_rtc.h"
#include "fsl_sysmpu.h"
#include "fsl_debug_console.h"
#include "board.h"
@ -58,4 +59,8 @@ void BOARD_EnableRTC(void) {
RTC_Init(RTC, &rtc_config);
RTC->SR |= RTC_SR_TCE_MASK;
}
void BOARD_DisableSYSMPU(void) {
SYSMPU_Enable(SYSMPU, false);
}

5
board/board.h
View File

@ -163,8 +163,8 @@
/* SDHC base address, clock and card detection pin */
#define BOARD_SDHC_BASEADDR SDHC
#define BOARD_SDHC_CLKSRC kCLOCK_CoreSysClk
#define BOARD_SDHC_CLK_FREQ CLOCK_GetFreq(kCLOCK_CoreSysClk)
#define BOARD_SDHC_CLKSRC kCLOCK_Osc0ErClk
#define BOARD_SDHC_CLK_FREQ CLOCK_GetFreq(kCLOCK_Osc0ErClk)
#define BOARD_SDHC_IRQ SDHC_IRQn
#define BOARD_SDHC_CD_GPIO_BASE GPIOE
#define BOARD_SDHC_CD_GPIO_PIN 28U
@ -185,6 +185,7 @@ extern "C" {
void BOARD_InitDebugConsole(void);
void BOARD_EnableRTC(void);
void BOARD_DisableSYSMPU(void);
#if defined(__cplusplus)
}

60
board/pin_mux.c
View File

@ -94,12 +94,12 @@ BOARD_InitPins:
- {pin_num: '69', peripheral: ENET, signal: RMII_TXD1, pin_signal: ADC1_SE17/PTA17/SPI0_SIN/UART0_RTS_b/RMII0_TXD1/MII0_TXD1/I2S0_MCLK}
- {pin_num: '67', peripheral: ENET, signal: rmii_txen, pin_signal: PTA15/SPI0_SCK/UART0_RX/RMII0_TXEN/MII0_TXEN/I2S0_RXD0}
- {pin_num: '72', peripheral: ENET, signal: RMII_CLKIN, pin_signal: EXTAL0/PTA18/FTM0_FLT2/FTM_CLKIN0}
- {pin_num: '4', peripheral: SDHC, signal: CMD, pin_signal: ADC1_SE7a/PTE3/SPI1_SIN/UART1_RTS_b/SDHC0_CMD/SPI1_SOUT}
- {pin_num: '2', peripheral: SDHC, signal: 'D, 0', pin_signal: ADC1_SE5a/PTE1/LLWU_P0/SPI1_SOUT/UART1_RX/SDHC0_D0/I2C1_SCL/SPI1_SIN}
- {pin_num: '1', peripheral: SDHC, signal: 'D, 1', pin_signal: ADC1_SE4a/PTE0/SPI1_PCS1/UART1_TX/SDHC0_D1/I2C1_SDA/RTC_CLKOUT}
- {pin_num: '7', peripheral: SDHC, signal: 'D, 3', pin_signal: PTE4/LLWU_P2/SPI1_PCS0/UART3_TX/SDHC0_D3}
- {pin_num: '8', peripheral: SDHC, signal: 'D, 2', pin_signal: PTE5/SPI1_PCS2/UART3_RX/SDHC0_D2}
- {pin_num: '3', peripheral: SDHC, signal: DCLK, pin_signal: ADC1_SE6a/PTE2/LLWU_P1/SPI1_SCK/UART1_CTS_b/SDHC0_DCLK}
- {pin_num: '4', peripheral: SDHC, signal: CMD, pin_signal: ADC1_SE7a/PTE3/SPI1_SIN/UART1_RTS_b/SDHC0_CMD/SPI1_SOUT, pull_select: up, pull_enable: enable}
- {pin_num: '2', peripheral: SDHC, signal: 'D, 0', pin_signal: ADC1_SE5a/PTE1/LLWU_P0/SPI1_SOUT/UART1_RX/SDHC0_D0/I2C1_SCL/SPI1_SIN, pull_select: up, pull_enable: enable}
- {pin_num: '1', peripheral: SDHC, signal: 'D, 1', pin_signal: ADC1_SE4a/PTE0/SPI1_PCS1/UART1_TX/SDHC0_D1/I2C1_SDA/RTC_CLKOUT, pull_select: up, pull_enable: enable}
- {pin_num: '7', peripheral: SDHC, signal: 'D, 3', pin_signal: PTE4/LLWU_P2/SPI1_PCS0/UART3_TX/SDHC0_D3, pull_select: up, pull_enable: enable}
- {pin_num: '8', peripheral: SDHC, signal: 'D, 2', pin_signal: PTE5/SPI1_PCS2/UART3_RX/SDHC0_D2, pull_select: up, pull_enable: enable}
- {pin_num: '3', peripheral: SDHC, signal: DCLK, pin_signal: ADC1_SE6a/PTE2/LLWU_P1/SPI1_SCK/UART1_CTS_b/SDHC0_DCLK, pull_select: up, pull_enable: enable}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
@ -295,21 +295,69 @@ void BOARD_InitPins(void)
/* PORTE0 (pin 1) is configured as SDHC0_D1 */
PORT_SetPinMux(PORTE, 0U, kPORT_MuxAlt4);
PORTE->PCR[0] = ((PORTE->PCR[0] &
/* Mask bits to zero which are setting */
(~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_ISF_MASK)))
/* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the
* corresponding Port Pull Enable Register field is set. */
| (uint32_t)(kPORT_PullUp));
/* PORTE1 (pin 2) is configured as SDHC0_D0 */
PORT_SetPinMux(PORTE, 1U, kPORT_MuxAlt4);
PORTE->PCR[1] = ((PORTE->PCR[1] &
/* Mask bits to zero which are setting */
(~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_ISF_MASK)))
/* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the
* corresponding Port Pull Enable Register field is set. */
| (uint32_t)(kPORT_PullUp));
/* PORTE2 (pin 3) is configured as SDHC0_DCLK */
PORT_SetPinMux(PORTE, 2U, kPORT_MuxAlt4);
PORTE->PCR[2] = ((PORTE->PCR[2] &
/* Mask bits to zero which are setting */
(~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_ISF_MASK)))
/* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the
* corresponding Port Pull Enable Register field is set. */
| (uint32_t)(kPORT_PullUp));
/* PORTE3 (pin 4) is configured as SDHC0_CMD */
PORT_SetPinMux(PORTE, 3U, kPORT_MuxAlt4);
PORTE->PCR[3] = ((PORTE->PCR[3] &
/* Mask bits to zero which are setting */
(~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_ISF_MASK)))
/* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the
* corresponding Port Pull Enable Register field is set. */
| (uint32_t)(kPORT_PullUp));
/* PORTE4 (pin 7) is configured as SDHC0_D3 */
PORT_SetPinMux(PORTE, 4U, kPORT_MuxAlt4);
PORTE->PCR[4] = ((PORTE->PCR[4] &
/* Mask bits to zero which are setting */
(~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_ISF_MASK)))
/* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the
* corresponding Port Pull Enable Register field is set. */
| (uint32_t)(kPORT_PullUp));
/* PORTE5 (pin 8) is configured as SDHC0_D2 */
PORT_SetPinMux(PORTE, 5U, kPORT_MuxAlt4);
PORTE->PCR[5] = ((PORTE->PCR[5] &
/* Mask bits to zero which are setting */
(~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_ISF_MASK)))
/* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the
* corresponding Port Pull Enable Register field is set. */
| (uint32_t)(kPORT_PullUp));
SIM->SOPT2 = ((SIM->SOPT2 &
/* Mask bits to zero which are setting */
(~(SIM_SOPT2_RMIISRC_MASK)))

2
include/ffconf.h
View File

@ -153,7 +153,7 @@
/ on character encoding. When LFN is not enabled, these options have no effect. */
#define FF_FS_RPATH 0
#define FF_FS_RPATH 1
/* This option configures support for relative path.
/
/ 0: Disable relative path and remove related functions.

8
lib/LwIP/port/include/lwipopts.h
View File

@ -107,6 +107,7 @@
#define TCP_FR_DEBUG LWIP_DBG_OFF
#define TCP_QLEN_DEBUG LWIP_DBG_OFF
#define TCP_RST_DEBUG LWIP_DBG_OFF
#define HTTPD_DEBUG LWIP_DBG_ON
#endif
#define LWIP_DBG_TYPES_ON (LWIP_DBG_ON|LWIP_DBG_TRACE|LWIP_DBG_STATE|LWIP_DBG_FRESH|LWIP_DBG_HALT)
@ -263,6 +264,11 @@ a lot of data that needs to be copied, this should be set high. */
/* ---------- RAW options ---------- */
#define LWIP_RAW 1
/* ---------- HTTPD options -------- */
#define LWIP_HTTPD_CUSTOM_FILES 1
#define LWIP_HTTPD_DYNAMIC_FILE_READ 1
#define LWIP_HTTPD_FILE_EXTENSION 1
#define LWIP_HTTPD_DYNAMIC_HEADERS 1
/* ---------- Statistics options ---------- */
@ -330,7 +336,7 @@ void lwip_platform_assert(const char *msg, int line, const char *file);
/* FreeRTOS related settings */
#define TCPIP_THREAD_PRIO 15
#define TCPIP_MBOX_SIZE 32
#define TCPIP_THREAD_STACKSIZE 1024
#define TCPIP_THREAD_STACKSIZE 2048
#endif /* LWIP_LWIPOPTS_H */

4
src/fatfs_diskio.c
View File

@ -132,7 +132,9 @@ DSTATUS disk_initialize(BYTE pdrv)
g_sd.host.base = SD_HOST_BASEADDR;
g_sd.host.sourceClock_Hz = SD_HOST_CLK_FREQ;
if (kStatus_Success != SD_Init(&g_sd))
volatile status_t ret = SD_Init(&g_sd);
if (kStatus_Success != ret)
{
SD_Deinit(&g_sd);
memset(&g_sd, 0U, sizeof(g_sd));

73
src/httpd_helpers.c Normal file
View File

@ -0,0 +1,73 @@
#include "FreeRTOS.h"
#include "ff.h"
#include "lwip/apps/fs.h"
#include "task.h"
#define ROOT_PATH "0:/WEBROOT"
int fs_open_custom(struct fs_file *file, const char *name) {
FIL *f = pvPortMalloc(sizeof(FIL));
if (f == NULL) {
goto err_out;
}
file->pextension = f;
char *pathname = pvPortMalloc(255);
if (pathname == NULL) {
goto err_out_f;
}
snprintf(pathname, 255, ROOT_PATH "%s", name);
if (f_open(f, _T(pathname), FA_READ) != FR_OK) {
goto err_out_p;
}
FILINFO finfo;
if(f_stat(_T(pathname), &finfo) != FR_OK) {
goto err_out_p;
}
file->len = finfo.fsize;
return 1;
err_out_p:
vPortFree(pathname);
err_out_f:
vPortFree(f);
err_out:
return 0;
}
void fs_close_custom(struct fs_file *file) {
FIL *f = file->pextension;
if (f == NULL) {
return;
}
f_close(f);
vPortFree(f);
}
int fs_read_custom(struct fs_file *file, char *buffer, int count) {
FIL *f = file->pextension;
if (f == NULL) {
return 0;
}
unsigned int actual_read = 0U;
FRESULT ret = f_read(f, buffer, count, &actual_read);
if (ret != FR_OK) {
return 0;
}
file->index += actual_read;
return actual_read;
}

2
src/ip_stack_helpers.c
View File

@ -89,8 +89,6 @@ static void ip_stack_enable_sntp(void) {
void ip_stack_setup(void) {
ip4_addr_t fsl_netif0_ipaddr, fsl_netif0_netmask, fsl_netif0_gw;
SYSMPU_Enable(SYSMPU, false);
tcpip_init(NULL, NULL);
/* Initialize netif interface */

12
src/main.c
View File

@ -31,6 +31,8 @@
#include "mbedtls/sha256.h"
#include "mbedtls/sha512.h"
FATFS g_fs; /* File system object */
static void vTaskHello(void *pvParameters);
static void mtls_selftests(int verbose);
@ -39,9 +41,11 @@ int main(void) {
BOARD_BootClockRUN();
BOARD_InitBootPeripherals();
BOARD_InitDebugConsole();
BOARD_DisableSYSMPU();
BOARD_EnableRTC();
BOARD_InitDebugConsole();
print_hardware();
sram_test();
@ -57,11 +61,7 @@ int main(void) {
}
static void vTaskHello(void *pvParameters) {
FATFS fs; /* File system object */
if (f_mount(&fs, "0:/", 0U)) {
if (f_mount(&g_fs, "0:/", 1U)) {
PRINTF("Mount volume failed.\r\n");
vTaskDelete(NULL);
}

2
src/sdhc_helpers.c → src/sdhc_host.c
View File

@ -32,7 +32,6 @@
#include "board.h"
#include "fsl_host.h"
#include "fsl_port.h"
#include "fsl_sysmpu.h"
#include "semphr.h"
#include "task.h"
@ -144,7 +143,6 @@ status_t HOST_Init(void *host) {
sdhc_host_t *sdhcHost = (sdhc_host_t *)host;
NVIC_SetPriority(SDHC_IRQn, 6);
SYSMPU_Enable(SYSMPU, false);
/* Initializes SDHC. */
sdhcHost->config.cardDetectDat3 = true;