generated from Embedded_Projects/Landzo_K60Z_LwIP
Added filesystem helper to LwIP.
This commit is contained in:
parent
cecff98d07
commit
bf73b1b541
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@ -67,9 +67,10 @@ set(TARGET_SOURCES
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"src/fatfs_diskio.c"
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"src/fatfs_diskio.c"
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"src/freertos_helpers.c"
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"src/freertos_helpers.c"
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"src/fsl_phy.c"
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"src/fsl_phy.c"
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"src/httpd_helpers.c"
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"src/ip_stack_helpers.c"
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"src/ip_stack_helpers.c"
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"src/main.c"
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"src/main.c"
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"src/sdhc_helpers.c"
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"src/sdhc_host.c"
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"src/syscalls.c"
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"src/syscalls.c"
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"src/system_utilities.c"
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"src/system_utilities.c"
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)
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)
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@ -132,12 +132,42 @@
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<pin peripheral="ENET" signal="RMII_TXD1" pin_num="69" pin_signal="ADC1_SE17/PTA17/SPI0_SIN/UART0_RTS_b/RMII0_TXD1/MII0_TXD1/I2S0_MCLK"/>
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<pin peripheral="ENET" signal="RMII_TXD1" pin_num="69" pin_signal="ADC1_SE17/PTA17/SPI0_SIN/UART0_RTS_b/RMII0_TXD1/MII0_TXD1/I2S0_MCLK"/>
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<pin peripheral="ENET" signal="rmii_txen" pin_num="67" pin_signal="PTA15/SPI0_SCK/UART0_RX/RMII0_TXEN/MII0_TXEN/I2S0_RXD0"/>
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<pin peripheral="ENET" signal="rmii_txen" pin_num="67" pin_signal="PTA15/SPI0_SCK/UART0_RX/RMII0_TXEN/MII0_TXEN/I2S0_RXD0"/>
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<pin peripheral="ENET" signal="RMII_CLKIN" pin_num="72" pin_signal="EXTAL0/PTA18/FTM0_FLT2/FTM_CLKIN0"/>
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<pin peripheral="ENET" signal="RMII_CLKIN" pin_num="72" pin_signal="EXTAL0/PTA18/FTM0_FLT2/FTM_CLKIN0"/>
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<pin peripheral="SDHC" signal="CMD" pin_num="4" pin_signal="ADC1_SE7a/PTE3/SPI1_SIN/UART1_RTS_b/SDHC0_CMD/SPI1_SOUT"/>
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<pin peripheral="SDHC" signal="CMD" pin_num="4" pin_signal="ADC1_SE7a/PTE3/SPI1_SIN/UART1_RTS_b/SDHC0_CMD/SPI1_SOUT">
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<pin peripheral="SDHC" signal="D, 0" pin_num="2" pin_signal="ADC1_SE5a/PTE1/LLWU_P0/SPI1_SOUT/UART1_RX/SDHC0_D0/I2C1_SCL/SPI1_SIN"/>
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<pin_features>
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<pin peripheral="SDHC" signal="D, 1" pin_num="1" pin_signal="ADC1_SE4a/PTE0/SPI1_PCS1/UART1_TX/SDHC0_D1/I2C1_SDA/RTC_CLKOUT"/>
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<pin_feature name="pull_select" value="up"/>
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<pin peripheral="SDHC" signal="D, 3" pin_num="7" pin_signal="PTE4/LLWU_P2/SPI1_PCS0/UART3_TX/SDHC0_D3"/>
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<pin_feature name="pull_enable" value="enable"/>
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<pin peripheral="SDHC" signal="D, 2" pin_num="8" pin_signal="PTE5/SPI1_PCS2/UART3_RX/SDHC0_D2"/>
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</pin_features>
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<pin peripheral="SDHC" signal="DCLK" pin_num="3" pin_signal="ADC1_SE6a/PTE2/LLWU_P1/SPI1_SCK/UART1_CTS_b/SDHC0_DCLK"/>
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</pin>
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<pin peripheral="SDHC" signal="D, 0" pin_num="2" pin_signal="ADC1_SE5a/PTE1/LLWU_P0/SPI1_SOUT/UART1_RX/SDHC0_D0/I2C1_SCL/SPI1_SIN">
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<pin_features>
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<pin_feature name="pull_select" value="up"/>
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<pin_feature name="pull_enable" value="enable"/>
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</pin_features>
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</pin>
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<pin peripheral="SDHC" signal="D, 1" pin_num="1" pin_signal="ADC1_SE4a/PTE0/SPI1_PCS1/UART1_TX/SDHC0_D1/I2C1_SDA/RTC_CLKOUT">
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<pin_features>
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<pin_feature name="pull_select" value="up"/>
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<pin_feature name="pull_enable" value="enable"/>
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</pin_features>
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</pin>
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<pin peripheral="SDHC" signal="D, 3" pin_num="7" pin_signal="PTE4/LLWU_P2/SPI1_PCS0/UART3_TX/SDHC0_D3">
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<pin_features>
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<pin_feature name="pull_select" value="up"/>
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<pin_feature name="pull_enable" value="enable"/>
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</pin_features>
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</pin>
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<pin peripheral="SDHC" signal="D, 2" pin_num="8" pin_signal="PTE5/SPI1_PCS2/UART3_RX/SDHC0_D2">
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<pin_features>
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<pin_feature name="pull_select" value="up"/>
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<pin_feature name="pull_enable" value="enable"/>
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</pin_features>
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</pin>
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<pin peripheral="SDHC" signal="DCLK" pin_num="3" pin_signal="ADC1_SE6a/PTE2/LLWU_P1/SPI1_SCK/UART1_CTS_b/SDHC0_DCLK">
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<pin_features>
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<pin_feature name="pull_select" value="up"/>
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<pin_feature name="pull_enable" value="enable"/>
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</pin_features>
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</pin>
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</pins>
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</pins>
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</function>
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</function>
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</functions_list>
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</functions_list>
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@ -31,6 +31,7 @@
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#include <stdint.h>
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#include <stdint.h>
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#include "fsl_common.h"
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#include "fsl_common.h"
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#include "fsl_rtc.h"
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#include "fsl_rtc.h"
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#include "fsl_sysmpu.h"
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#include "fsl_debug_console.h"
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#include "fsl_debug_console.h"
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#include "board.h"
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#include "board.h"
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@ -59,3 +60,7 @@ void BOARD_EnableRTC(void) {
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RTC->SR |= RTC_SR_TCE_MASK;
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RTC->SR |= RTC_SR_TCE_MASK;
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}
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}
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void BOARD_DisableSYSMPU(void) {
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SYSMPU_Enable(SYSMPU, false);
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}
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@ -163,8 +163,8 @@
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/* SDHC base address, clock and card detection pin */
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/* SDHC base address, clock and card detection pin */
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#define BOARD_SDHC_BASEADDR SDHC
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#define BOARD_SDHC_BASEADDR SDHC
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#define BOARD_SDHC_CLKSRC kCLOCK_CoreSysClk
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#define BOARD_SDHC_CLKSRC kCLOCK_Osc0ErClk
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#define BOARD_SDHC_CLK_FREQ CLOCK_GetFreq(kCLOCK_CoreSysClk)
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#define BOARD_SDHC_CLK_FREQ CLOCK_GetFreq(kCLOCK_Osc0ErClk)
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#define BOARD_SDHC_IRQ SDHC_IRQn
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#define BOARD_SDHC_IRQ SDHC_IRQn
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#define BOARD_SDHC_CD_GPIO_BASE GPIOE
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#define BOARD_SDHC_CD_GPIO_BASE GPIOE
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#define BOARD_SDHC_CD_GPIO_PIN 28U
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#define BOARD_SDHC_CD_GPIO_PIN 28U
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@ -185,6 +185,7 @@ extern "C" {
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void BOARD_InitDebugConsole(void);
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void BOARD_InitDebugConsole(void);
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void BOARD_EnableRTC(void);
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void BOARD_EnableRTC(void);
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void BOARD_DisableSYSMPU(void);
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#if defined(__cplusplus)
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#if defined(__cplusplus)
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}
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}
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@ -94,12 +94,12 @@ BOARD_InitPins:
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- {pin_num: '69', peripheral: ENET, signal: RMII_TXD1, pin_signal: ADC1_SE17/PTA17/SPI0_SIN/UART0_RTS_b/RMII0_TXD1/MII0_TXD1/I2S0_MCLK}
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- {pin_num: '69', peripheral: ENET, signal: RMII_TXD1, pin_signal: ADC1_SE17/PTA17/SPI0_SIN/UART0_RTS_b/RMII0_TXD1/MII0_TXD1/I2S0_MCLK}
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- {pin_num: '67', peripheral: ENET, signal: rmii_txen, pin_signal: PTA15/SPI0_SCK/UART0_RX/RMII0_TXEN/MII0_TXEN/I2S0_RXD0}
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- {pin_num: '67', peripheral: ENET, signal: rmii_txen, pin_signal: PTA15/SPI0_SCK/UART0_RX/RMII0_TXEN/MII0_TXEN/I2S0_RXD0}
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- {pin_num: '72', peripheral: ENET, signal: RMII_CLKIN, pin_signal: EXTAL0/PTA18/FTM0_FLT2/FTM_CLKIN0}
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- {pin_num: '72', peripheral: ENET, signal: RMII_CLKIN, pin_signal: EXTAL0/PTA18/FTM0_FLT2/FTM_CLKIN0}
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- {pin_num: '4', peripheral: SDHC, signal: CMD, pin_signal: ADC1_SE7a/PTE3/SPI1_SIN/UART1_RTS_b/SDHC0_CMD/SPI1_SOUT}
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- {pin_num: '4', peripheral: SDHC, signal: CMD, pin_signal: ADC1_SE7a/PTE3/SPI1_SIN/UART1_RTS_b/SDHC0_CMD/SPI1_SOUT, pull_select: up, pull_enable: enable}
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- {pin_num: '2', peripheral: SDHC, signal: 'D, 0', pin_signal: ADC1_SE5a/PTE1/LLWU_P0/SPI1_SOUT/UART1_RX/SDHC0_D0/I2C1_SCL/SPI1_SIN}
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- {pin_num: '2', peripheral: SDHC, signal: 'D, 0', pin_signal: ADC1_SE5a/PTE1/LLWU_P0/SPI1_SOUT/UART1_RX/SDHC0_D0/I2C1_SCL/SPI1_SIN, pull_select: up, pull_enable: enable}
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- {pin_num: '1', peripheral: SDHC, signal: 'D, 1', pin_signal: ADC1_SE4a/PTE0/SPI1_PCS1/UART1_TX/SDHC0_D1/I2C1_SDA/RTC_CLKOUT}
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- {pin_num: '1', peripheral: SDHC, signal: 'D, 1', pin_signal: ADC1_SE4a/PTE0/SPI1_PCS1/UART1_TX/SDHC0_D1/I2C1_SDA/RTC_CLKOUT, pull_select: up, pull_enable: enable}
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- {pin_num: '7', peripheral: SDHC, signal: 'D, 3', pin_signal: PTE4/LLWU_P2/SPI1_PCS0/UART3_TX/SDHC0_D3}
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- {pin_num: '7', peripheral: SDHC, signal: 'D, 3', pin_signal: PTE4/LLWU_P2/SPI1_PCS0/UART3_TX/SDHC0_D3, pull_select: up, pull_enable: enable}
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- {pin_num: '8', peripheral: SDHC, signal: 'D, 2', pin_signal: PTE5/SPI1_PCS2/UART3_RX/SDHC0_D2}
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- {pin_num: '8', peripheral: SDHC, signal: 'D, 2', pin_signal: PTE5/SPI1_PCS2/UART3_RX/SDHC0_D2, pull_select: up, pull_enable: enable}
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- {pin_num: '3', peripheral: SDHC, signal: DCLK, pin_signal: ADC1_SE6a/PTE2/LLWU_P1/SPI1_SCK/UART1_CTS_b/SDHC0_DCLK}
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- {pin_num: '3', peripheral: SDHC, signal: DCLK, pin_signal: ADC1_SE6a/PTE2/LLWU_P1/SPI1_SCK/UART1_CTS_b/SDHC0_DCLK, pull_select: up, pull_enable: enable}
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
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*/
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*/
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/* clang-format on */
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/* clang-format on */
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@ -295,21 +295,69 @@ void BOARD_InitPins(void)
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/* PORTE0 (pin 1) is configured as SDHC0_D1 */
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/* PORTE0 (pin 1) is configured as SDHC0_D1 */
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PORT_SetPinMux(PORTE, 0U, kPORT_MuxAlt4);
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PORT_SetPinMux(PORTE, 0U, kPORT_MuxAlt4);
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PORTE->PCR[0] = ((PORTE->PCR[0] &
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/* Mask bits to zero which are setting */
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(~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_ISF_MASK)))
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/* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the
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* corresponding Port Pull Enable Register field is set. */
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| (uint32_t)(kPORT_PullUp));
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/* PORTE1 (pin 2) is configured as SDHC0_D0 */
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/* PORTE1 (pin 2) is configured as SDHC0_D0 */
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PORT_SetPinMux(PORTE, 1U, kPORT_MuxAlt4);
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PORT_SetPinMux(PORTE, 1U, kPORT_MuxAlt4);
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PORTE->PCR[1] = ((PORTE->PCR[1] &
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/* Mask bits to zero which are setting */
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(~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_ISF_MASK)))
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/* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the
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* corresponding Port Pull Enable Register field is set. */
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| (uint32_t)(kPORT_PullUp));
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/* PORTE2 (pin 3) is configured as SDHC0_DCLK */
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/* PORTE2 (pin 3) is configured as SDHC0_DCLK */
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PORT_SetPinMux(PORTE, 2U, kPORT_MuxAlt4);
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PORT_SetPinMux(PORTE, 2U, kPORT_MuxAlt4);
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PORTE->PCR[2] = ((PORTE->PCR[2] &
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/* Mask bits to zero which are setting */
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(~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_ISF_MASK)))
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/* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the
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* corresponding Port Pull Enable Register field is set. */
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| (uint32_t)(kPORT_PullUp));
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/* PORTE3 (pin 4) is configured as SDHC0_CMD */
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/* PORTE3 (pin 4) is configured as SDHC0_CMD */
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PORT_SetPinMux(PORTE, 3U, kPORT_MuxAlt4);
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PORT_SetPinMux(PORTE, 3U, kPORT_MuxAlt4);
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PORTE->PCR[3] = ((PORTE->PCR[3] &
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/* Mask bits to zero which are setting */
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(~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_ISF_MASK)))
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/* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the
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* corresponding Port Pull Enable Register field is set. */
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| (uint32_t)(kPORT_PullUp));
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/* PORTE4 (pin 7) is configured as SDHC0_D3 */
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/* PORTE4 (pin 7) is configured as SDHC0_D3 */
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PORT_SetPinMux(PORTE, 4U, kPORT_MuxAlt4);
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PORT_SetPinMux(PORTE, 4U, kPORT_MuxAlt4);
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PORTE->PCR[4] = ((PORTE->PCR[4] &
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/* Mask bits to zero which are setting */
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(~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_ISF_MASK)))
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/* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the
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* corresponding Port Pull Enable Register field is set. */
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| (uint32_t)(kPORT_PullUp));
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/* PORTE5 (pin 8) is configured as SDHC0_D2 */
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/* PORTE5 (pin 8) is configured as SDHC0_D2 */
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PORT_SetPinMux(PORTE, 5U, kPORT_MuxAlt4);
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PORT_SetPinMux(PORTE, 5U, kPORT_MuxAlt4);
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PORTE->PCR[5] = ((PORTE->PCR[5] &
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/* Mask bits to zero which are setting */
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(~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_ISF_MASK)))
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/* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the
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* corresponding Port Pull Enable Register field is set. */
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| (uint32_t)(kPORT_PullUp));
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SIM->SOPT2 = ((SIM->SOPT2 &
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SIM->SOPT2 = ((SIM->SOPT2 &
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/* Mask bits to zero which are setting */
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/* Mask bits to zero which are setting */
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(~(SIM_SOPT2_RMIISRC_MASK)))
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(~(SIM_SOPT2_RMIISRC_MASK)))
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@ -153,7 +153,7 @@
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/ on character encoding. When LFN is not enabled, these options have no effect. */
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/ on character encoding. When LFN is not enabled, these options have no effect. */
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#define FF_FS_RPATH 0
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#define FF_FS_RPATH 1
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/* This option configures support for relative path.
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/* This option configures support for relative path.
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/
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/
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/ 0: Disable relative path and remove related functions.
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/ 0: Disable relative path and remove related functions.
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@ -107,6 +107,7 @@
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#define TCP_FR_DEBUG LWIP_DBG_OFF
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#define TCP_FR_DEBUG LWIP_DBG_OFF
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#define TCP_QLEN_DEBUG LWIP_DBG_OFF
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#define TCP_QLEN_DEBUG LWIP_DBG_OFF
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#define TCP_RST_DEBUG LWIP_DBG_OFF
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#define TCP_RST_DEBUG LWIP_DBG_OFF
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#define HTTPD_DEBUG LWIP_DBG_ON
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#endif
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#endif
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#define LWIP_DBG_TYPES_ON (LWIP_DBG_ON|LWIP_DBG_TRACE|LWIP_DBG_STATE|LWIP_DBG_FRESH|LWIP_DBG_HALT)
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#define LWIP_DBG_TYPES_ON (LWIP_DBG_ON|LWIP_DBG_TRACE|LWIP_DBG_STATE|LWIP_DBG_FRESH|LWIP_DBG_HALT)
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@ -263,6 +264,11 @@ a lot of data that needs to be copied, this should be set high. */
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/* ---------- RAW options ---------- */
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/* ---------- RAW options ---------- */
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#define LWIP_RAW 1
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#define LWIP_RAW 1
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/* ---------- HTTPD options -------- */
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#define LWIP_HTTPD_CUSTOM_FILES 1
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#define LWIP_HTTPD_DYNAMIC_FILE_READ 1
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#define LWIP_HTTPD_FILE_EXTENSION 1
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#define LWIP_HTTPD_DYNAMIC_HEADERS 1
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/* ---------- Statistics options ---------- */
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/* ---------- Statistics options ---------- */
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@ -330,7 +336,7 @@ void lwip_platform_assert(const char *msg, int line, const char *file);
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/* FreeRTOS related settings */
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/* FreeRTOS related settings */
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#define TCPIP_THREAD_PRIO 15
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#define TCPIP_THREAD_PRIO 15
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#define TCPIP_MBOX_SIZE 32
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#define TCPIP_MBOX_SIZE 32
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#define TCPIP_THREAD_STACKSIZE 1024
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#define TCPIP_THREAD_STACKSIZE 2048
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#endif /* LWIP_LWIPOPTS_H */
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#endif /* LWIP_LWIPOPTS_H */
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@ -132,7 +132,9 @@ DSTATUS disk_initialize(BYTE pdrv)
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g_sd.host.base = SD_HOST_BASEADDR;
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g_sd.host.base = SD_HOST_BASEADDR;
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g_sd.host.sourceClock_Hz = SD_HOST_CLK_FREQ;
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g_sd.host.sourceClock_Hz = SD_HOST_CLK_FREQ;
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if (kStatus_Success != SD_Init(&g_sd))
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volatile status_t ret = SD_Init(&g_sd);
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if (kStatus_Success != ret)
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{
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{
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SD_Deinit(&g_sd);
|
SD_Deinit(&g_sd);
|
||||||
memset(&g_sd, 0U, sizeof(g_sd));
|
memset(&g_sd, 0U, sizeof(g_sd));
|
||||||
|
|
|
@ -0,0 +1,73 @@
|
||||||
|
#include "FreeRTOS.h"
|
||||||
|
#include "ff.h"
|
||||||
|
#include "lwip/apps/fs.h"
|
||||||
|
#include "task.h"
|
||||||
|
|
||||||
|
#define ROOT_PATH "0:/WEBROOT"
|
||||||
|
|
||||||
|
int fs_open_custom(struct fs_file *file, const char *name) {
|
||||||
|
FIL *f = pvPortMalloc(sizeof(FIL));
|
||||||
|
if (f == NULL) {
|
||||||
|
goto err_out;
|
||||||
|
}
|
||||||
|
|
||||||
|
file->pextension = f;
|
||||||
|
|
||||||
|
char *pathname = pvPortMalloc(255);
|
||||||
|
if (pathname == NULL) {
|
||||||
|
goto err_out_f;
|
||||||
|
}
|
||||||
|
|
||||||
|
snprintf(pathname, 255, ROOT_PATH "%s", name);
|
||||||
|
|
||||||
|
if (f_open(f, _T(pathname), FA_READ) != FR_OK) {
|
||||||
|
goto err_out_p;
|
||||||
|
}
|
||||||
|
|
||||||
|
FILINFO finfo;
|
||||||
|
if(f_stat(_T(pathname), &finfo) != FR_OK) {
|
||||||
|
goto err_out_p;
|
||||||
|
}
|
||||||
|
|
||||||
|
file->len = finfo.fsize;
|
||||||
|
|
||||||
|
return 1;
|
||||||
|
|
||||||
|
err_out_p:
|
||||||
|
vPortFree(pathname);
|
||||||
|
err_out_f:
|
||||||
|
vPortFree(f);
|
||||||
|
err_out:
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
void fs_close_custom(struct fs_file *file) {
|
||||||
|
FIL *f = file->pextension;
|
||||||
|
|
||||||
|
if (f == NULL) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
f_close(f);
|
||||||
|
|
||||||
|
vPortFree(f);
|
||||||
|
}
|
||||||
|
|
||||||
|
int fs_read_custom(struct fs_file *file, char *buffer, int count) {
|
||||||
|
FIL *f = file->pextension;
|
||||||
|
|
||||||
|
if (f == NULL) {
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
unsigned int actual_read = 0U;
|
||||||
|
|
||||||
|
FRESULT ret = f_read(f, buffer, count, &actual_read);
|
||||||
|
if (ret != FR_OK) {
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
file->index += actual_read;
|
||||||
|
|
||||||
|
return actual_read;
|
||||||
|
}
|
|
@ -89,8 +89,6 @@ static void ip_stack_enable_sntp(void) {
|
||||||
void ip_stack_setup(void) {
|
void ip_stack_setup(void) {
|
||||||
ip4_addr_t fsl_netif0_ipaddr, fsl_netif0_netmask, fsl_netif0_gw;
|
ip4_addr_t fsl_netif0_ipaddr, fsl_netif0_netmask, fsl_netif0_gw;
|
||||||
|
|
||||||
SYSMPU_Enable(SYSMPU, false);
|
|
||||||
|
|
||||||
tcpip_init(NULL, NULL);
|
tcpip_init(NULL, NULL);
|
||||||
|
|
||||||
/* Initialize netif interface */
|
/* Initialize netif interface */
|
||||||
|
|
12
src/main.c
12
src/main.c
|
@ -31,6 +31,8 @@
|
||||||
#include "mbedtls/sha256.h"
|
#include "mbedtls/sha256.h"
|
||||||
#include "mbedtls/sha512.h"
|
#include "mbedtls/sha512.h"
|
||||||
|
|
||||||
|
FATFS g_fs; /* File system object */
|
||||||
|
|
||||||
static void vTaskHello(void *pvParameters);
|
static void vTaskHello(void *pvParameters);
|
||||||
static void mtls_selftests(int verbose);
|
static void mtls_selftests(int verbose);
|
||||||
|
|
||||||
|
@ -39,9 +41,11 @@ int main(void) {
|
||||||
BOARD_BootClockRUN();
|
BOARD_BootClockRUN();
|
||||||
BOARD_InitBootPeripherals();
|
BOARD_InitBootPeripherals();
|
||||||
|
|
||||||
BOARD_InitDebugConsole();
|
BOARD_DisableSYSMPU();
|
||||||
BOARD_EnableRTC();
|
BOARD_EnableRTC();
|
||||||
|
|
||||||
|
BOARD_InitDebugConsole();
|
||||||
|
|
||||||
print_hardware();
|
print_hardware();
|
||||||
sram_test();
|
sram_test();
|
||||||
|
|
||||||
|
@ -57,11 +61,7 @@ int main(void) {
|
||||||
}
|
}
|
||||||
|
|
||||||
static void vTaskHello(void *pvParameters) {
|
static void vTaskHello(void *pvParameters) {
|
||||||
FATFS fs; /* File system object */
|
if (f_mount(&g_fs, "0:/", 1U)) {
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
if (f_mount(&fs, "0:/", 0U)) {
|
|
||||||
PRINTF("Mount volume failed.\r\n");
|
PRINTF("Mount volume failed.\r\n");
|
||||||
vTaskDelete(NULL);
|
vTaskDelete(NULL);
|
||||||
}
|
}
|
||||||
|
|
|
@ -32,7 +32,6 @@
|
||||||
#include "board.h"
|
#include "board.h"
|
||||||
#include "fsl_host.h"
|
#include "fsl_host.h"
|
||||||
#include "fsl_port.h"
|
#include "fsl_port.h"
|
||||||
#include "fsl_sysmpu.h"
|
|
||||||
#include "semphr.h"
|
#include "semphr.h"
|
||||||
#include "task.h"
|
#include "task.h"
|
||||||
|
|
||||||
|
@ -144,7 +143,6 @@ status_t HOST_Init(void *host) {
|
||||||
sdhc_host_t *sdhcHost = (sdhc_host_t *)host;
|
sdhc_host_t *sdhcHost = (sdhc_host_t *)host;
|
||||||
|
|
||||||
NVIC_SetPriority(SDHC_IRQn, 6);
|
NVIC_SetPriority(SDHC_IRQn, 6);
|
||||||
SYSMPU_Enable(SYSMPU, false);
|
|
||||||
|
|
||||||
/* Initializes SDHC. */
|
/* Initializes SDHC. */
|
||||||
sdhcHost->config.cardDetectDat3 = true;
|
sdhcHost->config.cardDetectDat3 = true;
|
Loading…
Reference in New Issue