/*********************************************************************************************************************** * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. **********************************************************************************************************************/ /* * How to setup clock using clock driver functions: * * 1. Setup clock sources. * * 2. Set up wait states of the flash. * * 3. Set up all dividers. * * 4. Set up all selectors to provide selected clocks. * */ /* clang-format off */ /* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* !!GlobalInfo product: Clocks v13.0 processor: MCXA153 package_id: MCXA153VLH mcu_data: ksdk2_0 processor_version: 15.0.0 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ /* clang-format on */ #include "fsl_clock.h" #include "clock_config.h" #include "fsl_spc.h" /******************************************************************************* * Definitions ******************************************************************************/ /******************************************************************************* * Variables ******************************************************************************/ /* System clock frequency. */ extern uint32_t SystemCoreClock; /******************************************************************************* ************************ BOARD_InitBootClocks function ************************ ******************************************************************************/ void BOARD_InitBootClocks(void) { BOARD_BootClockRUN(); } /******************************************************************************* ********************** Configuration BOARD_BootClockRUN *********************** ******************************************************************************/ /* clang-format off */ /* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* !!Configuration name: BOARD_BootClockRUN called_from_default_init: true outputs: - {id: CLK_1M_clock.outFreq, value: 1 MHz} - {id: CLK_48M_clock.outFreq, value: 48 MHz} - {id: CPU_clock.outFreq, value: 48 MHz} - {id: FREQME_reference_clock.outFreq, value: 12 MHz} - {id: FREQME_target_clock.outFreq, value: 12 MHz} - {id: FRO_12M_clock.outFreq, value: 12 MHz} - {id: FRO_HF_DIV_clock.outFreq, value: 48 MHz} - {id: FRO_HF_clock.outFreq, value: 48 MHz} - {id: MAIN_clock.outFreq, value: 48 MHz} - {id: OSTIMER_clock.outFreq, value: 1 MHz} - {id: Slow_clock.outFreq, value: 12 MHz} - {id: System_clock.outFreq, value: 48 MHz} - {id: UTICK_clock.outFreq, value: 1 MHz} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ /* clang-format on */ /******************************************************************************* * Variables for BOARD_BootClockRUN configuration ******************************************************************************/ /******************************************************************************* * Code for BOARD_BootClockRUN configuration ******************************************************************************/ void BOARD_BootClockRUN(void) { uint32_t coreFreq; spc_active_mode_core_ldo_option_t ldoOption; spc_sram_voltage_config_t sramOption; /* Get the CPU Core frequency */ coreFreq = CLOCK_GetCoreSysClkFreq(); /* The flow of increasing voltage and frequency */ if (coreFreq <= BOARD_BOOTCLOCKRUN_CORE_CLOCK) { /* Set the LDO_CORE VDD regulator level */ ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage; ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); /* Configure Flash to support different voltage level and frequency */ FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U)); /* Specifies the operating voltage for the SRAM's read/write timing margin */ sramOption.operateVoltage = kSPC_sramOperateAt1P0V; sramOption.requestVoltageUpdate = true; (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); } CLOCK_SetupFROHFClocking(48000000U); /*!< Enable FRO HF(48MHz) output */ CLOCK_SetupFRO12MClocking(); /*!< Setup FRO12M clock */ CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /* !< Switch MAIN_CLK to FRO_HF */ /* The flow of decreasing voltage and frequency */ if (coreFreq > BOARD_BOOTCLOCKRUN_CORE_CLOCK) { /* Configure Flash to support different voltage level and frequency */ FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U)); /* Specifies the operating voltage for the SRAM's read/write timing margin */ sramOption.operateVoltage = kSPC_sramOperateAt1P0V; sramOption.requestVoltageUpdate = true; (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption); /* Set the LDO_CORE VDD regulator level */ ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage; ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength; (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption); } /*!< Set up clock selectors - Attach clocks to the peripheries */ CLOCK_AttachClk(kCLK_1M_to_OSTIMER); /* !< Switch OSTIMER to CLK_1M */ /* Configure FREQME clock */ CLOCK_EnableClock(kCLOCK_InputMux); RESET_PeripheralReset(kINPUTMUX0_RST_SHIFT_RSTn); INPUTMUX0->FREQMEAS_REF = INPUTMUX_FREQMEAS_REF_INP(2); INPUTMUX0->FREQMEAS_TAR = INPUTMUX_FREQMEAS_TAR_INP(2); /*!< Set up dividers */ CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U); /* !< Set AHBCLKDIV divider to value 1 */ CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U); /* !< Set FROHFDIV divider to value 1 */ /* Set SystemCoreClock variable */ SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK; }