/***********************************************************************************************************************
 * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
 * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
 **********************************************************************************************************************/

#ifndef _PIN_MUX_H_
#define _PIN_MUX_H_

/*!
 * @addtogroup pin_mux
 * @{
 */

/***********************************************************************************************************************
 * API
 **********************************************************************************************************************/

#if defined(__cplusplus)
extern "C" {
#endif

/*!
 * @brief Calls initialization functions.
 *
 */
void BOARD_InitBootPins(void);

/*!
 * @brief Configures pin routing and optionally pin electrical features.
 *
 */
void BOARD_InitDbgUARTPins(void); /* Function assigned for the Cortex-M0P */

/*!
 * @brief Open-drain mode.: Open-drain mode enabled. Remark: This is not a true open-drain mode. */
#define PIO0_16_OD_ENABLED 0x01u
/*!
 * @brief Open-drain mode.: Open-drain mode enabled. Remark: This is not a true open-drain mode. */
#define PIO0_18_OD_ENABLED 0x01u
/*!
 * @brief Open-drain mode.: Open-drain mode enabled. Remark: This is not a true open-drain mode. */
#define PIO0_22_OD_ENABLED 0x01u

/*! @name PIO0_22 (number 30), LED_R
  @{ */

/* Symbols to be used with GPIO driver */
#define BOARD_INITLEDPINS_LED_R_GPIO GPIO                 /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITLEDPINS_LED_R_GPIO_PIN_MASK (1U << 22U) /*!<@brief GPIO pin mask */
#define BOARD_INITLEDPINS_LED_R_PORT 0U                   /*!<@brief PORT device index: 0 */
#define BOARD_INITLEDPINS_LED_R_PIN 22U                   /*!<@brief PORT pin number */
#define BOARD_INITLEDPINS_LED_R_PIN_MASK (1U << 22U)      /*!<@brief PORT pin mask */
                                                          /* @} */

/*! @name PIO0_18 (number 31), LED_G
  @{ */

/* Symbols to be used with GPIO driver */
#define BOARD_INITLEDPINS_LED_G_GPIO GPIO                 /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITLEDPINS_LED_G_GPIO_PIN_MASK (1U << 18U) /*!<@brief GPIO pin mask */
#define BOARD_INITLEDPINS_LED_G_PORT 0U                   /*!<@brief PORT device index: 0 */
#define BOARD_INITLEDPINS_LED_G_PIN 18U                   /*!<@brief PORT pin number */
#define BOARD_INITLEDPINS_LED_G_PIN_MASK (1U << 18U)      /*!<@brief PORT pin mask */
                                                          /* @} */

/*! @name PIO0_16 (number 32), LED_B
  @{ */

/* Symbols to be used with GPIO driver */
#define BOARD_INITLEDPINS_LED_B_GPIO GPIO                 /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITLEDPINS_LED_B_GPIO_PIN_MASK (1U << 16U) /*!<@brief GPIO pin mask */
#define BOARD_INITLEDPINS_LED_B_PORT 0U                   /*!<@brief PORT device index: 0 */
#define BOARD_INITLEDPINS_LED_B_PIN 16U                   /*!<@brief PORT pin number */
#define BOARD_INITLEDPINS_LED_B_PIN_MASK (1U << 16U)      /*!<@brief PORT pin mask */
                                                          /* @} */

/*!
 * @brief Configures pin routing and optionally pin electrical features.
 *
 */
void BOARD_InitLEDPins(void); /* Function assigned for the Cortex-M0P */

/*!
 * @brief
 * Selects function mode (on-chip pull-up/pull-down resistor control).
 * : Inactive.
 * Inactive (no pull-down/pull-up resistor enabled).
 */
#define PIO0_14_MODE_INACTIVE 0x00u
/*!
 * @brief Open-drain mode.: Disable. */
#define PIO0_14_OD_DISABLE 0x00u

/*! @name ADC_2 (number 25), IOREF
  @{ */
#define BOARD_INITADCPINS_IOREF_PORT 0U                   /*!<@brief PORT device index: 0 */
#define BOARD_INITADCPINS_IOREF_PIN 14U                   /*!<@brief PORT pin number */
#define BOARD_INITADCPINS_IOREF_PIN_MASK (1U << 14U)      /*!<@brief PORT pin mask */
                                                          /* @} */

/*!
 * @brief Configures pin routing and optionally pin electrical features.
 *
 */
void BOARD_InitADCPins(void); /* Function assigned for the Cortex-M0P */

/*!
 * @brief DAC mode enable.: Enable. */
#define PIO0_19_DACMODE_ENABLE 0x01u
/*!
 * @brief
 * Selects function mode (on-chip pull-up/pull-down resistor control).
 * : Inactive.
 * Inactive (no pull-down/pull-up resistor enabled).
 */
#define PIO0_19_MODE_INACTIVE 0x00u
/*!
 * @brief Open-drain mode.: Disable. */
#define PIO0_19_OD_DISABLE 0x00u

/*! @name DACOUT (number 26), DAC
  @{ */
#define BOARD_INITDACPINS_DAC_PORT 0U                   /*!<@brief PORT device index: 0 */
#define BOARD_INITDACPINS_DAC_PIN 19U                   /*!<@brief PORT pin number */
#define BOARD_INITDACPINS_DAC_PIN_MASK (1U << 19U)      /*!<@brief PORT pin mask */
                                                        /* @} */

/*!
 * @brief Configures pin routing and optionally pin electrical features.
 *
 */
void BOARD_InitDACPins(void); /* Function assigned for the Cortex-M0P */

/*!
 * @brief
 * Selects function mode (on-chip pull-up/pull-down resistor control).
 * : Inactive.
 * Inactive (no pull-down/pull-up resistor enabled).
 */
#define PIO0_1_MODE_INACTIVE 0x00u
/*!
 * @brief
 * Selects function mode (on-chip pull-up/pull-down resistor control).
 * : Inactive.
 * Inactive (no pull-down/pull-up resistor enabled).
 */
#define PIO0_9_MODE_INACTIVE 0x00u

/*!
 * @brief Configures pin routing and optionally pin electrical features.
 *
 */
void BOARD_InitI2CPins(void); /* Function assigned for the Cortex-M0P */

/*!
 * @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Repeater. Repeater mode. */
#define PIO0_10_MODE_REPEATER 0x03u
/*!
 * @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Repeater. Repeater mode. */
#define PIO0_11_MODE_REPEATER 0x03u
/*!
 * @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Repeater. Repeater mode. */
#define PIO0_15_MODE_REPEATER 0x03u
/*!
 * @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Repeater. Repeater mode. */
#define PIO0_20_MODE_REPEATER 0x03u

/*! @name PIO0_15 (number 16), IO0
  @{ */

/* Symbols to be used with GPIO driver */
#define BOARD_INITIOPINS_IO0_GPIO GPIO                 /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITIOPINS_IO0_GPIO_PIN_MASK (1U << 15U) /*!<@brief GPIO pin mask */
#define BOARD_INITIOPINS_IO0_PORT 0U                   /*!<@brief PORT device index: 0 */
#define BOARD_INITIOPINS_IO0_PIN 15U                   /*!<@brief PORT pin number */
#define BOARD_INITIOPINS_IO0_PIN_MASK (1U << 15U)      /*!<@brief PORT pin mask */
                                                       /* @} */

/*! @name PIO0_11 (number 8), IO1
  @{ */

/* Symbols to be used with GPIO driver */
#define BOARD_INITIOPINS_IO1_GPIO GPIO                 /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITIOPINS_IO1_GPIO_PIN_MASK (1U << 11U) /*!<@brief GPIO pin mask */
#define BOARD_INITIOPINS_IO1_PORT 0U                   /*!<@brief PORT device index: 0 */
#define BOARD_INITIOPINS_IO1_PIN 11U                   /*!<@brief PORT pin number */
#define BOARD_INITIOPINS_IO1_PIN_MASK (1U << 11U)      /*!<@brief PORT pin mask */
                                                       /* @} */

/*! @name PIO0_10 (number 9), IO2
  @{ */

/* Symbols to be used with GPIO driver */
#define BOARD_INITIOPINS_IO2_GPIO GPIO                 /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITIOPINS_IO2_GPIO_PIN_MASK (1U << 10U) /*!<@brief GPIO pin mask */
#define BOARD_INITIOPINS_IO2_PORT 0U                   /*!<@brief PORT device index: 0 */
#define BOARD_INITIOPINS_IO2_PIN 10U                   /*!<@brief PORT pin number */
#define BOARD_INITIOPINS_IO2_PIN_MASK (1U << 10U)      /*!<@brief PORT pin mask */
                                                       /* @} */

/*! @name PIO0_20 (number 15), IO3
  @{ */

/* Symbols to be used with GPIO driver */
#define BOARD_INITIOPINS_IO3_GPIO GPIO                 /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITIOPINS_IO3_GPIO_PIN_MASK (1U << 20U) /*!<@brief GPIO pin mask */
#define BOARD_INITIOPINS_IO3_PORT 0U                   /*!<@brief PORT device index: 0 */
#define BOARD_INITIOPINS_IO3_PIN 20U                   /*!<@brief PORT pin number */
#define BOARD_INITIOPINS_IO3_PIN_MASK (1U << 20U)      /*!<@brief PORT pin mask */
                                                       /* @} */

/*!
 * @brief Configures pin routing and optionally pin electrical features.
 *
 */
void BOARD_InitIOPins(void); /* Function assigned for the Cortex-M0P */

#if defined(__cplusplus)
}
#endif

/*!
 * @}
 */
#endif /* _PIN_MUX_H_ */

/***********************************************************************************************************************
 * EOF
 **********************************************************************************************************************/