/* Board */
#include "clock_config.h"
#include "pin_mux.h"

/* SDK drivers */
#include "fsl_clock.h"
#include "fsl_dac.h"
#include "fsl_power.h"

/* Private */
#include "app_dac.h"

#define APP_DAC_REG_OFFSET_CTRL (0x00U)
#define APP_DAC_REG_OFFSET_DATA (0x01U)

#define APP_DAC_CTRL_BIAS_Pos (8U)
#define APP_DAC_CTRL_BIAS_Msk (1U << APP_DAC_CTRL_BIAS_Pos)

static inline uint16_t app_dac_read_reg_ctrl(void);
static inline uint16_t app_dac_read_reg_data(void);
static inline void     app_dac_write_reg_ctrl(uint16_t data);
static inline void     app_dac_write_reg_data(uint16_t data);

void app_dac_init(void) {
    POWER_DisablePD(kPDRUNCFG_PD_DAC0);
    CLOCK_EnableClock(kCLOCK_Dac);

    RESET_PeripheralReset(kDAC0_RST_N_SHIFT_RSTn);

    DAC0->CR   = 0UL;
    DAC0->CTRL = 0UL;
}

uint16_t app_dac_module_reg_read(uint8_t addr) {
    uint16_t ret = 0x5555;

    switch (addr) {
        case APP_DAC_REG_OFFSET_CTRL:
            ret = app_dac_read_reg_ctrl();
            break;
        case APP_DAC_REG_OFFSET_DATA:
            ret = app_dac_read_reg_data();
            break;
        default:
            break;
    }

    return ret;
}

void app_dac_module_reg_write(uint8_t addr, uint16_t data) {
    switch (addr) {
        case APP_DAC_REG_OFFSET_CTRL:
            app_dac_write_reg_ctrl(data);
            break;
        case APP_DAC_REG_OFFSET_DATA:
            app_dac_write_reg_data(data);
            break;
        default:
            break;
    }
}

static inline uint16_t app_dac_read_reg_ctrl(void) {
    uint16_t ret = 0x0000U;

    if (DAC0->CR & DAC_CR_BIAS_MASK) {
        ret |= APP_DAC_CTRL_BIAS_Msk;
    }

    return ret;
}

static inline uint16_t app_dac_read_reg_data(void) {
    return ((DAC0->CR & DAC_CR_VALUE_MASK) >> DAC_CR_VALUE_SHIFT);
}

static inline void app_dac_write_reg_ctrl(uint16_t data) {
    if (data & APP_DAC_CTRL_BIAS_Msk) {
        DAC0->CR |= DAC_CR_BIAS_MASK;
    } else {
        DAC0->CR &= ~DAC_CR_BIAS_MASK;
    }
}

static inline void app_dac_write_reg_data(uint16_t data) {
    uint32_t cr = DAC0->CR;

    cr &= ~DAC_CR_VALUE_MASK;
    cr |= DAC_CR_VALUE(data);

    DAC0->CR = cr;
}