generated from Embedded_Projects/MPyATE_Template
160 lines
4.9 KiB
C
160 lines
4.9 KiB
C
/* SDK drivers */
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#include "fsl_clock.h"
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#include "fsl_usart.h"
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/* App */
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#include "app_uart.h"
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#define APP_UART_REG_OFFSET_CFG (0x00U)
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#define APP_UART_REG_OFFSET_STAT (0x01U)
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#define APP_UART_REG_OFFSET_FIFO (0x02U)
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#define APP_UART_REG_CFG_EN_Pos (15U)
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#define APP_UART_REG_CFG_EN_Msk (1U << APP_UART_REG_CFG_EN_Pos)
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#define APP_UART_REG_CFG_BAUD_Pos (0U)
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#define APP_UART_REG_CFG_BAUD_Msk (0x0FU << APP_UART_REG_CFG_BAUD_Pos)
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typedef struct {
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uint8_t mul;
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uint8_t osr;
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uint8_t brg;
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} app_uart_clk_preset_t;
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typedef enum {
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APP_UART_BAUD_2400 = 0U,
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APP_UART_BAUD_4800,
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APP_UART_BAUD_9600,
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APP_UART_BAUD_19200,
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APP_UART_BAUD_38400,
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APP_UART_BAUD_57600,
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APP_UART_BAUD_115200,
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APP_UART_BAUD_230400,
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APP_UART_BAUD_460800,
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APP_UART_BAUD_921600,
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APP_UART_BAUD_END,
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} app_uart_baud_t;
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/* Script generated, do not edit. */
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static const app_uart_clk_preset_t s_clk_preset[] = {
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[APP_UART_BAUD_2400] = {.mul = 0xaa, .osr = 0x0e, .brg = 0xf9}, /* Actual: 2400.00 baud/s, err: 0.00% */
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[APP_UART_BAUD_4800] = {.mul = 0xaa, .osr = 0x0e, .brg = 0x7c}, /* Actual: 4800.00 baud/s, err: 0.00% */
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[APP_UART_BAUD_9600] = {.mul = 0x08, .osr = 0x0e, .brg = 0x64}, /* Actual: 9599.82 baud/s, err: 0.00% */
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[APP_UART_BAUD_19200] = {.mul = 0xcb, .osr = 0x0e, .brg = 0x1c}, /* Actual: 19198.92 baud/s, err: 0.01% */
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[APP_UART_BAUD_38400] = {.mul = 0xcc, .osr = 0x06, .brg = 0x1e}, /* Actual: 38402.46 baud/s, err: -0.01% */
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[APP_UART_BAUD_57600] = {.mul = 0xcb, .osr = 0x04, .brg = 0x1c}, /* Actual: 57596.75 baud/s, err: 0.01% */
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[APP_UART_BAUD_115200] = {.mul = 0x18, .osr = 0x06, .brg = 0x10}, /* Actual: 115207.37 baud/s, err: -0.01% */
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[APP_UART_BAUD_230400] = {.mul = 0xa0, .osr = 0x09, .brg = 0x03}, /* Actual: 230421.69 baud/s, err: -0.01% */
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[APP_UART_BAUD_460800] = {.mul = 0xa0, .osr = 0x09, .brg = 0x01}, /* Actual: 460843.37 baud/s, err: -0.01% */
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[APP_UART_BAUD_921600] = {.mul = 0xa0, .osr = 0x09, .brg = 0x00}, /* Actual: 921686.75 baud/s, err: -0.01% */
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};
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static volatile app_uart_baud_t s_cfg_baud; /* Register interface configuration */
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static volatile uint8_t s_rx_fifo[16];
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static volatile uint8_t s_rx_fifo_w_ptr; /* Incremented by USART RXDAT read */
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static volatile uint8_t s_rx_fifo_r_ptr; /* Incremented by I2C RX FIFO read */
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static volatile uint8_t s_tx_fifo[16];
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static volatile uint8_t s_tx_fifo_w_ptr; /* Incremented by I2C TX FIFO write */
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static volatile uint8_t s_tx_fifo_r_ptr; /* Incremented by USART TXDAT write */
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static inline void app_uart_apply_clock_preset(const app_uart_clk_preset_t *preset);
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static inline uint16_t app_uart_read_reg_cfg(void);
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static inline void app_uart_write_reg_cfg(uint16_t data);
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static inline uint16_t app_uart_read_reg_stat(void);
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void app_uart_init(void) {
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/* Main Clock -> FRG -> USART0 */
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CLOCK_Select(kFRG0_Clk_From_MainClk);
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CLOCK_Select(kUART0_Clk_From_Frg0Clk);
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CLOCK_EnableClock(kCLOCK_Uart0);
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RESET_PeripheralReset(kUART0_RST_N_SHIFT_RSTn);
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s_cfg_baud = APP_UART_BAUD_115200;
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s_rx_fifo_r_ptr = 0x00U;
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s_rx_fifo_w_ptr = 0x00U;
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s_tx_fifo_r_ptr = 0x00U;
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s_tx_fifo_w_ptr = 0x00U;
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USART0->CFG = USART_CFG_DATALEN(1); /* 8N1, No parity, No HW FC */
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USART0->CTL = 0x00U;
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app_uart_apply_clock_preset(&s_clk_preset[s_cfg_baud]);
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}
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uint16_t app_uart_module_reg_read(uint8_t addr) {
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uint16_t ret = 0x5555U;
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switch (addr) {
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case APP_UART_REG_OFFSET_CFG:
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ret = app_uart_read_reg_cfg();
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break;
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case APP_UART_REG_OFFSET_STAT:
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ret = app_uart_read_reg_stat();
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break;
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default:
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break;
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}
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return ret;
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}
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void app_uart_module_reg_write(uint8_t addr, uint16_t data) {
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switch (addr) {
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case APP_UART_REG_OFFSET_CFG:
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app_uart_write_reg_cfg(data);
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break;
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default:
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break;
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}
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}
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static inline void app_uart_apply_clock_preset(const app_uart_clk_preset_t *preset) {
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SYSCON->FRG[0].FRGDIV = 0xFFU;
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SYSCON->FRG[0].FRGMULT = preset->mul;
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USART0->BRG = preset->brg;
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USART0->OSR = preset->osr;
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}
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static inline uint16_t app_uart_read_reg_cfg(void) {
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/* CFG register fields:
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* EN: [15]
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* BAUD: [3:0]
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*/
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uint16_t ret = 0x0000;
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ret |= (s_cfg_baud << APP_UART_REG_CFG_BAUD_Pos) & APP_UART_REG_CFG_BAUD_Msk;
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return ret;
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}
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static inline void app_uart_write_reg_cfg(uint16_t data) {
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app_uart_baud_t baud = (data & APP_UART_REG_CFG_BAUD_Msk) >> APP_UART_REG_CFG_BAUD_Pos;
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bool uart_en = (data & APP_UART_REG_CFG_EN_Msk) >> APP_UART_REG_CFG_EN_Pos;
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if (uart_en) {
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/* -- TODO: Enable UART -- */
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return;
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}
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/* Baud rate can't be changed when UART is enabled */
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if (baud >= APP_UART_BAUD_END) {
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return;
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}
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app_uart_apply_clock_preset(&s_clk_preset[baud]);
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s_cfg_baud = baud;
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}
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static inline uint16_t app_uart_read_reg_stat(void) {
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uint16_t ret = 0x0000;
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return ret;
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} |