generated from Embedded_Projects/NUC200_Template
113 lines
3.2 KiB
C
113 lines
3.2 KiB
C
#include "pn512.h"
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/**
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* About register bits
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* Higher 8 bits is page number, e.g. 0x8100 -> Page 1 addr 0
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* Bit 15 is always 1 since we use page select.
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*/
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#define PN512_REG_COMMAND 0x8001U
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#define PN512_REG_PAGE_SELECT 0x8000U
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#define PN512_REG_VERSION 0x8337U
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/**
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* Command List
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*/
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#define PN512_CMD_SOFT_RESET 0x0F
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#define PN512_REG_PAGE(x) ((uint8_t)(x >> 0x08U))
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#define PN512_REG_ADDR(x) ((uint8_t)(x & 0xFFU))
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/**
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* @brief Switch register page to the same page as
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* specified by `reg`.
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*
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* @param nfc: pointer to pn512_t struct
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* @param reg: 16bit register to be set, `PN512_REG_XXXX`
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* @return pn512_ret_t: PN512_OK for success, PN512_FAIL for error.
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*/
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static pn512_ret_t pn512_switch_register_page(pn512_t *nfc, uint16_t reg) {
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pn512_ret_t ret = PN512_OK;
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if (PN512_REG_PAGE(reg) != nfc->info.current_page) {
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/* Select page */
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uint8_t payload = PN512_REG_PAGE(reg);
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ret = nfc->ops.write(nfc->ops_handle, PN512_REG_ADDR(PN512_REG_PAGE_SELECT), &payload, 1U);
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if (ret != PN512_OK) return ret;
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nfc->info.current_page = PN512_REG_PAGE(reg);
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}
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return ret;
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}
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/**
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* @brief Read a register, except FIFO register.
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*
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* @param nfc: pointer to pn512_t struct
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* @param reg: 16bit register to be set, `PN512_REG_XXXX`
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* @param value: [OUT] value to be read
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* @return pn512_ret_t: PN512_OK for success, PN512_FAIL for error.
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*/
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static pn512_ret_t pn512_read_register(pn512_t *nfc, uint16_t reg, uint8_t *value) {
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pn512_ret_t ret = PN512_OK;
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ret = pn512_switch_register_page(nfc, reg);
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if (ret != PN512_OK) return ret;
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/* Issue read operation */
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ret = nfc->ops.read(nfc->ops_handle, PN512_REG_ADDR(reg), value, 1U);
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return ret;
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}
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/**
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* @brief Write a register, except FIFO register.
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*
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* @param nfc: pointer to pn512_t struct
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* @param reg: 16bit register to be set, `PN512_REG_XXXX`
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* @param value: value to be written
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* @return pn512_ret_t: PN512_OK for success, PN512_FAIL for error.
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*/
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static pn512_ret_t pn512_write_register(pn512_t *nfc, uint16_t reg, uint8_t value) {
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pn512_ret_t ret = PN512_OK;
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ret = pn512_switch_register_page(nfc, reg);
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if (ret != PN512_OK) return ret;
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/* Issue read operation */
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ret = nfc->ops.write(nfc->ops_handle, PN512_REG_ADDR(reg), &value, 1U);
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return ret;
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}
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/**
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* @brief Soft reset PN512 by sending an SoftReset command.
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*
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* @param nfc: pointer to pn512_t struct
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* @return pn512_ret_t: PN512_OK for success, PN512_FAIL for error.
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*/
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static pn512_ret_t pn512_soft_reset(pn512_t *nfc) {
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return pn512_write_register(nfc, PN512_REG_COMMAND, PN512_CMD_SOFT_RESET);
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}
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pn512_ret_t pn512_init(pn512_t *nfc) {
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pn512_ret_t ret = PN512_OK;
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/* Reset chip */
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ret = nfc->ops.reset(nfc->ops_handle);
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if (ret != PN512_OK) return ret;
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/* Set current page to 0 */
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uint8_t payload = 0x80;
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ret = nfc->ops.write(nfc->ops_handle, PN512_REG_ADDR(PN512_REG_PAGE_SELECT), &payload, 1U);
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if (ret != PN512_OK) return ret;
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nfc->info.current_page = 0; /* Synchronize status */
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ret = pn512_soft_reset(nfc);
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if (ret != PN512_OK) return ret;
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// Read chip version.
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ret = pn512_read_register(nfc, PN512_REG_VERSION, &nfc->info.version);
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return ret;
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} |