461 lines
23 KiB
C
461 lines
23 KiB
C
/**************************************************************************//**
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* @file UART.h
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* @version V3.0
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* $Revision: 27 $
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* $Date: 15/06/04 11:16a $
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* @brief UART Interface Controller Driver Header File
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*
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* @note
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* SPDX-License-Identifier: Apache-2.0
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* Copyright (C) 2011 Nuvoton Technology Corp. All rights reserved.
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*
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******************************************************************************/
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#ifndef __UART_H__
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#define __UART_H__
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/** @addtogroup Standard_Driver Standard Driver
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@{
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*/
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/** @addtogroup UART_Driver UART Driver
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@{
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*/
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/** @addtogroup UART_EXPORTED_CONSTANTS UART Exported Constants
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@{
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*/
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/*---------------------------------------------------------------------------------------------------------*/
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/* UART FIFO size constants definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define UART0_FIFO_SIZE 64 /*!< UART0 supports separated receive/transmit 64/64 bytes entry FIFO */
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#define UART1_FIFO_SIZE 16 /*!< UART1 supports separated receive/transmit 16/16 bytes entry FIFO */
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#define UART2_FIFO_SIZE 16 /*!< UART2 supports separated receive/transmit 16/16 bytes entry FIFO */
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/*---------------------------------------------------------------------------------------------------------*/
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/* UA_FCR constants definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define UART_FCR_RFITL_1BYTE (0x0 << UART_FCR_RFITL_Pos) /*!< UA_FCR setting to set RX FIFO Trigger Level to 1 byte */
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#define UART_FCR_RFITL_4BYTES (0x1 << UART_FCR_RFITL_Pos) /*!< UA_FCR setting to set RX FIFO Trigger Level to 4 bytes */
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#define UART_FCR_RFITL_8BYTES (0x2 << UART_FCR_RFITL_Pos) /*!< UA_FCR setting to set RX FIFO Trigger Level to 8 bytes */
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#define UART_FCR_RFITL_14BYTES (0x3 << UART_FCR_RFITL_Pos) /*!< UA_FCR setting to set RX FIFO Trigger Level to 14 bytes */
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#define UART_FCR_RFITL_30BYTES (0x4 << UART_FCR_RFITL_Pos) /*!< UA_FCR setting to set RX FIFO Trigger Level to 30 bytes */
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#define UART_FCR_RFITL_46BYTES (0x5 << UART_FCR_RFITL_Pos) /*!< UA_FCR setting to set RX FIFO Trigger Level to 46 bytes */
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#define UART_FCR_RFITL_62BYTES (0x6 << UART_FCR_RFITL_Pos) /*!< UA_FCR setting to set RX FIFO Trigger Level to 62 bytes */
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#define UART_FCR_RTS_TRI_LEV_1BYTE (0x0 << UART_FCR_RTS_TRI_LEV_Pos) /*!< UA_FCR setting to set RTS Trigger Level to 1 byte */
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#define UART_FCR_RTS_TRI_LEV_4BYTES (0x1 << UART_FCR_RTS_TRI_LEV_Pos) /*!< UA_FCR setting to set RTS Trigger Level to 4 bytes */
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#define UART_FCR_RTS_TRI_LEV_8BYTES (0x2 << UART_FCR_RTS_TRI_LEV_Pos) /*!< UA_FCR setting to set RTS Trigger Level to 8 bytes */
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#define UART_FCR_RTS_TRI_LEV_14BYTES (0x3 << UART_FCR_RTS_TRI_LEV_Pos) /*!< UA_FCR setting to set RTS Trigger Level to 14 bytes */
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#define UART_FCR_RTS_TRI_LEV_30BYTES (0x4 << UART_FCR_RTS_TRI_LEV_Pos) /*!< UA_FCR setting to set RTS Trigger Level to 30 bytes */
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#define UART_FCR_RTS_TRI_LEV_46BYTES (0x5 << UART_FCR_RTS_TRI_LEV_Pos) /*!< UA_FCR setting to set RTS Trigger Level to 46 bytes */
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#define UART_FCR_RTS_TRI_LEV_62BYTES (0x6 << UART_FCR_RTS_TRI_LEV_Pos) /*!< UA_FCR setting to set RTS Trigger Level to 62 bytes */
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/*---------------------------------------------------------------------------------------------------------*/
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/* UA_LCR constants definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define UART_WORD_LEN_5 (0) /*!< UA_LCR setting to set UART word length to 5 bits */
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#define UART_WORD_LEN_6 (1) /*!< UA_LCR setting to set UART word length to 6 bits */
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#define UART_WORD_LEN_7 (2) /*!< UA_LCR setting to set UART word length to 7 bits */
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#define UART_WORD_LEN_8 (3) /*!< UA_LCR setting to set UART word length to 8 bits */
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#define UART_PARITY_NONE (0x0 << UART_LCR_PBE_Pos) /*!< UA_LCR setting to set UART as no parity */
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#define UART_PARITY_ODD (0x1 << UART_LCR_PBE_Pos) /*!< UA_LCR setting to set UART as odd parity */
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#define UART_PARITY_EVEN (0x3 << UART_LCR_PBE_Pos) /*!< UA_LCR setting to set UART as even parity */
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#define UART_PARITY_MARK (0x5 << UART_LCR_PBE_Pos) /*!< UA_LCR setting to keep parity bit as '1' */
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#define UART_PARITY_SPACE (0x7 << UART_LCR_PBE_Pos) /*!< UA_LCR setting to keep parity bit as '0' */
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#define UART_STOP_BIT_1 (0x0 << UART_LCR_NSB_Pos) /*!< UA_LCR setting for one stop bit */
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#define UART_STOP_BIT_1_5 (0x1 << UART_LCR_NSB_Pos) /*!< UA_LCR setting for 1.5 stop bit when 5-bit word length */
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#define UART_STOP_BIT_2 (0x1 << UART_LCR_NSB_Pos) /*!< UA_LCR setting for two stop bit when 6, 7, 8-bit word length */
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/*---------------------------------------------------------------------------------------------------------*/
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/* UART RTS LEVEL TRIGGER constants definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define UART_RTS_IS_LOW_LEV_ACTIVE (0x1 << UART_MCR_LEV_RTS_Pos) /*!< Set RTS is Low Level Active */
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#define UART_RTS_IS_HIGH_LEV_ACTIVE (0x0 << UART_MCR_LEV_RTS_Pos) /*!< Set RTS is High Level Active */
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/*---------------------------------------------------------------------------------------------------------*/
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/* UA_IRCR constants definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define UART_IRCR_TX_SELECT (0x1 << UART_IRCR_TX_SELECT_Pos) /*!< Set IrDA function Tx mode */
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#define UART_IRCR_RX_SELECT (0x0 << UART_IRCR_TX_SELECT_Pos) /*!< Set IrDA function Rx mode */
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/*---------------------------------------------------------------------------------------------------------*/
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/* UA_FUNC_SEL constants definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define UART_FUNC_SEL_UART (0x0 << UART_FUN_SEL_FUN_SEL_Pos) /*!< UA_FUNC_SEL setting to set UART Function (Default) */
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#define UART_FUNC_SEL_LIN (0x1 << UART_FUN_SEL_FUN_SEL_Pos) /*!< UA_FUNC_SEL setting to set LIN Function */
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#define UART_FUNC_SEL_IrDA (0x2 << UART_FUN_SEL_FUN_SEL_Pos) /*!< UA_FUNC_SEL setting to set IrDA Function */
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#define UART_FUNC_SEL_RS485 (0x3 << UART_FUN_SEL_FUN_SEL_Pos) /*!< UA_FUNC_SEL setting to set RS485 Function */
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/*---------------------------------------------------------------------------------------------------------*/
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/* UA_LIN_CTL constants definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define UART_LIN_CTL_LINS_EN (0x1UL << UART_LIN_CTL_LINS_EN_Pos) /*!< UA_LIN_CTL setting to set LIN Slave Mode Enable */
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#define UART_LIN_CTL_LINS_HDET_EN (0x1UL << UART_LIN_CTL_LINS_HDET_EN_Pos) /*!< UA_LIN_CTL setting to set LIN Slave Header Detection Enable */
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#define UART_LIN_CTL_LINS_ARS_EN (0x1UL << UART_LIN_CTL_LINS_ARS_EN_Pos) /*!< UA_LIN_CTL setting to set LIN Slave Automatic Resynchronization Mode Enable */
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#define UART_LIN_CTL_LINS_DUM_EN (0x1UL << UART_LIN_CTL_LINS_DUM_EN_Pos) /*!< UA_LIN_CTL setting to set LIN Slave Divider Update Method Enable */
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#define UART_LIN_CTL_LIN_MUTE_EN (0x1UL << UART_LIN_CTL_LIN_MUTE_EN_Pos) /*!< UA_LIN_CTL setting to set LIN Mute Mode Enable */
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#define UART_LIN_CTL_LIN_SHD (0x1UL << UART_LIN_CTL_LIN_SHD_Pos) /*!< UA_LIN_CTL setting to set LIN TX Send Header Enable */
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#define UART_LIN_CTL_LIN_IDPEN (0x1UL << UART_LIN_CTL_LIN_IDPEN_Pos) /*!< UA_LIN_CTL setting to set LIN ID Parity Enable */
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#define UART_LIN_CTL_LIN_BKDET_EN (0x1UL << UART_LIN_CTL_LIN_BKDET_EN_Pos) /*!< UA_LIN_CTL setting to set LIN Break Detection Enable */
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#define UART_LIN_CTL_LIN_RX_DIS (0x1UL << UART_LIN_CTL_LIN_RX_DIS_Pos) /*!< UA_LIN_CTL setting to set LIN Receiver Disable */
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#define UART_LIN_CTL_BIT_ERR_EN (0x1UL << UART_LIN_CTL_BIT_ERR_EN_Pos) /*!< UA_LIN_CTL setting to set Bit Error Detect Enable */
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#define UART_LIN_CTL_LIN_BKFL(x) (((x)-1) << UART_LIN_CTL_LIN_BKFL_Pos) /*!< UA_LIN_CTL setting to set LIN Break Field Length, x = 10 ~ 15, default value is 12 */
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#define UART_LIN_CTL_LIN_BS_LEN(x) (((x)-1) << UART_LIN_CTL_LIN_BS_LEN_Pos)/*!< UA_LIN_CTL setting to set LIN Break/Sync Delimiter Length, x = 1 ~ 4 */
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#define UART_LIN_CTL_LIN_HEAD_SEL_BREAK (0x0UL << UART_LIN_CTL_LIN_HEAD_SEL_Pos) /*!< UA_LIN_CTL setting to set LIN Header Select to break field */
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#define UART_LIN_CTL_LIN_HEAD_SEL_BREAK_SYNC (0x1UL << UART_LIN_CTL_LIN_HEAD_SEL_Pos) /*!< UA_LIN_CTL setting to set LIN Header Select to break field and sync field */
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#define UART_LIN_CTL_LIN_HEAD_SEL_BREAK_SYNC_ID (0x2UL << UART_LIN_CTL_LIN_HEAD_SEL_Pos) /*!< UA_LIN_CTL setting to set LIN Header Select to break field, sync field and ID field*/
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#define UART_LIN_CTL_LIN_LIN_PID(x) ((x) << UART_LIN_CTL_LIN_PID_Pos) /*!< UA_LIN_CTL setting to set LIN PID value */
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/*---------------------------------------------------------------------------------------------------------*/
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/* UART BAUDRATE MODE constants definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define UART_BAUD_MODE0 (0) /*!< Set UART Baudrate Mode is Mode0 */
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#define UART_BAUD_MODE2 (UART_BAUD_DIV_X_EN_Msk | UART_BAUD_DIV_X_ONE_Msk) /*!< Set UART Baudrate Mode is Mode2 */
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/*@}*/ /* end of group UART_EXPORTED_CONSTANTS */
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/** @addtogroup UART_EXPORTED_FUNCTIONS UART Exported Functions
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@{
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*/
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/**
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* @brief Calculate UART baudrate mode0 divider
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*
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* @param[in] u32SrcFreq UART clock frequency
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* @param[in] u32BaudRate Baudrate of UART module
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*
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* @return UART baudrate mode0 divider
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*
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* @details This macro calculate UART baudrate mode0 divider.
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*/
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#define UART_BAUD_MODE0_DIVIDER(u32SrcFreq, u32BaudRate) ((((u32SrcFreq) + ((u32BaudRate)*8)) / (u32BaudRate) >> 4)-2)
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/**
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* @brief Calculate UART baudrate mode2 divider
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*
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* @param[in] u32SrcFreq UART clock frequency
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* @param[in] u32BaudRate Baudrate of UART module
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*
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* @return UART baudrate mode2 divider
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*
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* @details This macro calculate UART baudrate mode2 divider.
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*/
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#define UART_BAUD_MODE2_DIVIDER(u32SrcFreq, u32BaudRate) ((((u32SrcFreq) + ((u32BaudRate)/2)) / (u32BaudRate))-2)
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/**
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* @brief Write data
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*
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* @param[in] uart The pointer of the specified UART module.
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* @param[in] u8Data Data byte to transmit.
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*
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* @return None
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*
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* @details This macro write Data to Tx data register.
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*/
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#define UART_WRITE(uart, u8Data) ((uart)->THR = (u8Data))
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/**
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* @brief Read data
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*
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* @param[in] uart The pointer of the specified UART module.
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*
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* @return The oldest data byte in RX FIFO.
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*
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* @details This macro read Rx data register.
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*/
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#define UART_READ(uart) ((uart)->RBR)
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/**
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* @brief Get Tx empty
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*
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* @param[in] uart The pointer of the specified UART module.
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*
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* @retval 0 Tx FIFO is not empty
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* @retval >=1 Tx FIFO is empty
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*
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* @details This macro get Tx empty register value.
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*/
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#define UART_GET_TX_EMPTY(uart) ((uart)->FSR & UART_FSR_TX_EMPTY_Msk)
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/**
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* @brief Get Rx empty
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*
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* @param[in] uart The pointer of the specified UART module.
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*
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* @retval 0 Rx FIFO is not empty
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* @retval >=1 Rx FIFO is empty
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*
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* @details This macro get Rx empty register value.
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*/
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#define UART_GET_RX_EMPTY(uart) ((uart)->FSR & UART_FSR_RX_EMPTY_Msk)
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/**
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* @brief Check specified uart port transmission is over.
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*
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* @param[in] uart The pointer of the specified UART module.
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*
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* @retval 0 Transmission is not over.
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* @retval 1 Transmission is over.
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*
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* @details This macro return if Tx FIFO is empty and specified uart port transmission is over nor not.
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*/
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#define UART_IS_TX_EMPTY(uart) (((uart)->FSR & UART_FSR_TE_FLAG_Msk) >> UART_FSR_TE_FLAG_Pos)
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/**
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* @brief Wait specified uart port transmission is over
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*
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* @param[in] uart The pointer of the specified UART module.
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*
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* @return None
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*
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* @details This macro wait specified uart port transmission is over.
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*/
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#define UART_WAIT_TX_EMPTY(uart) while(!((((uart)->FSR) & UART_FSR_TE_FLAG_Msk) >> UART_FSR_TE_FLAG_Pos))
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/**
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* @brief Check RX is ready or not
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*
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* @param[in] uart The pointer of the specified UART module.
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*
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* @retval 0 The number of bytes in the RX FIFO is less than the RFITL
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* @retval 1 The number of bytes in the RX FIFO equals or larger than RFITL
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*
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* @details This macro check receive data available interrupt flag is set or not.
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*/
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#define UART_IS_RX_READY(uart) (((uart)->ISR & UART_ISR_RDA_IF_Msk)>>UART_ISR_RDA_IF_Pos)
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/**
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* @brief Check TX FIFO is full or not
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*
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* @param[in] uart The pointer of the specified UART module.
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*
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* @retval 1 TX FIFO is full
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* @retval 0 TX FIFO is not full
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*
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* @details This macro check TX FIFO is full or not.
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*/
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#define UART_IS_TX_FULL(uart) (((uart)->FSR & UART_FSR_TX_FULL_Msk)>>UART_FSR_TX_FULL_Pos)
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/**
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* @brief Check RX FIFO is full or not
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*
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* @param[in] uart The pointer of the specified UART module.
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*
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* @retval 1 RX FIFO is full
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* @retval 0 RX FIFO is not full
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*
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* @details This macro check RX FIFO is full or not.
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*/
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#define UART_IS_RX_FULL(uart) (((uart)->FSR & UART_FSR_RX_FULL_Msk)>>UART_FSR_RX_FULL_Pos)
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/**
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* @brief Get Tx full register value
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*
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* @param[in] uart The pointer of the specified UART module.
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*
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* @retval 0 Tx FIFO is not full.
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* @retval >=1 Tx FIFO is full.
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*
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* @details This macro get Tx full register value.
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*/
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#define UART_GET_TX_FULL(uart) ((uart)->FSR & UART_FSR_TX_FULL_Msk)
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/**
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* @brief Get Rx full register value
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*
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* @param[in] uart The pointer of the specified UART module.
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*
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* @retval 0 Rx FIFO is not full.
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* @retval >=1 Rx FIFO is full.
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*
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* @details This macro get Rx full register value.
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*/
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#define UART_GET_RX_FULL(uart) ((uart)->FSR & UART_FSR_RX_FULL_Msk)
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/**
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* @brief Enable specified UART interrupt
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*
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* @param[in] uart The pointer of the specified UART module.
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* @param[in] u32eIntSel Interrupt type select
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* - UART_IER_LIN_IEN_Msk : Lin bus interrupt
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* - UART_IER_WAKE_EN_Msk : Wakeup interrupt
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* - UART_IER_BUF_ERR_IEN_Msk : Buffer Error interrupt
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* - UART_IER_TOUT_IEN_Msk : Rx time-out interrupt
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* - UART_IER_MODEM_IEN_Msk : Modem interrupt
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* - UART_IER_RLS_IEN_Msk : Rx Line status interrupt
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* - UART_IER_THRE_IEN_Msk : Tx empty interrupt
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* - UART_IER_RDA_IEN_Msk : Rx ready interrupt
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*
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* @return None
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*
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* @details This macro enable specified UART interrupt.
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*/
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#define UART_ENABLE_INT(uart, u32eIntSel) ((uart)->IER |= (u32eIntSel))
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/**
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* @brief Disable specified UART interrupt
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*
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* @param[in] uart The pointer of the specified UART module.
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* @param[in] u32eIntSel Interrupt type select
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* - UART_IER_LIN_IEN_Msk : Lin bus interrupt
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* - UART_IER_WAKE_EN_Msk : Wakeup interrupt
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* - UART_IER_BUF_ERR_IEN_Msk : Buffer Error interrupt
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* - UART_IER_TOUT_IEN_Msk : Rx time-out interrupt
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* - UART_IER_MODEM_IEN_Msk : Modem interrupt
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* - UART_IER_RLS_IEN_Msk : Rx Line status interrupt
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* - UART_IER_THRE_IEN_Msk : Tx empty interrupt
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* - UART_IER_RDA_IEN_Msk : Rx ready interrupt
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* @return None
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*
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* @details This macro enable specified UART interrupt.
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*/
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#define UART_DISABLE_INT(uart, u32eIntSel) ((uart)->IER &= ~ (u32eIntSel))
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/**
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* @brief Get specified interrupt indicator status
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*
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* @param[in] uart The pointer of the specified UART module.
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* @param[in] u32eIntTypeFlag Interrupt Type Flag, should be
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* - UART_ISR_HW_BUF_ERR_INT_Msk : In DMA Mode, Buffer Error Interrupt Indicator
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* - UART_ISR_HW_TOUT_INT_Msk : In DMA Mode, Rx Time-out Interrupt Indicator
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* - UART_ISR_HW_MODEM_INT_Msk : In DMA Mode, MODEM Status Interrupt Indicator
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* - UART_ISR_HW_RLS_INT_Msk : In DMA Mode, Rx Line Status Interrupt Indicator
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* - UART_ISR_HW_BUF_ERR_IF_Msk : In DMA Mode, Buffer Error Interrupt Flag
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* - UART_ISR_HW_TOUT_IF_Msk : In DMA Mode, Rx Time-out Interrupt Flag
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* - UART_ISR_HW_MODEM_IF_Msk : In DMA Mode, MODEM Status Interrupt Flag
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* - UART_ISR_HW_RLS_IF_Msk : In DMA Mode, Rx Line Status Interrupt Flag
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* - UART_ISR_LIN_INT_Msk : LIN Bus Interrupt Indicator
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* - UART_ISR_BUF_ERR_INT_Msk : Buffer Error Interrupt Indicator
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* - UART_ISR_TOUT_INT_Msk : Rx Time-out Interrupt Indicator
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* - UART_ISR_MODEM_INT_Msk : MODEM Status Interrupt Indicator
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* - UART_ISR_RLS_INT_Msk : Rx Line Status Interrupt Indicator
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* - UART_ISR_THRE_INT_Msk : Tx Empty Interrupt Indicator
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* - UART_ISR_RDA_INT_Msk : Rx Ready Interrupt Indicator
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* - UART_ISR_LIN_IF_Msk : LIN Bus Interrupt Flag
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* - UART_ISR_BUF_ERR_IF_Msk : Buffer Error Interrupt Flag
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* - UART_ISR_TOUT_IF_Msk : Rx Time-out Interrupt Flag
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* - UART_ISR_MODEM_IF_Msk : MODEM Status Interrupt Flag
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* - UART_ISR_RLS_IF_Msk : Rx Line Status Interrupt Flag
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* - UART_ISR_THRE_IF_Msk : Tx Empty Interrupt Flag
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* - UART_ISR_RDA_IF_Msk : Rx Ready Interrupt Flag
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*
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* @retval 0 The specified interrupt is not happened.
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* @retval 1 The specified interrupt is happened.
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*
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* @details This macro get specified interrupt flag or interrupt indicator status.
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*/
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#define UART_GET_INT_FLAG(uart,u32eIntTypeFlag) (((uart)->ISR & (u32eIntTypeFlag))?1:0)
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/**
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* @brief Set RTS pin to low
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*
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* @param[in] uart The pointer of the specified UART module.
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*
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* @return None
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*
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* @details This macro set RTS pin to low.
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*/
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__STATIC_INLINE void UART_CLEAR_RTS(UART_T* uart)
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{
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(uart)->MCR |= UART_MCR_LEV_RTS_Msk;
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(uart)->MCR &= ~UART_MCR_RTS_Msk;
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}
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/**
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* @brief Set RTS pin to high
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*
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* @param[in] uart The pointer of the specified UART module.
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*
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* @return None
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*
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* @details This macro set RTS pin to high.
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*/
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__STATIC_INLINE void UART_SET_RTS(UART_T* uart)
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{
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(uart)->MCR |= UART_MCR_LEV_RTS_Msk | UART_MCR_RTS_Msk;
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}
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/**
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* @brief Clear RS-485 Address Byte Detection Flag
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*
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|
* @param[in] uart The pointer of the specified UART module.
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*
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* @return None
|
|
*
|
|
* @details This macro clear RS-485 address byte detection flag.
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*/
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#define UART_RS485_CLEAR_ADDR_FLAG(uart) ((uart)->FSR = UART_FSR_RS485_ADD_DETF_Msk)
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/**
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|
* @brief Get RS-485 Address Byte Detection Flag
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|
*
|
|
* @param[in] uart The pointer of the specified UART module.
|
|
*
|
|
* @retval 0 Receiver detects a data that is not an address bit.
|
|
* @retval 1 Receiver detects a data that is an address bit.
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|
*
|
|
* @details This macro get RS-485 address byte detection flag.
|
|
*/
|
|
#define UART_RS485_GET_ADDR_FLAG(uart) (((uart)->FSR & UART_FSR_RS485_ADD_DETF_Msk) >> UART_FSR_RS485_ADD_DETF_Pos)
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|
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void UART_ClearIntFlag(UART_T* uart , uint32_t u32InterruptFlag);
|
|
void UART_Close(UART_T* uart);
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|
void UART_DisableFlowCtrl(UART_T* uart);
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|
void UART_DisableInt(UART_T* uart, uint32_t u32InterruptFlag);
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|
void UART_EnableFlowCtrl(UART_T* uart);
|
|
void UART_EnableInt(UART_T* uart, uint32_t u32InterruptFlag);
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|
void UART_Open(UART_T* uart, uint32_t u32baudrate);
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|
uint32_t UART_Read(UART_T* uart, uint8_t *pu8RxBuf, uint32_t u32ReadBytes);
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|
void UART_SetLine_Config(UART_T* uart, uint32_t u32baudrate, uint32_t u32data_width, uint32_t u32parity, uint32_t u32stop_bits);
|
|
void UART_SetTimeoutCnt(UART_T* uart, uint32_t u32TOC);
|
|
void UART_SelectIrDAMode(UART_T* uart, uint32_t u32Buadrate, uint32_t u32Direction);
|
|
void UART_SelectRS485Mode(UART_T* uart, uint32_t u32Mode, uint32_t u32Addr);
|
|
void UART_SelectLINMode(UART_T* uart, uint32_t u32Mode, uint32_t u32BreakLength);
|
|
uint32_t UART_Write(UART_T* uart, uint8_t *pu8TxBuf, uint32_t u32WriteBytes);
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|
|
|
|
|
/*@}*/ /* end of group UART_EXPORTED_FUNCTIONS */
|
|
|
|
/*@}*/ /* end of group UART_Driver */
|
|
|
|
/*@}*/ /* end of group Device_Driver */
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif //__UART_H__
|
|
|
|
/*** (C) COPYRIGHT 2013 Nuvoton Technology Corp. ***/
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