NXP NFC Reader Library
v4.040.05.011646
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Internal definitions. More...
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Macros | |
#define | PHHAL_HW_RC663_I18000P3M3_M_MANCHESTER_2 0x02U |
ISO 18000p3m3 Sub-carrier type. | |
#define | PHHAL_HW_RC663_I18000P3M3_SW_T1_MAX_US 78U |
ISO 18000p3m3 Timeout constants. | |
#define | PHHAL_HW_RC663_I18000P3M3_CMD_NEXT_SLOT 0x00 |
ISO 18000p3m3 Command Codes. | |
Functions | |
phStatus_t | phhalHw_Rc663_WriteFifo (phhalHw_Rc663_DataParams_t *pDataParams, uint8_t *pData, uint16_t wLength, uint16_t *pBytesWritten) |
Validate the FIFO Buffer space in Rc663 and perform phhalHw_Rc663_WriteData. More... | |
phStatus_t | phhalHw_Rc663_ReadFifo (phhalHw_Rc663_DataParams_t *pDataParams, uint16_t wDataSize, uint8_t *pData, uint16_t *pLength) |
Read Data from Fifo buffer. More... | |
phStatus_t | phhalHw_Rc663_FlushFifo (phhalHw_Rc663_DataParams_t *pDataParams) |
Clear Fifo buffer. More... | |
phStatus_t | phhalHw_Rc663_WriteData (phhalHw_Rc663_DataParams_t *pDataParams, uint8_t bAddress, uint8_t *pData, uint16_t wLength) |
Perform actual Write to Rc663 FIFO with the data passed. More... | |
phStatus_t | phhalHw_Rc663_ReadData (phhalHw_Rc663_DataParams_t *pDataParams, uint8_t bAddress, uint16_t wLength, uint8_t *pData) |
Perform actual read from Rc663 FIFO for the address passed. More... | |
phStatus_t | phhalHw_Rc663_SetCardMode (phhalHw_Rc663_DataParams_t *pDataParams, uint16_t wTxDataRate, uint16_t wRxDataRate, uint16_t wSubcarrier) |
Apply card mode register settings (Tx and Rx Data Rate) according to given parameters. More... | |
phStatus_t | phhalHw_Rc663_SetConfig_Int (phhalHw_Rc663_DataParams_t *pDataParams, uint16_t wConfig, uint16_t wValue) |
Set configuration parameter (Internal). More... | |
phStatus_t | phhalHw_Rc663_SetRxWait (phhalHw_Rc663_DataParams_t *pDataParams, uint16_t wTimeEtu) |
Sets the RxWait time. More... | |
phStatus_t | phhalHw_Rc663_SetTxWait (phhalHw_Rc663_DataParams_t *pDataParams, uint16_t wTimeUs) |
Sets the TxWait time in microseconds. More... | |
phStatus_t | phhalHw_Rc663_SetFdt (phhalHw_Rc663_DataParams_t *pDataParams, uint8_t bUnit, uint16_t wTimeout) |
Sets the Frame Delay Time (Timeout). More... | |
phStatus_t | phhalHw_Rc663_GetFdt (phhalHw_Rc663_DataParams_t *pDataParams, phStatus_t wExchangeStatus, uint32_t *pTime) |
Retrieves the Frame Delay Time of the last command. More... | |
phStatus_t | phhalHw_Rc663_GetDigiDelay (phhalHw_Rc663_DataParams_t *pDataParams, uint8_t bIsTimeout, uint16_t *pDelayUs) |
Returns the delay of the digital circuitry for the current protocol. More... | |
phStatus_t | phhalHw_Rc663_GetTxBuffer (phhalHw_Rc663_DataParams_t *pDataParams, uint8_t bIsExchange, uint8_t **pTxBuffer, uint16_t *pTxBufferLen, uint16_t *pTxBufferSize) |
Returns the TxBuffer pointer, length and size. More... | |
phStatus_t | phhalHw_Rc663_GetRxBuffer (phhalHw_Rc663_DataParams_t *pDataParams, uint8_t bIsExchange, uint8_t **pRxBuffer, uint16_t *pRxBufferLen, uint16_t *pRxBufferSize) |
Returns the RxBuffer pointer, length and size. More... | |
phStatus_t | phhalHw_Rc663_MfcAuthenticate_Int (phhalHw_Rc663_DataParams_t *pDataParams, uint8_t bBlockNo, uint8_t bKeyType, uint8_t *pUid) |
Build and Execute MIFARE(R) Classic Authentication command. More... | |
phStatus_t | phhalHw_Rc663_Command_Int (phhalHw_Rc663_DataParams_t *pDataParams, uint8_t bCmd, uint16_t wOption, uint8_t bIrq0WaitFor, uint8_t bIrq1WaitFor, uint8_t *pTxBuffer, uint16_t wTxLength, uint16_t wRxBufferSize, uint8_t *pRxBuffer, uint16_t *pRxLength) |
Execute a Reader-specific command. More... | |
phStatus_t | phhalHw_Rc663_WaitIrq (phhalHw_Rc663_DataParams_t *pDataParams, uint8_t bEnableIrqs, uint8_t bWaitUntilPowerUp, uint8_t bIrq0WaitFor, uint8_t bIrq1WaitFor, uint8_t *pIrq0Reg, uint8_t *pIrq1Reg) |
Wait until one of the given interrupts occurs. More... | |
phStatus_t | phhalHw_Rc663_EPCV2_Init (phhalHw_Rc663_DataParams_t *pDataParams) |
Initialize Rc663 registers for 18000p3m3 protocol. More... | |
phStatus_t | phhalHw_Rc663_GetErrorStatus (phhalHw_Rc663_DataParams_t *pDataParams, uint16_t *wBufferLen, uint16_t *wBufferSize) |
Read different errors present. More... | |
phStatus_t | phhalHw_Rc663_GetMultiReg (phhalHw_Rc663_DataParams_t *pDataParams, uint8_t *pData) |
Function will read Multiple Registers and return of data read from multiple registers. More... | |
phStatus_t | phhalHw_Rc663_ReStartRx (phhalHw_Rc663_DataParams_t *pDataParams) |
Specific for EMVCo. More... | |
phStatus_t | phhalHw_Rc663_CheckForEmdError (phhalHw_Rc663_DataParams_t *pDataParams, uint8_t bIrq0WaitFor, uint8_t bIrq1WaitFor, uint32_t *pdwMultiReg, uint32_t *pdwPrevReg) |
Function is used to detect and Suppress EMVCo EMD Noise during reception. More... | |
void | phhalHw_Rc663_CreateRespFrame (uint8_t *bInBuff, uint8_t bDataPos, uint8_t *bOutBuff) |
This function will return the answer to ReqC in 32 byte multi slot frame format. More... | |
phStatus_t | phhalHw_Rc663_FrameRxMultiplePkt (phhalHw_Rc663_DataParams_t *pDataParams) |
Form packet which contains a series of ReqC responses(if multiple response received) in multi-slot response format and update Hal Rx buffer. More... | |
Timing related constants | |
#define | PHHAL_HW_RC663_TIMER_RELOAD_MAX 0xFFFFU |
Maximum reload value of internal timers. More... | |
#define | PHHAL_HW_RC663_TIMER0_FREQ 13.56f |
Internal timer frequency of Timer0. More... | |
#define | PHHAL_HW_RC663_ETU_I14443 9.44f |
Duration of one ETU for ISO14443 at 106 kBit/s in [us]. More... | |
#define | PHHAL_HW_RC663_ETU_212 4.7f |
Duration of one ETU at 212 kBit/s in [us]. More... | |
#define | PHHAL_HW_RC663_ETU_424 2.4f |
Duration of one ETU at 424 kBit/s in [us]. More... | |
#define | PHHAL_HW_RC663_ETU_848 1.2f |
Duration of one ETU at 848 kBit/s in [us]. More... | |
#define | PHHAL_HW_RC663_ETU_I15693_HIGH 18.88f |
Duration of one ETU for ISO15693 in [us]. More... | |
#define | PHHAL_HW_RC663_ETU_I15693 37.76f |
Duration of one ETU for ISO15693 in [us]. More... | |
#define | PHHAL_HW_RC663_ETU_EPCUID 37.76f |
Duration of one ETU for EPC/UID in [us]. More... | |
#define | PHHAL_HW_RC663_ETU_I18000 9.44f |
Duration of one ETU for 18000p3m3 in [us]. More... | |
#define | PHHAL_HW_RC663_I14443_ADD_DELAY_US 15 |
Additional digital timeout delay for ISO14443. More... | |
#define | PHHAL_HW_RC663_I15693_ADD_DELAY_US 120 |
Additional digital timeout delay for ISO15693. More... | |
#define | PHHAL_HW_RC663_DIGI_DELAY_TXWAIT_DBFREQ 8U |
Chip digital delay in ETUs for TxWait. More... | |
#define | PHHAL_HW_RC663_I18000P3M3_CRC_TYPE_PRESET 0x7AU |
CRC type and preset register value for I18000p3m3. More... | |
#define | PHHAL_HW_RC663_RXTX_TIMER_START 0x0010U |
Start timer manually. More... | |
Memory related constants | |
#define | PHHAL_HW_RC663_MAX_NUM_REGS 0x80U |
Maximum number of registers. More... | |
#define | PHHAL_HW_RC663_MAX_NUM_KEYS 0x100U |
Maximum possible number of keys in the EEPROM. More... | |
#define | PHHAL_HW_RC663_MAX_TX_SETTINGS 32U |
Maximum possible number of Tx-Settings in the EEPROM. More... | |
#define | PHHAL_HW_RC663_MAX_RX_SETTINGS 64U |
Maximum possible number of Rx-Settings in the EEPROM. More... | |
#define | PHHAL_HW_RC663_EEPROM_SIZE 0x2000U |
Size of the EEPROM. More... | |
#define | PHHAL_HW_RC663_EEPROM_SECTION2_BEGIN 0xC0U |
Beginning of Section2 in the EEPROM. More... | |
#define | PHHAL_HW_RC663_EEPROM_SECTION2_END 0x17FFU |
End of Section2 in the EEPROM. More... | |
#define | PHHAL_HW_RC663_EEPROM_NUM_PAGES 0x80U |
Number of pages within EEPROM. More... | |
#define | PHHAL_HW_RC663_EEPROM_PAGE_SIZE 0x40U |
Size of a page in EEPROM. More... | |
RXTX settings for #PHHAL_HW_RC663_CMD_LOADPROTOCOL | |
#define | PHHAL_HW_RC663_RXTX_I14443A_106 0x00U |
ISO14443A Operating mode at 106kbit/s. More... | |
#define | PHHAL_HW_RC663_RXTX_I14443A_212 0x01U |
ISO14443A Operating mode at 212kbit/s. More... | |
#define | PHHAL_HW_RC663_RXTX_I14443A_424 0x02U |
ISO14443A Operating mode at 414kbit/s. More... | |
#define | PHHAL_HW_RC663_RXTX_I14443A_848 0x03U |
ISO14443A Operating mode at 848kbit/s. More... | |
#define | PHHAL_HW_RC663_RXTX_I14443B_106 0x04U |
ISO14443B Operating mode at 106kbit/s. More... | |
#define | PHHAL_HW_RC663_RXTX_I14443B_212 0x05U |
ISO14443B Operating mode at 212kbit/s. More... | |
#define | PHHAL_HW_RC663_RXTX_I14443B_424 0x06U |
ISO14443B Operating mode at 414kbit/s. More... | |
#define | PHHAL_HW_RC663_RXTX_I14443B_848 0x07U |
ISO14443B Operating mode at 848kbit/s. More... | |
#define | PHHAL_HW_RC663_RXTX_FELICA_212 0x08U |
FeliCa Operating mode at 212kbit/s. More... | |
#define | PHHAL_HW_RC663_RXTX_FELICA_424 0x09U |
FeliCa Operating mode at 424kbit/s. More... | |
#define | PHHAL_HW_RC663_RXTX_I15693_1OO4 0x0AU |
ISO15693 One-Out-Of-Four Operating mode. More... | |
#define | PHHAL_HW_RC663_RXTX_I15693_1OO256 0x0CU |
ISO15693 One-Out-Of-256 Operating mode. More... | |
#define | PHHAL_HW_RC663_RXTX_I15693_HIGH_SSC 0x0AU |
ISO15693 High-Speed (RX) Operating mode (Single Subcarrier). More... | |
#define | PHHAL_HW_RC663_RXTX_I15693_FAST 0x0BU |
ISO15693 Fast-Speed (RX) Operating mode (Single Subcarrier). More... | |
#define | PHHAL_HW_RC663_RXTX_I15693_HIGH_DSC 0x0CU |
ISO15693 High-Speed (RX) Operating mode (Dual Subcarrier). More... | |
#define | PHHAL_HW_RC663_RXTX_EPC_UID 0x0DU |
ICode EPC/UID. More... | |
#define | PHHAL_HW_RC663_RXTX_I18000P3M3_DS_M2 0x0EU |
ICode ISO18000-3 Mode3 424 kBit/s (M=2). More... | |
#define | PHHAL_HW_RC663_RXTX_I18000P3M3_DS_M4 0x0FU |
ICode ISO18000-3 Mode3 424 kBit/s (M=4). More... | |
#define | PHHAL_HW_RC663_RXTX_I18000P3M3_QS_M2 0x10U |
ICode ISO18000-3 Mode3 848 kBit/s (M=2). More... | |
#define | PHHAL_HW_RC663_RXTX_I18000P3M3_QS_M4 0x11U |
ICode ISO18000-3 Mode3 848 kBit/s (M=4). More... | |
RS232 speed settings | |
#define | PHHAL_HW_RC663_SERIALSPEED_7200 0xFAU |
7.200 kBit/s. More... | |
#define | PHHAL_HW_RC663_SERIALSPEED_9600 0xEBU |
9.600 kBit/s. More... | |
#define | PHHAL_HW_RC663_SERIALSPEED_14400 0xDAU |
14.400 kBit/s. More... | |
#define | PHHAL_HW_RC663_SERIALSPEED_19200 0xCBU |
19.200 kBit/s. More... | |
#define | PHHAL_HW_RC663_SERIALSPEED_38400 0xABU |
38.400 kBit/s. More... | |
#define | PHHAL_HW_RC663_SERIALSPEED_57600 0x9AU |
57.500 kBit/s. More... | |
#define | PHHAL_HW_RC663_SERIALSPEED_115200 0x7AU |
115.200 kBit/s. More... | |
#define | PHHAL_HW_RC663_SERIALSPEED_128000 0x74U |
128.000 kBit/s. More... | |
#define | PHHAL_HW_RC663_SERIALSPEED_230400 0x5AU |
230.400 kBit/s. More... | |
#define | PHHAL_HW_RC663_SERIALSPEED_460800 0x3AU |
460.800 kBit/s. More... | |
#define | PHHAL_HW_RC663_SERIALSPEED_921600 0x1CU |
921.600 kBit/s. More... | |
#define | PHHAL_HW_RC663_SERIALSPEED_1228800 0x15U |
1.228.800 kBit/s. More... | |
MIFARE(R) Classic stuff | |
#define | PHHAL_HW_RC663_MFC_AUTHA_CMD 0x60U |
MIFARE(R) Classic AUTHA command code. More... | |
#define | PHHAL_HW_RC663_MFC_AUTHB_CMD 0x61U |
MIFARE(R) Classic AUTHB command code. More... | |
#define | PHHAL_HW_RC663_MFC_KEY_LENGTH 0x06U |
Lengh of a MIFARE(R) Classic key. More... | |
Custom command option | |
#define | PHHAL_HW_RC663_OPTION_FIFO_NOCLEAR 0x0080U |
Do not clear FIFO prior to command execution. More... | |
RC663 Derivatives IC ID | |
#define | PHHAL_HW_CLRC663_PRODUCT_ID1 0x0100U |
Product ID for CLRC663. More... | |
#define | PHHAL_HW_CLRC663_PRODUCT_ID2 0x0140U |
Product ID for CLRC663. More... | |
#define | PHHAL_HW_MFRC631_PRODUCT_ID 0xC000U |
Product ID for MFRC632. More... | |
#define | PHHAL_HW_MFRC630_PRODUCT_ID 0x8000U |
Product ID for MFRC630. More... | |
#define | PHHAL_HW_SLRC610_PRODUCT_ID 0x2000U |
Product ID for SLRC610. More... | |
Internal definitions.
#define PHHAL_HW_RC663_TIMER_RELOAD_MAX 0xFFFFU |
Maximum reload value of internal timers.
#define PHHAL_HW_RC663_TIMER0_FREQ 13.56f |
Internal timer frequency of Timer0.
#define PHHAL_HW_RC663_ETU_I14443 9.44f |
Duration of one ETU for ISO14443 at 106 kBit/s in [us].
#define PHHAL_HW_RC663_ETU_212 4.7f |
Duration of one ETU at 212 kBit/s in [us].
#define PHHAL_HW_RC663_ETU_424 2.4f |
Duration of one ETU at 424 kBit/s in [us].
#define PHHAL_HW_RC663_ETU_848 1.2f |
Duration of one ETU at 848 kBit/s in [us].
#define PHHAL_HW_RC663_ETU_I15693_HIGH 18.88f |
Duration of one ETU for ISO15693 in [us].
#define PHHAL_HW_RC663_ETU_I15693 37.76f |
Duration of one ETU for ISO15693 in [us].
#define PHHAL_HW_RC663_ETU_EPCUID 37.76f |
Duration of one ETU for EPC/UID in [us].
#define PHHAL_HW_RC663_ETU_I18000 9.44f |
Duration of one ETU for 18000p3m3 in [us].
#define PHHAL_HW_RC663_I14443_ADD_DELAY_US 15 |
Additional digital timeout delay for ISO14443.
#define PHHAL_HW_RC663_I15693_ADD_DELAY_US 120 |
Additional digital timeout delay for ISO15693.
#define PHHAL_HW_RC663_DIGI_DELAY_TXWAIT_DBFREQ 8U |
Chip digital delay in ETUs for TxWait.
#define PHHAL_HW_RC663_I18000P3M3_CRC_TYPE_PRESET 0x7AU |
CRC type and preset register value for I18000p3m3.
#define PHHAL_HW_RC663_RXTX_TIMER_START 0x0010U |
Start timer manually.
#define PHHAL_HW_RC663_MAX_NUM_REGS 0x80U |
Maximum number of registers.
#define PHHAL_HW_RC663_MAX_NUM_KEYS 0x100U |
Maximum possible number of keys in the EEPROM.
#define PHHAL_HW_RC663_MAX_TX_SETTINGS 32U |
Maximum possible number of Tx-Settings in the EEPROM.
#define PHHAL_HW_RC663_MAX_RX_SETTINGS 64U |
Maximum possible number of Rx-Settings in the EEPROM.
#define PHHAL_HW_RC663_EEPROM_SIZE 0x2000U |
Size of the EEPROM.
#define PHHAL_HW_RC663_EEPROM_SECTION2_BEGIN 0xC0U |
Beginning of Section2 in the EEPROM.
#define PHHAL_HW_RC663_EEPROM_SECTION2_END 0x17FFU |
End of Section2 in the EEPROM.
#define PHHAL_HW_RC663_EEPROM_NUM_PAGES 0x80U |
Number of pages within EEPROM.
#define PHHAL_HW_RC663_EEPROM_PAGE_SIZE 0x40U |
Size of a page in EEPROM.
#define PHHAL_HW_RC663_RXTX_I14443A_106 0x00U |
ISO14443A Operating mode at 106kbit/s.
#define PHHAL_HW_RC663_RXTX_I14443A_212 0x01U |
ISO14443A Operating mode at 212kbit/s.
#define PHHAL_HW_RC663_RXTX_I14443A_424 0x02U |
ISO14443A Operating mode at 414kbit/s.
#define PHHAL_HW_RC663_RXTX_I14443A_848 0x03U |
ISO14443A Operating mode at 848kbit/s.
#define PHHAL_HW_RC663_RXTX_I14443B_106 0x04U |
ISO14443B Operating mode at 106kbit/s.
#define PHHAL_HW_RC663_RXTX_I14443B_212 0x05U |
ISO14443B Operating mode at 212kbit/s.
#define PHHAL_HW_RC663_RXTX_I14443B_424 0x06U |
ISO14443B Operating mode at 414kbit/s.
#define PHHAL_HW_RC663_RXTX_I14443B_848 0x07U |
ISO14443B Operating mode at 848kbit/s.
#define PHHAL_HW_RC663_RXTX_FELICA_212 0x08U |
FeliCa Operating mode at 212kbit/s.
#define PHHAL_HW_RC663_RXTX_FELICA_424 0x09U |
FeliCa Operating mode at 424kbit/s.
#define PHHAL_HW_RC663_RXTX_I15693_1OO4 0x0AU |
ISO15693 One-Out-Of-Four Operating mode.
#define PHHAL_HW_RC663_RXTX_I15693_1OO256 0x0CU |
ISO15693 One-Out-Of-256 Operating mode.
#define PHHAL_HW_RC663_RXTX_I15693_HIGH_SSC 0x0AU |
ISO15693 High-Speed (RX) Operating mode (Single Subcarrier).
#define PHHAL_HW_RC663_RXTX_I15693_FAST 0x0BU |
ISO15693 Fast-Speed (RX) Operating mode (Single Subcarrier).
#define PHHAL_HW_RC663_RXTX_I15693_HIGH_DSC 0x0CU |
ISO15693 High-Speed (RX) Operating mode (Dual Subcarrier).
#define PHHAL_HW_RC663_RXTX_EPC_UID 0x0DU |
ICode EPC/UID.
#define PHHAL_HW_RC663_RXTX_I18000P3M3_DS_M2 0x0EU |
ICode ISO18000-3 Mode3 424 kBit/s (M=2).
#define PHHAL_HW_RC663_RXTX_I18000P3M3_DS_M4 0x0FU |
ICode ISO18000-3 Mode3 424 kBit/s (M=4).
#define PHHAL_HW_RC663_RXTX_I18000P3M3_QS_M2 0x10U |
ICode ISO18000-3 Mode3 848 kBit/s (M=2).
#define PHHAL_HW_RC663_RXTX_I18000P3M3_QS_M4 0x11U |
ICode ISO18000-3 Mode3 848 kBit/s (M=4).
#define PHHAL_HW_RC663_SERIALSPEED_7200 0xFAU |
7.200 kBit/s.
#define PHHAL_HW_RC663_SERIALSPEED_9600 0xEBU |
9.600 kBit/s.
#define PHHAL_HW_RC663_SERIALSPEED_14400 0xDAU |
14.400 kBit/s.
#define PHHAL_HW_RC663_SERIALSPEED_19200 0xCBU |
19.200 kBit/s.
#define PHHAL_HW_RC663_SERIALSPEED_38400 0xABU |
38.400 kBit/s.
#define PHHAL_HW_RC663_SERIALSPEED_57600 0x9AU |
57.500 kBit/s.
#define PHHAL_HW_RC663_SERIALSPEED_115200 0x7AU |
115.200 kBit/s.
#define PHHAL_HW_RC663_SERIALSPEED_128000 0x74U |
128.000 kBit/s.
#define PHHAL_HW_RC663_SERIALSPEED_230400 0x5AU |
230.400 kBit/s.
#define PHHAL_HW_RC663_SERIALSPEED_460800 0x3AU |
460.800 kBit/s.
#define PHHAL_HW_RC663_SERIALSPEED_921600 0x1CU |
921.600 kBit/s.
#define PHHAL_HW_RC663_SERIALSPEED_1228800 0x15U |
1.228.800 kBit/s.
#define PHHAL_HW_RC663_MFC_AUTHA_CMD 0x60U |
MIFARE(R) Classic AUTHA command code.
#define PHHAL_HW_RC663_MFC_AUTHB_CMD 0x61U |
MIFARE(R) Classic AUTHB command code.
#define PHHAL_HW_RC663_MFC_KEY_LENGTH 0x06U |
Lengh of a MIFARE(R) Classic key.
#define PHHAL_HW_RC663_OPTION_FIFO_NOCLEAR 0x0080U |
Do not clear FIFO prior to command execution.
#define PHHAL_HW_CLRC663_PRODUCT_ID1 0x0100U |
Product ID for CLRC663.
#define PHHAL_HW_CLRC663_PRODUCT_ID2 0x0140U |
Product ID for CLRC663.
#define PHHAL_HW_MFRC631_PRODUCT_ID 0xC000U |
Product ID for MFRC632.
#define PHHAL_HW_MFRC630_PRODUCT_ID 0x8000U |
Product ID for MFRC630.
#define PHHAL_HW_SLRC610_PRODUCT_ID 0x2000U |
Product ID for SLRC610.
phStatus_t phhalHw_Rc663_WriteFifo | ( | phhalHw_Rc663_DataParams_t * | pDataParams, |
uint8_t * | pData, | ||
uint16_t | wLength, | ||
uint16_t * | pBytesWritten | ||
) |
Validate the FIFO Buffer space in Rc663 and perform phhalHw_Rc663_WriteData.
Note that in opposite to phhalHw_Rc663_ReadFifo, this command only supports up to 255 bytes.
PH_ERR_SUCCESS | Operation successful. |
Other | Depending on implementation and underlying component. |
[in] | pDataParams | Pointer to this layer's parameter structure. |
[in] | pData | input data. |
[in] | wLength | length of input data. |
[out] | pBytesWritten | Number of written bytes. |
phStatus_t phhalHw_Rc663_ReadFifo | ( | phhalHw_Rc663_DataParams_t * | pDataParams, |
uint16_t | wDataSize, | ||
uint8_t * | pData, | ||
uint16_t * | pLength | ||
) |
Read Data from Fifo buffer.
PH_ERR_SUCCESS | Operation successful. |
Other | Depending on implementation and underlying component. |
[in] | pDataParams | Pointer to this layer's parameter structure. |
[in] | wDataSize | size of data buffer. |
[out] | pData | output data. |
[out] | pLength | number of output data bytes. |
phStatus_t phhalHw_Rc663_FlushFifo | ( | phhalHw_Rc663_DataParams_t * | pDataParams | ) |
Clear Fifo buffer.
PH_ERR_SUCCESS | Operation successful. |
Other | Depending on implementation and underlying component. |
[in] | pDataParams | Pointer to this layer's parameter structure. |
phStatus_t phhalHw_Rc663_WriteData | ( | phhalHw_Rc663_DataParams_t * | pDataParams, |
uint8_t | bAddress, | ||
uint8_t * | pData, | ||
uint16_t | wLength | ||
) |
Perform actual Write to Rc663 FIFO with the data passed.
PH_ERR_SUCCESS | Operation successful. |
Other | Depending on implementation and underlying component. |
[in] | pDataParams | Pointer to this layer's parameter structure. |
[in] | bAddress | Start-Register Address. |
[in] | pData | Register Values; uint8_t[wLength]. |
[in] | wLength | Number of Values. |
phStatus_t phhalHw_Rc663_ReadData | ( | phhalHw_Rc663_DataParams_t * | pDataParams, |
uint8_t | bAddress, | ||
uint16_t | wLength, | ||
uint8_t * | pData | ||
) |
Perform actual read from Rc663 FIFO for the address passed.
PH_ERR_SUCCESS | Operation successful. |
Other | Depending on implementation and underlying component. |
[in] | pDataParams | Pointer to this layer's parameter structure. |
[in] | bAddress | Register Address. |
[in] | wLength | Number of Values. |
[out] | pData | Register Values; uint8_t[wLength]. |
phStatus_t phhalHw_Rc663_SetCardMode | ( | phhalHw_Rc663_DataParams_t * | pDataParams, |
uint16_t | wTxDataRate, | ||
uint16_t | wRxDataRate, | ||
uint16_t | wSubcarrier | ||
) |
Apply card mode register settings (Tx and Rx Data Rate) according to given parameters.
PH_ERR_SUCCESS | Operation successful. |
Other | Depending on implementation and underlying component. |
[in] | pDataParams | Pointer to this layer's parameter structure. |
[in] | wTxDataRate | TxDataRate HAL config. |
[in] | wRxDataRate | RxDataRate HAL config. |
[in] | wSubcarrier | SubCarrier HAL config. |
phStatus_t phhalHw_Rc663_SetConfig_Int | ( | phhalHw_Rc663_DataParams_t * | pDataParams, |
uint16_t | wConfig, | ||
uint16_t | wValue | ||
) |
Set configuration parameter (Internal).
This is needed since phhalHw_Rc663_SetCardMode would cause a recursive call to phhalHw_SetConfig which is bad for 805x based systems.
PH_ERR_SUCCESS | Operation successful. |
PH_ERR_UNSUPPORTED_PARAMETER | Configuration is not supported or invalid. |
PH_ERR_INVALID_PARAMETER | Parameter value is invalid. |
PH_ERR_PARAMETER_OVERFLOW | Setting the parameter value would lead to an overflow. |
PH_ERR_INTERFACE_ERROR | Communication error. |
[in] | pDataParams | Pointer to this layer's parameter structure. |
[in] | wConfig | Configuration Identifier. |
[in] | wValue | Configuration Value. |
phStatus_t phhalHw_Rc663_SetRxWait | ( | phhalHw_Rc663_DataParams_t * | pDataParams, |
uint16_t | wTimeEtu | ||
) |
Sets the RxWait time.
Note: RxWait is defined between the last transmitted bit and the activation of the receiver.
PH_ERR_SUCCESS | Operation successful. |
Other | Depending on implementation and underlying component. |
[in] | pDataParams | Pointer to this layer's parameter structure. |
[in] | wTimeEtu | RxWait time in ETUs. |
phStatus_t phhalHw_Rc663_SetTxWait | ( | phhalHw_Rc663_DataParams_t * | pDataParams, |
uint16_t | wTimeUs | ||
) |
Sets the TxWait time in microseconds.
Note: TxWait is defined between the last received bit and the next transmitted bit.
PH_ERR_SUCCESS | Operation successful. |
Other | Depending on implementation and underlying component. |
[in] | pDataParams | Pointer to this layer's parameter structure. |
[in] | wTimeUs | TxWait time in microseconds. |
phStatus_t phhalHw_Rc663_SetFdt | ( | phhalHw_Rc663_DataParams_t * | pDataParams, |
uint8_t | bUnit, | ||
uint16_t | wTimeout | ||
) |
Sets the Frame Delay Time (Timeout).
Note: Frame Delay Time is defined between the last transmitted bit and the first received bit.
PH_ERR_SUCCESS | Operation successful. |
Other | Depending on implementation and underlying component. |
[in] | pDataParams | Pointer to this layer's parameter structure. |
[in] | bUnit | Unit of given timeout value (either PHHAL_HW_TIME_MICROSECONDS or PHHAL_HW_TIME_MILLISECONDS). |
[in] | wTimeout | Timeout value. |
phStatus_t phhalHw_Rc663_GetFdt | ( | phhalHw_Rc663_DataParams_t * | pDataParams, |
phStatus_t | wExchangeStatus, | ||
uint32_t * | pTime | ||
) |
Retrieves the Frame Delay Time of the last command.
Note: Frame Delay Time is defined between the last transmitted bit and the first received bit.
PH_ERR_SUCCESS | Operation successful. |
Other | Depending on implementation and underlying component. |
[in] | pDataParams | Pointer to this layer's parameter structure. |
[in] | wExchangeStatus | Status code returned by exchange function. |
[out] | pTime | Calculated time in microseconds from timer contents. |
phStatus_t phhalHw_Rc663_GetDigiDelay | ( | phhalHw_Rc663_DataParams_t * | pDataParams, |
uint8_t | bIsTimeout, | ||
uint16_t * | pDelayUs | ||
) |
Returns the delay of the digital circuitry for the current protocol.
PH_ERR_SUCCESS | Operation successful. |
phStatus_t phhalHw_Rc663_GetTxBuffer | ( | phhalHw_Rc663_DataParams_t * | pDataParams, |
uint8_t | bIsExchange, | ||
uint8_t ** | pTxBuffer, | ||
uint16_t * | pTxBufferLen, | ||
uint16_t * | pTxBufferSize | ||
) |
Returns the TxBuffer pointer, length and size.
PH_ERR_SUCCESS | Operation successful. |
phStatus_t phhalHw_Rc663_GetRxBuffer | ( | phhalHw_Rc663_DataParams_t * | pDataParams, |
uint8_t | bIsExchange, | ||
uint8_t ** | pRxBuffer, | ||
uint16_t * | pRxBufferLen, | ||
uint16_t * | pRxBufferSize | ||
) |
Returns the RxBuffer pointer, length and size.
PH_ERR_SUCCESS | Operation successful. |
phStatus_t phhalHw_Rc663_MfcAuthenticate_Int | ( | phhalHw_Rc663_DataParams_t * | pDataParams, |
uint8_t | bBlockNo, | ||
uint8_t | bKeyType, | ||
uint8_t * | pUid | ||
) |
Build and Execute MIFARE(R) Classic Authentication command.
PH_ERR_SUCCESS | Operation successful. |
Other | Depending on implementation and underlaying component. |
[in] | pDataParams | Pointer to this layer's parameter structure. |
[in] | bBlockNo | Block-number on card to authenticate to. |
[in] | bKeyType | Either PHHAL_HW_MFC_KEYA or PHHAL_HW_MFC_KEYB. |
[in] | pUid | Serial number of current cascade level; uint8_t[4]. |
phStatus_t phhalHw_Rc663_Command_Int | ( | phhalHw_Rc663_DataParams_t * | pDataParams, |
uint8_t | bCmd, | ||
uint16_t | wOption, | ||
uint8_t | bIrq0WaitFor, | ||
uint8_t | bIrq1WaitFor, | ||
uint8_t * | pTxBuffer, | ||
uint16_t | wTxLength, | ||
uint16_t | wRxBufferSize, | ||
uint8_t * | pRxBuffer, | ||
uint16_t * | pRxLength | ||
) |
Execute a Reader-specific command.
Internal function for executing all commands except Transceive/Transmit/Receive.
PH_ERR_SUCCESS | Operation successful. |
Other | Depending on implementation and underlaying component. |
[in] | pDataParams | Pointer to this layer's parameter structure. |
[in] | bCmd | Command code. |
[in] | wOption | Option parameter. |
[in] | bIrq0WaitFor | Bitmask of interrupts in Irq0 register to wait for. |
[in] | bIrq1WaitFor | Bitmask of interrupts in Irq1 register to wait for. |
[in] | pTxBuffer | Data to transmit. |
[in] | wTxLength | Length of input data. |
[in] | wRxBufferSize | Size of receive buffer. |
[out] | pRxBuffer | Pointer to received data. |
[out] | pRxLength | Number of received data bytes. |
phStatus_t phhalHw_Rc663_WaitIrq | ( | phhalHw_Rc663_DataParams_t * | pDataParams, |
uint8_t | bEnableIrqs, | ||
uint8_t | bWaitUntilPowerUp, | ||
uint8_t | bIrq0WaitFor, | ||
uint8_t | bIrq1WaitFor, | ||
uint8_t * | pIrq0Reg, | ||
uint8_t * | pIrq1Reg | ||
) |
Wait until one of the given interrupts occurs.
PH_ERR_SUCCESS | Operation successful. |
Other | Depending on implementation and underlaying component. |
[in] | pDataParams | Pointer to this layer's parameter structure. |
[in] | bEnableIrqs | Whether to enable (PH_ON) Irqs to wait for or not (PH_OFF). |
[in] | bWaitUntilPowerUp | Whether to wait (PH_ON) until the StandBy bit in command register is cleared or not (PH_OFF). |
[in] | bIrq0WaitFor | Bitmask of interrupts in Irq0 register to wait for. |
[in] | bIrq1WaitFor | Bitmask of interrupts in Irq1 register to wait for. |
[out] | pIrq0Reg | Contents of Irq0 register. |
[out] | pIrq1Reg | Contents of Irq1 register. |
phStatus_t phhalHw_Rc663_EPCV2_Init | ( | phhalHw_Rc663_DataParams_t * | pDataParams | ) |
Initialize Rc663 registers for 18000p3m3 protocol.
PH_ERR_SUCCESS | Operation successful. |
Other | Depending on implementation and underlaying component. |
[in] | pDataParams | Pointer to this layer's parameter structure. |
phStatus_t phhalHw_Rc663_GetErrorStatus | ( | phhalHw_Rc663_DataParams_t * | pDataParams, |
uint16_t * | wBufferLen, | ||
uint16_t * | wBufferSize | ||
) |
Read different errors present.
/w
Error | code |
Other | Depending on implementation and underlaying component. |
[in] | pDataParams | Pointer to this layer's parameter structure. |
[out] | wBufferLen | Number of bytes already in the TxBuffer. |
[out] | wBufferSize | Size of the TxBuffer. |
phStatus_t phhalHw_Rc663_GetMultiReg | ( | phhalHw_Rc663_DataParams_t * | pDataParams, |
uint8_t * | pData | ||
) |
Function will read Multiple Registers and return of data read from multiple registers.
Specific for EMVCo
PH_ERR_SUCCESS | Operation successful. |
Other | Depending on implementation and underlying component. |
[in] | pDataParams | Pointer to this layer's parameter structure. |
[out] | pData | Received data. |
phStatus_t phhalHw_Rc663_ReStartRx | ( | phhalHw_Rc663_DataParams_t * | pDataParams | ) |
Specific for EMVCo.
Function will re-start/Put device in Receiving Phase
PH_ERR_SUCCESS | Operation successful. |
Other | Depending on implementation and underlying component. |
[in] | pDataParams | Pointer to this layer's parameter structure. |
phStatus_t phhalHw_Rc663_CheckForEmdError | ( | phhalHw_Rc663_DataParams_t * | pDataParams, |
uint8_t | bIrq0WaitFor, | ||
uint8_t | bIrq1WaitFor, | ||
uint32_t * | pdwMultiReg, | ||
uint32_t * | pdwPrevReg | ||
) |
Function is used to detect and Suppress EMVCo EMD Noise during reception.
PH_ERR_SUCCESS | Operation successful. |
Other | Depending on implementation and underlying component. |
[in] | pDataParams | Pointer to this layer's parameter structure. |
[in] | bIrq0WaitFor | Bitmask of interrupts in Irq0 register to wait for. |
[in] | bIrq1WaitFor | Bitmask of interrupts in Irq1 register to wait for. |
[out] | pdwMultiReg | Contains Multiple Registry Read Value. |
[out] | pdwPrevReg | Contains previous operation Multiple Registry Read value. |
This function will return the answer to ReqC in 32 byte multi slot frame format.
Size of output frame is PHHAL_HW_RESP_FRAME_SIZE byte.
Note: This function is only valid when multiple reception PHHAL_HW_CONFIG_RXMULTIPLE is enabled.
[in] | bInBuff | Pointer to Rx buffer. |
[in] | bDataPos | position of card response in Rxbuffer. |
[out] | bOutBuff | Pointer to buffer which store frame of PHHAL_HW_RESP_FRAME_SIZE size. |
phStatus_t phhalHw_Rc663_FrameRxMultiplePkt | ( | phhalHw_Rc663_DataParams_t * | pDataParams | ) |
Form packet which contains a series of ReqC responses(if multiple response received) in multi-slot response format and update Hal Rx buffer.
This function will use function phhalHw_Rc663_CreateRespFrame to frame each card responses multi-slot frame format.
Note: This function is only valid when multiple reception PHHAL_HW_CONFIG_RXMULTIPLE is enabled.
PH_ERR_SUCCESS | Operation successful. |
Other | Depending on implementation and under-laying component. |
[in] | pDataParams | Pointer to this layer's parameter structure. |