311 lines
17 KiB
C
311 lines
17 KiB
C
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/*
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* Copyright (c), NXP Semiconductors Gratkorn / Austria
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*
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* (C)NXP Semiconductors
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* All rights are reserved. Reproduction in whole or in part is
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* prohibited without the written consent of the copyright owner.
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* NXP reserves the right to make changes without notice at any time.
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* NXP makes no warranty, expressed, implied or statutory, including but
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* not limited to any implied warranty of merchantability or fitness for any
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*particular purpose, or that the use will not infringe any third party patent,
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* copyright or trademark. NXP must not be liable for any loss or damage
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* arising from its use.
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*/
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/** \file
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* Build System Definitions for Reader Library Framework.
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* $Author: Ankur Srivastava (nxp79569) $
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* $Revision: 6235 $ (v4.040.05.011646)
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* $Date: 2016-09-30 12:06:20 +0530 (Fri, 30 Sep 2016) $
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*
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* History:
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* SA: Generated 15. March 2015
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*
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*/
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#ifndef PH_NXPBUILD_LPC_H
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#define PH_NXPBUILD_LPC_H
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/** \defgroup ph_NxpBuild NXP Build
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* \brief Controls the Inclusion of required components, Inclusion SRC/DATA within components and the Build Dependencies between the components
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* @{
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*/
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/* NXPBUILD_DELETE: included code lines should be always removed from code */
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/* NXP BUILD DEFINES */
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/* use #define to include components */
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/* comment out #define to exclude components */
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/* DEBUG build mode */
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/*#define NXPBUILD__PH_DEBUG*/ /**< DEBUG build definition */
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#define NXPRDLIB_REM_GEN_INTFS
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/*********************************************************************************************************************************************************************************/
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#define NXPBUILD__PH_PLATFORM /**< Embedded Platform Porting and Abstraction Component included. Used for LPC_XXX, Kinetis_XXX,Raspberry_XXX,iMX_XXX etc. */
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#ifdef NXPBUILD__PH_PLATFORM /**< If RdLib executing on embedded platform, then include one of the below embedded platform and one of the OS used as required. */
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#ifdef CPU_MK81FN256xxx15
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#define NXPBUILD__PH_KINETIS_K81
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#endif
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#ifdef CPU_MK82FN256VLL15
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#define NXPBUILD__PH_KINETIS_K82 /**< K82 Freedom Board */
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#endif
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#if defined(__PN74XXXX__) || defined (__PN73XXXX__)
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#define NXPBUILD__PHHAL_HW_PN7462AU /**< NFC Controller PN7462AU HAL */
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#elif defined(__CODE_RED)
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#define NXPBUILD__PH_LPC1769 /**< Host Controller LPC1769 */
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//#define NXPBUILD__PH_LPC11U68 /**< Host Controller LPC11U68 */
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#endif
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//#define NXPBUILD__PH_RASPBERRY_PI /**< Host Controller RaspBerry Pi */
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//#define NXPBUILD__PH_UDOO_NEO /**< Host Controller udoo-neo */
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#if defined(NXPBUILD__PH_RASPBERRY_PI) || defined(NXPBUILD__PH_UDOO_NEO)
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#define NXPBUILD__PH_OSAL_LINUX /**< OSAL Implementation of POSIX is included. RdLib is executed as UM application in Linux */
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#else
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//#define NXPBUILD__PH_OSAL_NULLOS /**< OSAL Implementation of NULL OS is included. RdLib executed in Executive Loop. */
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#define NXPBUILD__PH_OSAL_FREERTOS /**< OSAL Implementation of Free RTOS is included. RdLib is linked to Free RTOS Library */
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#endif
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#if defined(NXPBUILD__PH_LPC1769) || defined(NXPBUILD__PH_LPC11U68)
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/* Host Controller SDK- Front End HAL Interface ie. Bus Abstraction Layer. Define only one of the below */
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#define NXPBUILD__PHBAL_REG_LPCOPEN_SPI /**< LPCOpenStack SPI BAL Component is included. */
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//#define NXPBUILD__PHBAL_REG_LPCOPEN_I2C /**< LPCOpenStack SPI I2C Component is included. */
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#endif
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#ifdef NXPBUILD__PH_RASPBERRY_PI
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//#define NXPBUILD__PHBAL_REG_LINUX_KERNEL_SPI
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#define NXPBUILD__PHBAL_REG_LINUX_USER_SPI
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//#define NXPBUILD__PHBAL_REG_LINUX_USER_I2C
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#endif //NXPBUILD__PH_RASPBERRY_PI
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#if defined (NXPBUILD__PH_KINETIS_K82) || defined (NXPBUILD__PH_KINETIS_K81)
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#define NXPBUILD__PHBAL_REG_KINETIS_SPI
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//#define NXPBUILD__PHBAL_REG_KINETIS_I2C
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#endif
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#endif /* NXPBUILD__PH_PLATFORM */
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#ifndef NXPBUILD__PHHAL_HW_PN7462AU /**< If the used NFC HW is not NFC Controller like PN7462AU, then include one of the front end HAL */
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#define NXPBUILD__PHHAL_HW_RC523 /**< RC523 HAL Component is included. */
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//#define NXPBUILD__PHHAL_HW_RC663 /**< RC663 HAL Component is included */
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//-#define NXPBUILD__PHHAL_HW_PN5180 /**< PN5180 HAL Component is included */
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#endif /* NXPBUILD__PHHAL_HW_PN7462AU */
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#if defined(NXPBUILD__PHHAL_HW_RC523) || \
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defined(NXPBUILD__PHHAL_HW_PN5180) || \
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defined(NXPBUILD__PHHAL_HW_PN7462AU)
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#define NXPBUILD__PHHAL_HW_TARGET /**< Dependency checking if target mode macros should be enabled */
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#endif
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/*********************************************************************************************************************************************************************************/
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#define NXPBUILD__PHPAL_I14443P3A_SW /**< PAL ISO 14443-3A SW Component is included. */
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#define NXPBUILD__PHPAL_I14443P3B_SW /**< PAL ISO 14443-3B SW Component is included. */
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#define NXPBUILD__PHPAL_I14443P4A_SW /**< PAL ISO 14443-4A SW Component is included. */
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#define NXPBUILD__PHPAL_I14443P4_SW /**< PAL ISO 14443-4 SW Component is included. */
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#define NXPBUILD__PHPAL_MIFARE_SW /**< PAL MIFARE SW Component is included */
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//#define NXPBUILD__PHPAL_MIFARE_STUB /**< PAL MIFARE STUB Component is included */
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#define NXPBUILD__PHPAL_FELICA_SW /**< PAL Felica SW Component is included. */
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#ifndef NXPBUILD__PHHAL_HW_RC523 /**< If FE HAL is RC523, then exclude ISO15693 & ISO18000p3m3 PAL, otherwise include as required. */
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#define NXPBUILD__PHPAL_SLI15693_SW /**< PAL SLI 15693 Component is included. */
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#define NXPBUILD__PHPAL_I18000P3M3_SW /**< PAL ISO 18000p3m3 Component is included. */
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#endif /* NXPBUILD__PHHAL_HW_RC523 */
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#ifdef NXPBUILD__PHHAL_HW_RC663 /**< If FE HAL is RC663, then include EPC UID PAL as required, otherwise exclude. */
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#define NXPBUILD__PHPAL_EPCUID_SW /**< PAL EPC UID SW Component is included. */
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#endif
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#define NXPBUILD__PHPAL_I18092MPI_SW /**< PAL ISO18092 (P2P) SW Component is included. */
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#ifndef NXPBUILD__PHHAL_HW_RC663 /**< If FE HAL is RC663, then exclude ISO14443 Card Mode PAL & ISO18092 Target Mode PAL, otherwise include as required. */
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#ifdef NXPBUILD__PH_PLATFORM /**< ISO14443 Card Mode PAL & ISO18092 Target Mode PAL will execute only in an embedded platform and not in PC platform. */
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#define NXPBUILD__PHPAL_I14443P4MC_SW /**< PAL ISO 14443-4 Card Mode SW Component is included. */
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#define NXPBUILD__PHPAL_I18092MT_SW /**< PAL ISO 18092 Target Mode SW Component is included. */
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#endif /* NXPBUILD__PH_PLATFORM */
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#endif /* NXPBUILD__PHHAL_HW_RC663 */
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/*********************************************************************************************************************************************************************************/
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#define NXPBUILD__PHAC_DISCLOOP_SW /**< Discovery Loop Activity SW Component is included. */
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#ifdef NXPBUILD__PHAC_DISCLOOP_SW /**< If DiscLoop SW Component is included, macros( & it's dependencies) to include/exclude SRC/DATA within Discloop is defined. */
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#if defined (NXPBUILD__PHHAL_HW_PN5180) || \
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defined (NXPBUILD__PHHAL_HW_RC663) || \
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defined (NXPBUILD__PHHAL_HW_PN7462AU)
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#define NXPBUILD__PHAC_DISCLOOP_LPCD /**< SRC to enable LPCD is included. */
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#endif
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#ifdef NXPBUILD__PHPAL_I14443P3A_SW
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#define NXPBUILD__PHAC_DISCLOOP_TYPEA_I3P3_TAGS /**< SRC/DATA to Detect/CollRes/Activate cards such as MFC, MFUL, MFP SL1 etc is included. */
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#define NXPBUILD__PHAC_DISCLOOP_TYPEA_JEWEL_TAGS /**< SRC/DATA to Detect cards such as NFC Forum T1T, Topaz/Jewel is included. */
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#if defined(NXPBUILD__PHPAL_I14443P4A_SW) && defined(NXPBUILD__PHPAL_I14443P4_SW)
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#define NXPBUILD__PHAC_DISCLOOP_TYPEA_I3P4_TAGS /**< SRC/DATA to Detect cards such as MFDF, MFP, T4AT NFC Forum Tag or Type A EMVCo is included. */
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#endif
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#endif /* NXPBUILD__PHPAL_I14443P3A_SW */
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#if defined(NXPBUILD__PHPAL_I14443P3A_SW) && defined(NXPBUILD__PHPAL_I18092MPI_SW)
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#define NXPBUILD__PHAC_DISCLOOP_TYPEA_P2P_TAGS /**< SRC/DATA to Detect Peer Passive Type A P2P Target mode devices is included. */
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#endif
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#ifdef NXPBUILD__PHPAL_I18092MPI_SW
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#define NXPBUILD__PHAC_DISCLOOP_TYPEA_P2P_ACTIVE /**< SRC/DATA to Detect Peer Active Type A P2P Target mode devices is included. */
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#define NXPBUILD__PHAC_DISCLOOP_TYPEF212_P2P_ACTIVE/**< SRC/DATA to Detect Peer Active Type F212 P2P Target mode devices is included. */
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#define NXPBUILD__PHAC_DISCLOOP_TYPEF424_P2P_ACTIVE/**< SRC/DATA to Detect Peer Active Type F424 P2P Target mode devices is included. */
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#endif /* NXPBUILD__PHPAL_I18092MPI_SW */
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#ifdef NXPBUILD__PHPAL_FELICA_SW
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#define NXPBUILD__PHAC_DISCLOOP_FELICA_TAGS /**< SRC/DATA to Detect FeliCa Cards is included. */
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#ifdef NXPBUILD__PHPAL_I18092MPI_SW
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#define NXPBUILD__PHAC_DISCLOOP_TYPEF_P2P_TAGS /**< SRC/DATA to Detect Peer Passive Type F P2P Target mode devices is included. */
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#endif /* NXPBUILD__PHPAL_I18092MPI_SW */
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#endif /* NXPBUILD__PHPAL_FELICA_SW */
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#ifdef NXPBUILD__PHPAL_I14443P3B_SW
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#define NXPBUILD__PHAC_DISCLOOP_TYPEB_I3P3B_TAGS /**< SRC/DATA to Detect Type B Cards that operate at Layer3 level is included */
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#ifdef NXPBUILD__PHPAL_I14443P4_SW
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#define NXPBUILD__PHAC_DISCLOOP_TYPEB_I3P4B_TAGS /**< SRC/DATA to Detect Type B Cards such as NFC Forum Type 4 Tags, EMVCo Type B Cards etc is included */
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#endif /* NXPBUILD__PHPAL_I14443P4_SW */
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#endif /* NXPBUILD__PHPAL_I14443P3B_SW */
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#ifdef NXPBUILD__PHPAL_SLI15693_SW
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#define NXPBUILD__PHAC_DISCLOOP_TYPEV_TAGS /**< SRC/DATA to Detect Type V Cards such as ICODE SLI/SLIX/SLI2/Tesa Cards is included*/
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#endif /* NXPBUILD__PHPAL_SLI15693_SW */
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#ifdef NXPBUILD__PHPAL_I18000P3M3_SW
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#define NXPBUILD__PHAC_DISCLOOP_I18000P3M3_TAGS /**< SRC/DATA to Detect ICODE ILT Cards such as SMARTRAC StackIt Cards is included*/
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#endif /* NXPBUILD__PHPAL_I18000P3M3_SW */
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#ifndef NXPBUILD__PHHAL_HW_RC663 /**< If FE HAL is RC663, target mode is not supported at all, hence exclude those SRC, otherwise include as required */
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#ifdef NXPBUILD__PHHAL_HW_TARGET
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#define NXPBUILD__PHAC_DISCLOOP_TYPEA_TARGET_PASSIVE /**< SRC to Initialize Type A passive listen config and subsequently call HAL AutoColl is included. */
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#define NXPBUILD__PHAC_DISCLOOP_TYPEA_TARGET_ACTIVE /**< SRC to Initialize Type A active listen config and subsequently call HAL AutoColl is included. */
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#define NXPBUILD__PHAC_DISCLOOP_TYPEF212_TARGET_PASSIVE/**< SRC to Initialize Type F212 passive listen config and subsequently call HAL AutoColl is included. */
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#define NXPBUILD__PHAC_DISCLOOP_TYPEF212_TARGET_ACTIVE /**< SRC to Initialize Type F212 active listen config and subsequently call HAL AutoColl is included. */
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#define NXPBUILD__PHAC_DISCLOOP_TYPEF424_TARGET_PASSIVE/**< SRC to Initialize Type F424 passive listen config and subsequently call HAL AutoColl is included. */
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#define NXPBUILD__PHAC_DISCLOOP_TYPEF424_TARGET_ACTIVE /**< SRC to Initialize Type F424 active listen config and subsequently call HAL AutoColl is included. */
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#endif /* NXPBUILD__PHHAL_HW_TARGET */
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#endif
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#endif /* NXPBUILD__PHAC_DISCLOOP_SW */
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/*********************************************************************************************************************************************************************************/
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#define NXPBUILD__PHNFCLIB /**< Simplified API Interface, If enabling this the entry point should be this component in the application */
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#ifdef NXPBUILD__PHNFCLIB
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#define NXPBUILD__PH_NFCLIB_ISO /* Enable the ISO profile of Simplified API */
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#define NXPBUILD__PH_NFCLIB_EMVCO /* Enable the EMVCO profile of Simplified API */
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//#define NXPBUILD__PH_NFCLIB_NFC /* Enable the NFC profile of Simplified API */
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#endif /* NXPBUILD__PHNFCLIB */
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#ifdef NXPBUILD__PH_NFCLIB_ISO
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#ifdef NXPBUILD__PHAC_DISCLOOP_TYPEA_I3P3_TAGS
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#define NXPBUILD__PH_NFCLIB_ISO_MFC
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#define NXPBUILD__PH_NFCLIB_ISO_MFUL
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#endif /* NXPBUILD__PHAC_DISCLOOP_TYPEA_I3P3_TAGS */
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#ifdef NXPBUILD__PHAC_DISCLOOP_TYPEA_I3P4_TAGS
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#define NXPBUILD__PH_NFCLIB_ISO_MFDF
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#endif /* NXPBUILD__PHAC_DISCLOOP_TYPEA_I3P4_TAGS */
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#ifdef NXPBUILD__PHAC_DISCLOOP_TYPEV_TAGS
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#define NXPBUILD__PH_NFCLIB_ISO_15693
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#endif /* NXPBUILD__PHAC_DISCLOOP_TYPEV_TAGS*/
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#ifdef NXPBUILD__PHAC_DISCLOOP_I18000P3M3_TAGS
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#define NXPBUILD__PH_NFCLIB_ISO_18000
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#endif /* NXPBUILD__PHAC_DISCLOOP_I18000P3M3_TAGS */
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#endif /* NXPBUILD__PH_NFCLIB_ISO*/
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/*********************************************************************************************************************************************************************************/
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//#define NXPBUILD__PH_CIDMANAGER_SW /**< CID Manager SW Component is included. */
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#define NXPBUILD__PH_KEYSTORE_SW /**< SW KeyStore Component is included. */
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#if defined(NXPBUILD__PHHAL_HW_RC663) && !defined(NXPBUILD__PH_KEYSTORE_SW)
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#define NXPBUILD__PH_KEYSTORE_RC663 /**< RC663 KeyStore Component is included. */
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#endif
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#define NXPBUILD__PH_NDA_MFDF /**< Mifare DESFire implementation under NDA */
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#define NXPBUILD__PH_CRYPTOSYM_SW /**< Crypto Symbols SW Component is included. */
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#define NXPBUILD__PH_CRYPTORNG_SW /**< Crypto RNG SW Component is included. */
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#define NXPBUILD__PHNFCLIB /**< Simplified layer Component. */
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/*********************************************************************************************************************************************************************************/
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#ifdef NXPBUILD__PHPAL_FELICA_SW
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#define NXPBUILD__PHAL_FELICA_SW /**< AL FeliCa SW Component is included */
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#endif /* NXPBUILD__PHPAL_FELICA_SW */
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#ifdef NXPBUILD__PHPAL_MIFARE_SW
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#if defined(NXPBUILD__PH_KEYSTORE_SW) || defined(NXPBUILD__PH_KEYSTORE_RC663)
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#define NXPBUILD__PHAL_MFC_SW /**< AL Mifare Classic SW Component is included */
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#endif
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#define NXPBUILD__PHAL_MFUL_SW /**< AL Mifare Ultrlight SW Component is included */
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#define NXPBUILD__PHAL_MFDF_SW /**< AL Mifare DesFire SW Component is included */
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#endif /* NXPBUILD__PHPAL_MIFARE_SW */
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#define NXPBUILD__PHAL_T1T_SW /**< AL Type T1 Tag SW Component is included */
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#ifdef NXPBUILD__PHPAL_SLI15693_SW
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#define NXPBUILD__PHAL_I15693_SW /**< AL ISO 15693 SW Component is included */
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#define NXPBUILD__PHAL_SLI_SW /**< AL SLI SW Component is included */
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#endif /* NXPBUILD__PHPAL_SLI15693_SW */
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#define NXPBUILD__PHAL_TOP_SW /**< AL for TagOps Mapping SW Component is included.Required for NDEF operations */
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#ifdef NXPBUILD__PHPAL_I18000P3M3_SW
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#define NXPBUILD__PHAL_I18000P3M3_SW /**< AL ISO18000p3m3 SW Component is included */
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#endif /* NXPBUILD__PHPAL_I18000P3M3_SW */
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#ifdef NXPBUILD__PHPAL_I14443P4MC_SW
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#if !defined(NXPBUILD__PH_OSAL_NULLOS) && defined(NXPBUILD__PH_PLATFORM)
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#define NXPBUILD__PHCE_T4T_SW /**< AL HCE T2AT SW Component is included */
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//#define NXPBUILD__PHCE_T4T_PROPRIETARY /**< SRC to handle HCE T4AT Proprietary Commands is included */
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/*#define NXPBUILD__PHCE_T4T_EXT_NDEF */ /**< SRC to handle Extended NDEF Support as per T4T spec 3.0 is included */
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#endif
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#endif /* NXPBUILD__PHPAL_I14443P4MC_SW */
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/* LLCP Components */
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#if defined(NXPBUILD__PHPAL_I18092MPI_SW) || defined(NXPBUILD__PHPAL_I18092MT_SW)
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#if !defined(NXPBUILD__PH_OSAL_NULLOS) && defined(NXPBUILD__PH_PLATFORM)
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#define NXPBUILD__PHLN_LLCP_SW /**< Link LLCP SW Component is included */
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#endif
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#endif
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/* SNEP components */
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#ifdef NXPBUILD__PHLN_LLCP_SW
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#define NXPBUILD__PHNP_SNEP_SW /**< Protocol SNEP SW Component is included */
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#endif /* NXPBUILD__PHLN_LLCP_SW */
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/* Enable/disable Debugging */
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/*#define NXPBUILD__PH_DEBUG*/ /**< TODO: To be checked if required */
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/** @}
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* end of ph_NxpBuild
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*/
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#endif /* PH_NXPBUILD_LPC_H */
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