96 lines
2.2 KiB
C
96 lines
2.2 KiB
C
/*
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* phPlatform_Port_K8X_PN5180.h
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*
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* Created on: Apr 14, 2016
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* Author: nxp69678
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*/
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#ifndef NXPRDLIB_INTFS_PHPLATFORM_PORT_K82_PN5180_H_
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#define NXPRDLIB_INTFS_PHPLATFORM_PORT_K82_PN5180_H_
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#include <ph_Status.h>
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#if defined (NXPBUILD__PHHAL_HW_PN5180) && \
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defined (NXPBUILD__PH_KINETIS_K82)
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//#include "board.h"
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//#include "pin_mux.h"
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//#include "clock_config.h"
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#include "fsl_pit.h"
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#include "fsl_gpio.h"
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#include "fsl_common.h"
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#include "fsl_port.h"
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#include "fsl_dspi.h"
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#define RESET_POWERDOWN_LEVEL PH_PLATFORM_SET_LOW
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#define RESET_POWERUP_LEVEL PH_PLATFORM_SET_HIGH
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#define PORT_RESET PORTA
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#define GPIO_RESET GPIOA
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#define PIN_RESET 13
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#define PORT_INTERRUPT PORTC
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#define GPIO_INTERRUPT GPIOC
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#define PIN_NO 7
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#define PORT_BUSY PORTA
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#define GPIO_BUSY GPIOA
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#define PIN_BUSY 5
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#define PORT_DWL_REQ PORTA
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#define GPIO_DWL_REQ GPIOA
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#define PIN_DWL_REQ 12
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#define PORT_IFSEL0_REQ PORTB
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#define GPIO_IFSEL0_REQ GPIOB
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#define PIN_IFSEL0_REQ 16
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#define PORT_IFSEL1_REQ PORTB
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#define GPIO_IFSEL1_REQ GPIOB
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#define PIN_IFSEL1_REQ 17
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#define PORT_AD0_REQ PORTB
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#define GPIO_AD0_REQ GPIOB
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#define PIN_AD0_REQ 20
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#define PORT_AD1_REQ PORTB
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#define GPIO_AD1_REQ GPIOB
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#define PIN_AD1_REQ 21
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#define PORT_AD2_REQ PORTB
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#define GPIO_AD2_REQ GPIOB
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#define PIN_AD2_REQ 22
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#define PIN_INTERRUPT (1 << PIN_NO)
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#define EINT_IRQn PORTC_IRQn
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#define EINT_PRIORITY 8
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#define RF_IRQ_Handler PORTC_IRQHandler
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#define INT_TRIGGER_TYPE kPORT_InterruptRisingEdge
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/* SPI Configuration */
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#define DSPI_DATA_RATE 5000000U
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#define DSPI_MASTER_CLOCK_SRC DSPI0_CLK_SRC
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#define DSPI_IRQ SPI0_IRQn
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#define DSPI_IRQ_PRIORITY 7
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#define KINETIS_DSPI_MASTER DSPI0
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#define PORT_SSP_1 PORTA
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#define FIRST_PINNUM_SSP 15
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#define PORT_SSP_2 PORTA
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#define SECOND_PINNUM_SSP 16
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#define PORT_SSP_3 PORTA
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#define THIRD_PINNUM_SSP 17
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#define PORT_SSP_SSEL PORTA
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#define GPIO_SSP_SSEL GPIOA
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#define SSEL_PINNUM_SSP 14
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#endif
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#endif /* NXPRDLIB_INTFS_PHPLATFORM_PORT_K82_PN5180_H_ */
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