364 lines
10 KiB
C
364 lines
10 KiB
C
/*
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* Copyright (c), NXP Semiconductors Gratkorn / Austria
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*
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* (C)NXP Semiconductors
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* All rights are reserved. Reproduction in whole or in part is
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* prohibited without the written consent of the copyright owner.
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* NXP reserves the right to make changes without notice at any time.
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* NXP makes no warranty, expressed, implied or statutory, including but
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* not limited to any implied warranty of merchantability or fitness for any
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*particular purpose, or that the use will not infringe any third party patent,
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* copyright or trademark. NXP must not be liable for any loss or damage
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* arising from its use.
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*/
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/** \file
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* Build System Definitions for Reader Library Framework.
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* $Author: Purnank G (ing05193) $
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* $Revision: 6156 $ (v4.040.05.011646)
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* $Date: 2016-09-23 18:04:23 +0530 (Fri, 23 Sep 2016) $
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*
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* History:
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* MK: Generated 15. October 2009
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*
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*/
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#ifndef PH_NXPBUILD_H
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#define PH_NXPBUILD_H
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#ifdef NXPBUILD_CUSTOMER_HEADER_INCLUDED
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# include <ph_NxpBuild_App.h>
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#else /* NXPBUILD_CUSTOMER_HEADER_INCLUDED */
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# ifdef _WIN32
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# include <ph_NxpBuild_Pc.h>
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# else /* _WIN32 */
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# include <ph_NxpBuild_Lpc.h>
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# endif /* _WIN32 */
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#endif /* NXPBUILD_CUSTOMER_HEADER_INCLUDED */
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/* #define NXPRDLIB_REM_GEN_INTFS */
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/** \defgroup ph_NxpBuild NXP Build
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* \brief Controls build behaviour of components.
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* @{
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*/
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/* NXPBUILD_DELETE: included code lines should be always removed from code */
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/* NXP Build defines */
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/* use #define to include components */
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/* comment out #define to exclude components */
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/* DEBUG build mode */
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/*#define NXPBUILD__PH_DEBUG*/ /**< DEBUG build definition */
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/* BAL components */
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#if defined (NXPBUILD__PHBAL_REG_LPCOPEN_SPI) || \
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defined (NXPBUILD__PHBAL_REG_LPCOPEN_I2C) || \
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defined (NXPBUILD__PHBAL_REG_KINETIS_SPI) || \
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defined (NXPBUILD__PHBAL_REG_KINETIS_I2C) || \
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defined (NXPBUILD__PHBAL_REG_LINUX_KERNEL_SPI) || \
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defined (NXPBUILD__PHBAL_REG_LINUX_USER_SPI) || \
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defined (NXPBUILD__PHBAL_REG_LINUX_USER_I2C)
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#define NXPBUILD__PHBAL_REG /**< Generic BAL definition */
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#endif
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/* HAL components */
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#if defined (NXPBUILD__PHHAL_HW_RC523) || \
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defined (NXPBUILD__PHHAL_HW_RC663) || \
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defined (NXPBUILD__PHHAL_HW_PN7462AU) || \
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defined (NXPBUILD__PHHAL_HW_PN5180)
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#define NXPBUILD__PHHAL_HW /**< Generic HAL definition */
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#endif
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#ifdef NXPBUILD__PHHAL_HW_RC663
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/* No active/target mode for RC663 */
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#undef NXPBUILD__PHHAL_HW_TARGET
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#undef NXPBUILD__PHAC_DISCLOOP_TYPEA_P2P_ACTIVE
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#undef NXPBUILD__PHAC_DISCLOOP_TYPEF212_P2P_ACTIVE
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#undef NXPBUILD__PHAC_DISCLOOP_TYPEF424_P2P_ACTIVE
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#endif /* NXPBUILD__PHHAL_HW_RC663 */
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/* PAL ISO 14443-3A components */
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#if defined (NXPBUILD__PHPAL_I14443P3A_SW)
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#define NXPBUILD__PHPAL_I14443P3A /**< Generic PAL ISO 14443-3A definition */
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#endif
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/* PAL ISO 14443-3B components */
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#if defined (NXPBUILD__PHPAL_I14443P3B_SW)
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#define NXPBUILD__PHPAL_I14443P3B /**< Generic PAL ISO 14443-3B definition */
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#endif
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/* PAL ISO 14443-4A components */
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#if defined (NXPBUILD__PHPAL_I14443P4A_SW)
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#define NXPBUILD__PHPAL_I14443P4A /**< Generic PAL ISO 14443-4A definition */
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#endif
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/* PAL ISO 14443-4 components */
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#if defined (NXPBUILD__PHPAL_I14443P4_SW)
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#define NXPBUILD__PHPAL_I14443P4 /**< Generic PAL ISO 14443-4 definition */
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#endif
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/* PAL ISO 18092 Target component */
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#if defined (NXPBUILD__PHPAL_I14443P4MC_SW)
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#define NXPBUILD__PHPAL_I14443P4MC /**< Generic PAL ISO 18092 target definition */
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#endif
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/* PAL MIFARE components */
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#if defined (NXPBUILD__PHPAL_MIFARE_SW)
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#define NXPBUILD__PHPAL_MIFARE /**< Generic PAL MIFARE definition */
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#endif
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/* PAL ISO15693 ICode SLI components */
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#if defined (NXPBUILD__PHPAL_SLI15693_SW)
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#define NXPBUILD__PHPAL_SLI15693 /**< Generic PAL Sli 15693 definition */
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#endif
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/* PAL Felica components */
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/*#define HANDLE_MULTIPLE_FELICA_CARD_RESP */ /**< Enable handling of multiple Felica card response */
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#if defined (NXPBUILD__PHPAL_FELICA_SW)
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#define NXPBUILD__PHPAL_FELICA /**< Generic PAL Felica definition */
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#endif
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/* PAL ICode EPC/UID components */
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#if defined (NXPBUILD__PHPAL_EPCUID_SW)
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#define NXPBUILD__PHPAL_EPCUID /**< Generic PAL ICode EPC/UID definition */
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#endif
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/* PAL I18000p3m3 components */
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#if defined (NXPBUILD__PHPAL_I18000P3M3_SW)
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#define NXPBUILD__PHPAL_I18000P3M3 /**< Generic PAL I18000p3m3 definition */
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#endif
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/* PAL ISO 18092 components */
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#if defined (NXPBUILD__PHPAL_I18092MPI_SW)
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#define NXPBUILD__PHPAL_I18092MPI /**< Generic PAL ISO 18092 definition */
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#endif
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/* PAL ISO 18092 Target component */
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#if defined (NXPBUILD__PHPAL_I18092MT_SW)
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#define NXPBUILD__PHPAL_I18092MT /**< Generic PAL ISO 18092 target definition */
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#endif
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/* AC dicover loop component */
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#if defined (NXPBUILD__PHAC_DISCLOOP_SW)
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#define NXPBUILD__PHAC_DISCLOOP /**< Generic dicovery loop component */
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#endif
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#if defined (NXPBUILD__PHAC_DISCLOOP_TYPEA_I3P3_TAGS) || \
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defined (NXPBUILD__PHAC_DISCLOOP_TYPEA_I3P4_TAGS) || \
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defined (NXPBUILD__PHAC_DISCLOOP_TYPEA_JEWEL_TAGS) || \
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defined (NXPBUILD__PHAC_DISCLOOP_TYPEA_P2P_TAGS)
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#define NXPBUILD__PHAC_DISCLOOP_TYPEA_TAGS /**< Detect Passive TypeA Tags/Peers */
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#endif
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#if defined (NXPBUILD__PHAC_DISCLOOP_TYPEF_P2P_TAGS)
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#define NXPBUILD__PHAC_DISCLOOP_TYPEF_TAGS
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#endif
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#if defined (NXPBUILD__PHAC_DISCLOOP_TYPEB_I3P3B_TAGS) || \
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defined (NXPBUILD__PHAC_DISCLOOP_TYPEB_I3P4B_TAGS) || \
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defined (NXPBUILD__PHAC_DISCLOOP_TYPEB_BPRIME_TAGS)
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#define NXPBUILD__PHAC_DISCLOOP_TYPEB_TAGS /**< Detect TypeB Tags */
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#endif
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#if defined (NXPBUILD__PHAC_DISCLOOP_TYPEA_TARGET_PASSIVE) || \
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defined (NXPBUILD__PHAC_DISCLOOP_TYPEA_TARGET_ACTIVE) || \
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defined (NXPBUILD__PHAC_DISCLOOP_TYPEF212_TARGET_PASSIVE) || \
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defined (NXPBUILD__PHAC_DISCLOOP_TYPEF212_TARGET_ACTIVE) || \
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defined (NXPBUILD__PHAC_DISCLOOP_TYPEF424_TARGET_PASSIVE) || \
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defined (NXPBUILD__PHAC_DISCLOOP_TYPEF424_TARGET_ACTIVE)
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#define NXPBUILD__PHAC_DISCLOOP_TARGET /**< Configure Target Mode */
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#endif
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//#define NXPBUILD__PHAC_DISCLOOP_TYPEA_P2P_ACTIVE /**< Detect type A Active P2P Peer */
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//#define NXPBUILD__PHAC_DISCLOOP_TYPEF212_P2P_ACTIVE /**< Detect type F212 Active P2P Peer */
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//#define NXPBUILD__PHAC_DISCLOOP_TYPEF424_P2P_ACTIVE /**< Detect type F424 Active P2P Peer */
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//
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//#define NXPBUILD__PHAC_DISCLOOP_P2P_ACTIVE
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#if defined (NXPBUILD__PH_OSAL_FREERTOS) || \
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defined (NXPBUILD__PH_OSAL_LINUX) || \
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defined (NXPBUILD__PH_OSAL_NULLOS)
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#define NXPBUILD__PH_OSAL /**< Generic OSAL definition */
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#endif
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/* AL Felica components */
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#if defined (NXPBUILD__PHAL_FELICA_SW)
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#define NXPBUILD__PHAL_FELICA /**< Generic AL Felica definition */
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#endif
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/* AL MIFARE Classic components */
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#if defined (NXPBUILD__PHAL_MFC_SW)
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#define NXPBUILD__PHAL_MFC /**< Generic AL MIFARE Classic definition */
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#endif
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/* AL MIFARE Plus components */
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/* AL MIFARE DESFire Components */
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#if defined (NXPBUILD__PHAL_MFDF_SW)
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#define NXPBUILD__PHAL_MFDF /**< Generic AL MIFARE Desfire definition */
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#endif
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/* AL MIFARE Ultralight components */
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#if defined (NXPBUILD__PHAL_MFUL_SW)
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#define NXPBUILD__PHAL_MFUL /**< Generic AL MIFARE Ultralight definition */
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#endif
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/* AL T1T components */
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#if defined (NXPBUILD__PHAL_T1T_SW)
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#define NXPBUILD__PHAL_T1T /**< Generic AL Type 1 Tag definition */
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#endif
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/* AL TOP components */
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#if defined (NXPBUILD__PHAL_TOP_SW)
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#define NXPBUILD__PHAL_TOP /**< Generic AL Tag Operations */
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#endif
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/* CE T4AT Card Emulation components */
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#if defined (NXPBUILD__PHCE_T4T_SW)
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#define NXPBUILD__PHCE_T4T /**< Generic HCE */
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#endif
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/* AL Virtual Card Architecture components */
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/* DL FPGA Box components */
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/* DL Amplifier components */
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/* DL Thermostream components */
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/* DL Oscilloscope components */
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/* DL Master Amplifier Oscilloscope components */
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/* DL Stepper components */
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/* AL I15693 components */
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#if defined (NXPBUILD__PHAL_I15693_SW)
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#define NXPBUILD__PHAL_I15693 /**< Generic AL I15693 definition */
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#endif
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/* AL Sli components */
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#if defined (NXPBUILD__PHAL_SLI_SW)
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#define NXPBUILD__PHAL_SLI /**< Generic AL Sli definition */
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#endif
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/* AL ISO 18000P3M3 components */
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#if defined (NXPBUILD__PHAL_I18000P3M3_SW)
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#define NXPBUILD__PHAL_I18000P3M3 /**< Generic AL I18000p3m3 definition */
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#endif
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/* AL P40 PrivateCommands components */
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/* AL P40 PublicCommand components */
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/* CID Manager components */
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#if defined (NXPBUILD__PH_CIDMANAGER_SW)
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#define NXPBUILD__PH_CIDMANAGER /**< Generic CID Manager definition */
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#endif
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/* Crypto components */
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#if defined (NXPBUILD__PH_CRYPTOSYM_SW)
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#define NXPBUILD__PH_CRYPTOSYM /**< Generic Crypto Sym definition */
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#endif
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/* CryptoRng components */
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#if defined (NXPBUILD__PH_CRYPTORNG_SW)
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#define NXPBUILD__PH_CRYPTORNG /**< Generic CryptoRng definition */
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#endif
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/* KeyStore components */
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#if defined (NXPBUILD__PH_KEYSTORE_SW) || \
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defined (NXPBUILD__PH_KEYSTORE_RC663)
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#define NXPBUILD__PH_KEYSTORE /**< Generic KeyStore definition */
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#endif
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/* LN components */
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#if defined (NXPBUILD__PHLN_LLCP_SW)
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#define NXPBUILD__PHLN_LLCP /**< Generic Link layer definition */
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#endif
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/* SNEP components */
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#if defined (NXPBUILD__PHNP_SNEP_SW)
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#define NXPBUILD__PHNP_SNEP /**< Generic HAL definition */
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#endif
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#if defined (NXPBUILD__PH_KINETIS_K82) || \
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defined (NXPBUILD__PH_KINETIS_K81)
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#define NXPBUILD__PH_KINETIS /**< Kinetis */
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#endif
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#if defined(NXPBUILD__PH_LPC1769) || \
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defined(NXPBUILD__PH_LPC11U68) || \
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defined(NXPBUILD__PH_RASPBERRY_PI) || \
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defined(NXPBUILD__PH_KINETIS)
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#define PH_PLATFORM_HAS_ICFRONTEND /* Platform has IC Frontend */
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#endif
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/* Log component */
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/*#define NXPBUILD__PH_LOG*/
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/* Enable/disable Debugging */
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/*#define NXPBUILD__PH_DEBUG*/
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/** @}
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* end of ph_NxpBuild
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*/
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#endif /* PH_NXPBUILD_H */
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