Initial commit.

Signed-off-by: Yilin Sun <imi415@imi.moe>

.gitignore

@@ -0,0 +1,5 @@
+/cmake-build-*
+/build
+/board/*.bak
+/.vscode
+

.gitmodules

@@ -0,0 +1,3 @@
+[submodule "MindSDK_MM32F5270"]
+	path = SDK
+	url = https://git.minori.work/Embedded_SDK/MindSDK_MM32F5270.git

CMakeLists.txt

@@ -0,0 +1,145 @@
+cmake_minimum_required(VERSION 3.10)
+
+project(plus_template)
+
+enable_language(CXX)
+enable_language(ASM)
+
+# Different linker scripts
+set(TARGET_LDSCRIPT_FLASH "${CMAKE_SOURCE_DIR}/SDK/device/armgcc/linker/mm32f5277e_flash.ld")
+set(TARGET_LDSCRIPT_RAM   "${CMAKE_SOURCE_DIR}/app_ram.ld")
+
+set(TARGET_SOURCES
+    "SDK/device/drivers/hal_adc.c"
+    "SDK/device/drivers/hal_bkp.c"
+    "SDK/device/drivers/hal_comp.c"
+    "SDK/device/drivers/hal_cordic.c"
+    "SDK/device/drivers/hal_crc.c"
+    "SDK/device/drivers/hal_dac.c"
+    "SDK/device/drivers/hal_dma.c"
+    "SDK/device/drivers/hal_enet.c"
+    "SDK/device/drivers/hal_exti.c"
+    "SDK/device/drivers/hal_flash.c"
+    "SDK/device/drivers/hal_flexcan.c"
+    "SDK/device/drivers/hal_fsmc.c"
+    "SDK/device/drivers/hal_gpio.c"
+    "SDK/device/drivers/hal_i2c.c"
+    "SDK/device/drivers/hal_i2s.c"
+    "SDK/device/drivers/hal_iwdg.c"
+    "SDK/device/drivers/hal_lptim.c"
+    "SDK/device/drivers/hal_lpuart.c"
+    "SDK/device/drivers/hal_mds.c"
+    "SDK/device/drivers/hal_power.c"
+    "SDK/device/drivers/hal_pwr.c"
+    "SDK/device/drivers/hal_qspi.c"
+    "SDK/device/drivers/hal_rcc.c"
+    "SDK/device/drivers/hal_rtc.c"
+    "SDK/device/drivers/hal_spi.c"
+    "SDK/device/drivers/hal_syscfg.c"
+    "SDK/device/drivers/hal_tim.c"
+    "SDK/device/drivers/hal_uart.c"
+    "SDK/device/drivers/hal_usb.c"
+    "SDK/device/drivers/hal_wwdg.c"
+    "SDK/device/system_mm32f5277e.c"
+    "SDK/device/armgcc/startup_mm32f5277e.S"
+    "board/board_init.c"
+    "board/clock_init.c"
+    "board/pin_init.c"
+    "src/app_syscalls.c"
+    "src/main.c"
+)
+
+set(TARGET_C_DEFINES
+    "__STARTUP_CLEAR_BSS"
+)
+
+set(TARGET_C_INCLUDES
+    "SDK/device"
+    "SDK/device/CMSIS/Include"
+    "SDK/device/drivers"
+    "board"
+    "include"
+)
+
+# Shared libraries linked with application
+set(TARGET_LIBS
+    "c"
+    "m"
+    "nosys"
+)
+
+# Shared library and linker script search paths
+set(TARGET_LIB_DIRECTORIES
+    "${CMAKE_SOURCE_DIR}/SDK/device/armgcc/linker"
+)
+
+# Conditional flags
+# DEBUG
+set(CMAKE_C_FLAGS_DEBUG     "-DDEBUG -Og -g")
+set(CMAKE_CXX_FLAGS_DEBUG   "-DDEBUG -Og -g")
+set(CMAKE_ASM_FLAGS_DEBUG   "-DDEBUG -Og -g")
+
+# RELEASE
+set(CMAKE_C_FLAGS_RELEASE        "-DNDEBUG -O2 -flto")
+set(CMAKE_CXX_FLAGS_RELEASE      "-DNDEBUG -O2 -flto")
+set(CMAKE_ASM_FLAGS_RELEASE      "-DNDEBUG -O2 -flto")
+set(CMAKE_EXE_LINKER_FLAGS_RELEASE "-flto")
+
+# Final compiler flags
+set(CMAKE_C_FLAGS          "${CMAKE_C_FLAGS} -Wall -fno-common -fno-builtin -ffreestanding -fdata-sections -ffunction-sections")
+set(CMAKE_CXX_FLAGS        "${CMAKE_CXX_FLAGS} -Wall -fno-common -fno-builtin -ffreestanding -fdata-sections -ffunction-sections")
+set(CMAKE_ASM_FLAGS        "${CMAKE_C_FLAGS} -x assembler-with-cpp")
+set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--gc-sections")
+
+# Shared sources, includes and definitions
+add_compile_definitions(${TARGET_C_DEFINES})
+include_directories(${TARGET_C_INCLUDES})
+link_directories(${TARGET_LIB_DIRECTORIES})
+link_libraries(${TARGET_LIBS})
+
+# Main targets are added here
+
+# Create ELF
+add_executable("${CMAKE_PROJECT_NAME}_FLASH.elf" ${TARGET_SOURCES})
+target_compile_definitions("${CMAKE_PROJECT_NAME}_FLASH.elf"
+    PRIVATE ${TARGET_C_DEFINES_XIP}
+    )
+target_link_options("${CMAKE_PROJECT_NAME}_FLASH.elf"
+    PRIVATE "-T${TARGET_LDSCRIPT_FLASH}"
+    PRIVATE "-Wl,--Map=${CMAKE_PROJECT_NAME}_FLASH.map"
+    )
+set_property(TARGET "${CMAKE_PROJECT_NAME}_FLASH.elf" APPEND
+    PROPERTY ADDITIONAL_CLEAN_FILES "${CMAKE_PROJECT_NAME}_FLASH.map"
+    )
+add_custom_command(OUTPUT "${CMAKE_PROJECT_NAME}_FLASH.hex"
+    COMMAND ${CMAKE_OBJCOPY} "-O" "ihex" "${CMAKE_PROJECT_NAME}_FLASH.elf" "${CMAKE_PROJECT_NAME}_FLASH.hex"
+    DEPENDS "${CMAKE_PROJECT_NAME}_FLASH.elf"
+    )
+add_custom_target("${CMAKE_PROJECT_NAME}_FLASH_HEX" DEPENDS "${CMAKE_PROJECT_NAME}_FLASH.hex")
+if(DEFINED TARGET_TOOLCHAIN_SIZE)
+    add_custom_command(TARGET "${CMAKE_PROJECT_NAME}_FLASH.elf" POST_BUILD
+        COMMAND ${TARGET_TOOLCHAIN_SIZE} "${CMAKE_PROJECT_NAME}_FLASH.elf"
+        )
+endif()
+
+
+# Create ELF
+add_executable("${CMAKE_PROJECT_NAME}_RAM.elf" ${TARGET_SOURCES})
+target_link_options("${CMAKE_PROJECT_NAME}_RAM.elf"
+    PRIVATE "-T${TARGET_LDSCRIPT_RAM}"
+    PRIVATE "-Wl,--Map=${CMAKE_PROJECT_NAME}_RAM.map"
+    )
+set_property(TARGET "${CMAKE_PROJECT_NAME}_RAM.elf" APPEND
+    PROPERTY ADDITIONAL_CLEAN_FILES "${CMAKE_PROJECT_NAME}_RAM.map"
+    )
+add_custom_command(OUTPUT "${CMAKE_PROJECT_NAME}_RAM.hex"
+    COMMAND ${CMAKE_OBJCOPY} "-O" "ihex" "${CMAKE_PROJECT_NAME}_RAM.elf" "${CMAKE_PROJECT_NAME}_RAM.hex"
+    DEPENDS "${CMAKE_PROJECT_NAME}_RAM.elf"
+    )
+add_custom_target("${CMAKE_PROJECT_NAME}_RAM_HEX" DEPENDS "${CMAKE_PROJECT_NAME}_RAM.hex")
+if(DEFINED TARGET_TOOLCHAIN_SIZE)
+    add_custom_command(TARGET "${CMAKE_PROJECT_NAME}_RAM.elf" POST_BUILD
+        COMMAND ${TARGET_TOOLCHAIN_SIZE} "${CMAKE_PROJECT_NAME}_RAM.elf"
+        )
+endif()
+

SDK

@@ -0,0 +1 @@
+Subproject commit 3977144e90e122d7c416c558db8d2878f29dc3a9

arm-none-eabi.cmake

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+# Poor old Windows...
+if(WIN32)
+    set(CMAKE_SYSTEM_NAME "Generic")
+endif()
+
+set(CMAKE_C_COMPILER   arm-none-eabi-gcc)
+set(CMAKE_CXX_COMPILER arm-none-eabi-g++)
+
+# Optionally set size binary name, for elf section size reporting.
+set(TARGET_TOOLCHAIN_SIZE arm-none-eabi-size)
+
+set(CMAKE_C_FLAGS_INIT   "-mcpu=cortex-m33 -mthumb -mfloat-abi=hard -mfpu=fpv5-sp-d16")
+set(CMAKE_CXX_FLAGS_INIT "-mcpu=cortex-m33 -mthumb -mfloat-abi=soft -mfpu=fpv5-sp-d16")
+set(CMAKE_EXE_LINKER_FLAGS_INIT "-specs=nano.specs -specs=nosys.specs -u _printf_float -Wl,--print-memory-usage -Wl,--no-warn-rwx-segments")
+
+# Make CMake happy about those compilers
+set(CMAKE_TRY_COMPILE_TARGET_TYPE "STATIC_LIBRARY")

board/board_init.c

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+#include "board_init.h"
+
+#include "hal_gpio.h"
+
+void BOARD_InitDebugConsole(void);
+
+void BOARD_Init(void) {
+    BOARD_InitBootClocks();
+    BOARD_InitPins();
+
+    BOARD_InitDebugConsole();
+}
+
+void BOARD_InitDebugConsole(void) {
+    UART_Init_Type uart_init;
+
+    uart_init.ClockFreqHz              = BOARD_DEBUG_UART_FREQ;
+    uart_init.BaudRate                 = BOARD_DEBUG_UART_BAUDRATE;
+    uart_init.WordLength               = UART_WordLength_8b;
+    uart_init.StopBits                 = UART_StopBits_1;
+    uart_init.Parity                   = UART_Parity_None;
+    uart_init.XferMode                 = UART_XferMode_RxTx;
+    uart_init.HwFlowControl            = UART_HwFlowControl_None;
+    uart_init.XferSignal               = UART_XferSignal_Normal;
+    uart_init.EnableSwapTxRxXferSignal = false;
+    UART_Init(BOARD_DEBUG_UART_PORT, &uart_init);
+    UART_Enable(BOARD_DEBUG_UART_PORT, true);
+}

board/board_init.h

@@ -0,0 +1,19 @@
+#ifndef BOARD_INIT_H
+#define BOARD_INIT_H
+
+#include <stdint.h>
+
+#include "clock_init.h"
+#include "hal_common.h"
+#include "hal_rcc.h"
+#include "hal_uart.h"
+#include "pin_init.h"
+
+/* DEBUG UART. */
+#define BOARD_DEBUG_UART_PORT     UART1
+#define BOARD_DEBUG_UART_BAUDRATE 9600u
+#define BOARD_DEBUG_UART_FREQ     CLOCK_APB2_FREQ
+
+void BOARD_Init(void);
+
+#endif  // BOARD_INIT_H

board/clock_init.c

@@ -0,0 +1,83 @@
+#include "clock_init.h"
+
+#include "hal_common.h"
+#include "hal_rcc.h"
+
+void CLOCK_ResetToDefault(void);
+void CLOCK_BootToHSI96MHz(void);
+void CLOCK_BootToHSE96MHz(void);
+void CLOCK_BootToHSE120MHz(void);
+
+void BOARD_InitBootClocks(void) {
+    CLOCK_ResetToDefault();
+    CLOCK_BootToHSE120MHz();
+
+    /* UART1. */
+    RCC_EnableAPB2Periphs(RCC_APB2_PERIPH_UART1, true);
+    RCC_ResetAPB2Periphs(RCC_APB2_PERIPH_UART1);
+
+    /* GPIOB. */
+    RCC_EnableAHB1Periphs(RCC_AHB1_PERIPH_GPIOB, true);
+    RCC_ResetAHB1Periphs(RCC_AHB1_PERIPH_GPIOB);
+}
+
+/* Switch to HSI. */
+void CLOCK_ResetToDefault(void) {
+    /* Switch to HSI. */
+    RCC->CR |= RCC_CR_HSION_MASK; /* Make sure the HSI is enabled. */
+    while (RCC_CR_HSIRDY_MASK != (RCC->CR & RCC_CR_HSIRDY_MASK)) {
+    }
+    RCC->CFGR = RCC_CFGR_SW(0u);                                /* Reset other clock sources and switch to HSI. */
+    while (RCC_CFGR_SWS(0u) != (RCC->CFGR & RCC_CFGR_SWS_MASK)) /* Wait while the SYSCLK is switch to the HSI. */
+    {
+    }
+
+    /* Reset all other clock sources. */
+    RCC->CR = RCC_CR_HSION_MASK;
+
+    /* Disable all interrupts and clear pending bits. */
+    RCC->CIR = RCC->CIR; /* clear flags. */
+    RCC->CIR = 0u;       /* disable interrupts. */
+}
+
+/* Enable the PLL1 and use the HSE as input clock source. */
+void CLOCK_BootToHSE120MHz(void) {
+    RCC->APB1ENR |= (1u << 28u);                                 /* enable PWR/DBG. */
+    PWR->CR1 = (PWR->CR1 & ~PWR_CR1_VOS_MASK) | PWR_CR1_VOS(3u); /* 1.7V. */
+
+    /* enable HSE. */
+    RCC->CR |= RCC_CR_HSEON_MASK;
+    while (RCC_CR_HSERDY_MASK != (RCC->CR & RCC_CR_HSERDY_MASK)) {
+    }
+
+    RCC->PLL1CFGR = RCC_PLL1CFGR_PLL1SRC(1)    /* (pllsrc == 1) ? HSE : HSI. */
+                    | RCC_PLL1CFGR_PLL1MUL(19) /* (12 * (19 + 1)) / 2 = 120. */
+                    | RCC_PLL1CFGR_PLL1DIV(1) | RCC_PLL1CFGR_PLL1LDS(1) | RCC_PLL1CFGR_PLL1ICTRL(3);
+
+    /* Enable PLL1. */
+    RCC->CR |= RCC_CR_PLL1ON_MASK;
+    while ((RCC->CR & RCC_CR_PLL1RDY_MASK) == 0) {
+    }
+
+    /* Enable the FLASH prefetch. */
+    RCC->AHB1ENR |= (1u << 13u);         /* enable the access to FLASH. */
+    FLASH->ACR = FLASH_ACR_LATENCY(4u)   /* setup divider. */
+                 | FLASH_ACR_PRFTBE_MASK /* enable flash prefetch. */
+        ;
+
+    /* Setup the dividers for each bus. */
+    RCC->CFGR = RCC_CFGR_HPRE(0)      /* div=1 for AHB freq. */
+                | RCC_CFGR_PPRE1(0x4) /* div=2 for APB1 freq. */
+                | RCC_CFGR_PPRE2(0x4) /* div=2 for APB2 freq. */
+                | RCC_CFGR_MCO(7)     /* use PLL1 as output. */
+        ;
+
+    /* Switch the system clock source to PLL. */
+    RCC->CFGR = (RCC->CFGR & ~RCC_CFGR_SW_MASK) | RCC_CFGR_SW(2); /* use PLL as SYSCLK */
+
+    /* Wait till PLL is used as system clock source. */
+    while ((RCC->CFGR & RCC_CFGR_SWS_MASK) != RCC_CFGR_SWS(2)) {
+    }
+}
+
+/* EOF. */

board/clock_init.h

@@ -0,0 +1,12 @@
+#ifndef CLOCK_INIT_H
+#define CLOCK_INIT_H
+
+#define CLOCK_SYS_FREQ     120000000u
+#define CLOCK_SYSTICK_FREQ (CLOCK_SYS_FREQ / 8u)
+#define CLOCK_AHB1_FREQ    120000000u
+#define CLOCK_APB1_FREQ    60000000u
+#define CLOCK_APB2_FREQ    60000000u
+
+void BOARD_InitBootClocks(void);
+
+#endif  // CLOCK_INIT_H

board/pin_init.c

@@ -0,0 +1,21 @@
+#include "pin_init.h"
+
+#include "hal_gpio.h"
+#include "hal_rcc.h"
+
+void BOARD_InitPins(void) {
+    /* PB7 - UART1_TX. */
+    GPIO_Init_Type gpio_init;
+    gpio_init.Pins  = GPIO_PIN_6;
+    gpio_init.PinMode  = GPIO_PinMode_AF_PushPull; //GPIO_PinMode_AF_PushPull
+    gpio_init.Speed = GPIO_Speed_50MHz;
+    GPIO_Init(GPIOB, &gpio_init);
+    GPIO_PinAFConf(GPIOB, gpio_init.Pins, GPIO_AF_7);
+
+    /* PB6 - UART1_RX. */
+    gpio_init.Pins  = GPIO_PIN_7;
+    gpio_init.PinMode  = GPIO_PinMode_In_Floating; //GPIO_PinMode_In_Floating
+    gpio_init.Speed = GPIO_Speed_50MHz;
+    GPIO_Init(GPIOB, &gpio_init);
+    GPIO_PinAFConf(GPIOB, gpio_init.Pins, GPIO_AF_7);
+}

board/pin_init.h

@@ -0,0 +1,6 @@
+#ifndef PIN_INIT_H
+#define PIN_INIT_H
+
+void BOARD_InitPins(void);
+
+#endif  // PIN_INIT_H

src/app_syscalls.c

@@ -0,0 +1,45 @@
+#include "board_init.h"
+#include "hal_uart.h"
+
+int _write(int fd, char *ptr, int len) {
+    int i = 0;
+
+    if (fd > 2) {
+        return -1;
+    }
+
+    while (*ptr && (i < len)) {
+        while (0u == (UART_STATUS_TX_EMPTY & UART_GetStatus(BOARD_DEBUG_UART_PORT))) {
+        }
+        UART_PutData(BOARD_DEBUG_UART_PORT, (uint8_t)(*ptr));
+        i++;
+        ptr++;
+    }
+
+    return i;
+}
+
+int _read(int fd, char *ptr, int len) {
+    int my_len;
+
+    if (fd > 2) {
+        return -1;
+    }
+
+    my_len = 0;
+    while (len > 0) {
+        while (0u == (UART_STATUS_RX_DONE & UART_GetStatus(BOARD_DEBUG_UART_PORT))) {
+        }
+        *ptr = UART_GetData(BOARD_DEBUG_UART_PORT);
+        len--;
+        my_len++;
+
+        if ((*ptr == '\r') || (*ptr == '\n') || (*ptr == '\0')) {
+            break;
+        }
+
+        ptr++;
+    }
+
+    return my_len;
+}

src/main.c

@@ -0,0 +1,15 @@
+#include <stdio.h>
+
+#include "hal_gpio.h"
+
+#include "board_init.h"
+
+int main(void) {
+    BOARD_Init();
+
+    printf("Hello world!!\r\n");
+
+    for (;;) {
+        /* -- */
+    }
+}