diff --git a/.clang-format b/.clang-format
new file mode 100644
index 0000000..38ed48a
--- /dev/null
+++ b/.clang-format
@@ -0,0 +1,149 @@
+---
+Language: Cpp
+# BasedOnStyle: LLVM
+AccessModifierOffset: -4
+AlignAfterOpenBracket: Align
+AlignConsecutiveMacros: false
+AlignConsecutiveAssignments: false
+AlignConsecutiveBitFields: false
+AlignConsecutiveDeclarations: false
+AlignEscapedNewlines: Right
+AlignOperands: Align
+AlignTrailingComments: true
+AllowAllArgumentsOnNextLine: true
+AllowAllConstructorInitializersOnNextLine: true
+AllowAllParametersOfDeclarationOnNextLine: true
+AllowShortEnumsOnASingleLine: true
+AllowShortBlocksOnASingleLine: Never
+AllowShortCaseLabelsOnASingleLine: false
+AllowShortFunctionsOnASingleLine: All
+AllowShortLambdasOnASingleLine: All
+AllowShortIfStatementsOnASingleLine: true
+AllowShortLoopsOnASingleLine: false
+AlwaysBreakAfterDefinitionReturnType: None
+AlwaysBreakAfterReturnType: None
+AlwaysBreakBeforeMultilineStrings: false
+AlwaysBreakTemplateDeclarations: MultiLine
+BinPackArguments: true
+BinPackParameters: true
+BraceWrapping:
+ AfterCaseLabel: false
+ AfterClass: false
+ AfterControlStatement: Never
+ AfterEnum: false
+ AfterFunction: false
+ AfterNamespace: false
+ AfterObjCDeclaration: false
+ AfterStruct: false
+ AfterUnion: false
+ AfterExternBlock: false
+ BeforeCatch: false
+ BeforeElse: false
+ BeforeLambdaBody: false
+ BeforeWhile: false
+ IndentBraces: false
+ SplitEmptyFunction: true
+ SplitEmptyRecord: true
+ SplitEmptyNamespace: true
+BreakBeforeBinaryOperators: None
+BreakBeforeBraces: Attach
+BreakBeforeInheritanceComma: false
+BreakInheritanceList: BeforeColon
+BreakBeforeTernaryOperators: true
+BreakConstructorInitializersBeforeComma: false
+BreakConstructorInitializers: BeforeColon
+BreakAfterJavaFieldAnnotations: false
+BreakStringLiterals: true
+ColumnLimit: 80
+CommentPragmas: '^ IWYU pragma:'
+CompactNamespaces: false
+ConstructorInitializerAllOnOneLineOrOnePerLine: false
+ConstructorInitializerIndentWidth: 4
+ContinuationIndentWidth: 4
+Cpp11BracedListStyle: true
+DeriveLineEnding: true
+DerivePointerAlignment: false
+DisableFormat: false
+ExperimentalAutoDetectBinPacking: false
+FixNamespaceComments: true
+ForEachMacros:
+ - foreach
+ - Q_FOREACH
+ - BOOST_FOREACH
+IncludeBlocks: Preserve
+IncludeCategories:
+ - Regex: '^"(llvm|llvm-c|clang|clang-c)/'
+ Priority: 2
+ SortPriority: 0
+ - Regex: '^(<|"(gtest|gmock|isl|json)/)'
+ Priority: 3
+ SortPriority: 0
+ - Regex: '.*'
+ Priority: 1
+ SortPriority: 0
+IncludeIsMainRegex: '(Test)?$'
+IncludeIsMainSourceRegex: ''
+IndentCaseLabels: false
+IndentCaseBlocks: false
+IndentGotoLabels: true
+IndentPPDirectives: None
+IndentExternBlock: AfterExternBlock
+IndentWidth: 4
+IndentWrappedFunctionNames: false
+InsertTrailingCommas: None
+JavaScriptQuotes: Leave
+JavaScriptWrapImports: true
+KeepEmptyLinesAtTheStartOfBlocks: true
+MacroBlockBegin: ''
+MacroBlockEnd: ''
+MaxEmptyLinesToKeep: 1
+NamespaceIndentation: None
+ObjCBinPackProtocolList: Auto
+ObjCBlockIndentWidth: 2
+ObjCBreakBeforeNestedBlockParam: true
+ObjCSpaceAfterProperty: false
+ObjCSpaceBeforeProtocolList: true
+PenaltyBreakAssignment: 2
+PenaltyBreakBeforeFirstCallParameter: 19
+PenaltyBreakComment: 300
+PenaltyBreakFirstLessLess: 120
+PenaltyBreakString: 1000
+PenaltyBreakTemplateDeclaration: 10
+PenaltyExcessCharacter: 1000000
+PenaltyReturnTypeOnItsOwnLine: 60
+PointerAlignment: Right
+ReflowComments: true
+SortIncludes: true
+SortUsingDeclarations: true
+SpaceAfterCStyleCast: false
+SpaceAfterLogicalNot: false
+SpaceAfterTemplateKeyword: true
+SpaceBeforeAssignmentOperators: true
+SpaceBeforeCpp11BracedList: false
+SpaceBeforeCtorInitializerColon: true
+SpaceBeforeInheritanceColon: true
+SpaceBeforeParens: false
+SpaceBeforeRangeBasedForLoopColon: true
+SpaceInEmptyBlock: false
+SpaceInEmptyParentheses: false
+SpacesBeforeTrailingComments: 1
+SpacesInAngles: false
+SpacesInConditionalStatement: false
+SpacesInContainerLiterals: true
+SpacesInCStyleCastParentheses: false
+SpacesInParentheses: false
+SpacesInSquareBrackets: false
+SpaceBeforeSquareBrackets: false
+Standard: Latest
+StatementMacros:
+ - Q_UNUSED
+ - QT_REQUIRE_VERSION
+TabWidth: 8
+UseCRLF: false
+UseTab: Never
+WhitespaceSensitiveMacros:
+ - STRINGIZE
+ - PP_STRINGIZE
+ - BOOST_PP_STRINGIZE
+...
+
diff --git a/CMakeLists.txt b/CMakeLists.txt
index 4d586fb..c7fd418 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -49,6 +49,7 @@ set(C_SOURCES
"source/user_irqhandlers.c"
"source/sdmmc_config.c"
"source/tasks/user_hello_task.c"
+ "source/tasks/user_sdcard_task.c"
"board/peripherals.c"
"board/pin_mux.c"
"board/board.c"
@@ -83,6 +84,7 @@ add_definitions(
"-DSERIAL_PORT_TYPE_UART=1"
"-D__STARTUP_CLEAR_BSS"
"-D__STARTUP_INITIALIZE_NONCACHEDATA"
+ "-DSD_ENABLED"
)
# Copy them from Makefile
diff --git a/board/board.c b/board/board.c
index fd5b102..36f3aa4 100644
--- a/board/board.c
+++ b/board/board.c
@@ -250,9 +250,6 @@ void BOARD_ConfigMPU(void)
MPU->RBAR = ARM_MPU_RBAR(0, 0x80000000U);
MPU->RASR = ARM_MPU_RASR(1, ARM_MPU_AP_FULL, 1, 1, 1, 0, 0, ARM_MPU_REGION_SIZE_32MB);
- MPU->RBAR = ARM_MPU_RBAR(1, 0x80000000U);
- MPU->RASR = ARM_MPU_RASR(1, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_1MB);
-
MPU->RBAR = ARM_MPU_RBAR(2, 0x00000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_128KB);
diff --git a/board/peripherals.c b/board/peripherals.c
index ca8390c..a6500a3 100644
--- a/board/peripherals.c
+++ b/board/peripherals.c
@@ -312,6 +312,8 @@ instance:
- nvic:
- interrupt_table:
- 0: []
+ - 1: []
+ - 2: []
- interrupts: []
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
@@ -320,6 +322,104 @@ instance:
static void NVIC_init(void) {
} */
+/***********************************************************************************************************************
+ * GPIO1 initialization code
+ **********************************************************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+instance:
+- name: 'GPIO1'
+- type: 'igpio'
+- mode: 'GPIO'
+- custom_name_enabled: 'false'
+- type_id: 'igpio_b1c1fa279aa7069dca167502b8589cb7'
+- functional_group: 'BOARD_InitPeripherals'
+- peripheral: 'GPIO1'
+- config_sets:
+ - fsl_gpio:
+ - enable_irq_comb_0_15: 'true'
+ - gpio_interrupt_comb_0_15:
+ - IRQn: 'GPIO1_Combined_0_15_IRQn'
+ - enable_interrrupt: 'enabled'
+ - enable_priority: 'true'
+ - priority: '6'
+ - enable_custom_name: 'false'
+ - enable_irq_comb_16_31: 'true'
+ - gpio_interrupt_comb_16_31:
+ - IRQn: 'GPIO1_Combined_16_31_IRQn'
+ - enable_interrrupt: 'noInit'
+ - enable_priority: 'false'
+ - priority: '0'
+ - enable_custom_name: 'false'
+ - enable_irq_int0: 'false'
+ - gpio_interrupt_int0:
+ - IRQn: 'GPIO1_INT0_IRQn'
+ - enable_interrrupt: 'enabled'
+ - enable_priority: 'false'
+ - priority: '0'
+ - enable_custom_name: 'false'
+ - enable_irq_int1: 'false'
+ - gpio_interrupt_int1:
+ - IRQn: 'GPIO1_INT1_IRQn'
+ - enable_interrrupt: 'enabled'
+ - enable_priority: 'false'
+ - priority: '0'
+ - enable_custom_name: 'false'
+ - enable_irq_int2: 'false'
+ - gpio_interrupt_int2:
+ - IRQn: 'GPIO1_INT2_IRQn'
+ - enable_interrrupt: 'enabled'
+ - enable_priority: 'false'
+ - priority: '0'
+ - enable_custom_name: 'false'
+ - enable_irq_int3: 'false'
+ - gpio_interrupt_int3:
+ - IRQn: 'GPIO1_INT3_IRQn'
+ - enable_interrrupt: 'enabled'
+ - enable_priority: 'false'
+ - priority: '0'
+ - enable_custom_name: 'false'
+ - enable_irq_int4: 'false'
+ - gpio_interrupt_int4:
+ - IRQn: 'GPIO1_INT4_IRQn'
+ - enable_interrrupt: 'enabled'
+ - enable_priority: 'false'
+ - priority: '0'
+ - enable_custom_name: 'false'
+ - enable_irq_int5: 'false'
+ - gpio_interrupt_int5:
+ - IRQn: 'GPIO1_INT5_IRQn'
+ - enable_interrrupt: 'enabled'
+ - enable_priority: 'false'
+ - priority: '0'
+ - enable_custom_name: 'false'
+ - enable_irq_int6: 'false'
+ - gpio_interrupt_int6:
+ - IRQn: 'GPIO1_INT6_IRQn'
+ - enable_interrrupt: 'enabled'
+ - enable_priority: 'false'
+ - priority: '0'
+ - enable_custom_name: 'false'
+ - enable_irq_int7: 'false'
+ - gpio_interrupt_int7:
+ - IRQn: 'GPIO1_INT7_IRQn'
+ - enable_interrrupt: 'enabled'
+ - enable_priority: 'false'
+ - priority: '0'
+ - enable_custom_name: 'false'
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+static void GPIO1_init(void) {
+ /* Make sure, the clock gate for GPIO1 is enabled (e. g. in pin_mux.c) */
+ /* Interrupt vector GPIO1_Combined_0_15_IRQn priority settings in the NVIC. */
+ NVIC_SetPriority(GPIO1_GPIO_COMB_0_15_IRQN, GPIO1_GPIO_COMB_0_15_IRQ_PRIORITY);
+ /* Enable interrupt GPIO1_Combined_0_15_IRQn request in the NVIC. */
+ EnableIRQ(GPIO1_GPIO_COMB_0_15_IRQN);
+ /* Interrupt GPIO1_Combined_16_31_IRQn request in the NVIC is not initialized (disabled by default). */
+ /* It can be enabled later by EnableIRQ(GPIO1_GPIO_COMB_16_31_IRQN); function call. */
+}
+
/***********************************************************************************************************************
* FATFS initialization code
**********************************************************************************************************************/
@@ -381,10 +481,14 @@ instance:
- FF_CODE_PAGE: 'cpUS'
- FF_FS_RPATH: 'enableRP2'
- driveConfig:
- - FF_VOLUMES: '1'
+ - FF_VOLUMES: '3'
- FF_STR_VOLUME_ID: 'stringIdWindows'
- volumes:
- 0:
+ - volumeStr: 'RAM'
+ - 1:
+ - volumeStr: 'USB'
+ - 2:
- volumeStr: 'SD'
- FF_MULTI_PARTITION: 'false'
- FF_MIN_SS: 'value512'
@@ -394,11 +498,11 @@ instance:
- FF_USE_TRIM: 'false'
- systemConfig:
- FF_FS_TINY: 'false'
- - FF_FS_EXFAT: 'true'
- - FF_FS_NORTC: 'false'
+ - FF_FS_EXFAT: 'false'
+ - FF_FS_NORTC: 'true'
- FF_NORTC_MON: '1'
- FF_NORTC_MDAY: '1'
- - FF_NORTC_YEAR: '2020'
+ - FF_NORTC_YEAR: '2021'
- FF_FS_NOFSINFO: ''
- FF_FS_LOCK: '0'
- FF_FS_REENTRANT: 'false'
@@ -425,6 +529,7 @@ void BOARD_InitPeripherals(void)
LPUART1_init();
SEMC_init();
LCDIF_init();
+ GPIO1_init();
}
/***********************************************************************************************************************
diff --git a/board/peripherals.c.bak b/board/peripherals.c.bak
index 347fb7e..d9d8a0d 100644
--- a/board/peripherals.c.bak
+++ b/board/peripherals.c.bak
@@ -312,6 +312,8 @@ instance:
- nvic:
- interrupt_table:
- 0: []
+ - 1: []
+ - 2: []
- interrupts: []
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
@@ -320,6 +322,104 @@ instance:
static void NVIC_init(void) {
} */
+/***********************************************************************************************************************
+ * GPIO1 initialization code
+ **********************************************************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+instance:
+- name: 'GPIO1'
+- type: 'igpio'
+- mode: 'GPIO'
+- custom_name_enabled: 'false'
+- type_id: 'igpio_b1c1fa279aa7069dca167502b8589cb7'
+- functional_group: 'BOARD_InitPeripherals'
+- peripheral: 'GPIO1'
+- config_sets:
+ - fsl_gpio:
+ - enable_irq_comb_0_15: 'true'
+ - gpio_interrupt_comb_0_15:
+ - IRQn: 'GPIO1_Combined_0_15_IRQn'
+ - enable_interrrupt: 'enabled'
+ - enable_priority: 'true'
+ - priority: '6'
+ - enable_custom_name: 'false'
+ - enable_irq_comb_16_31: 'true'
+ - gpio_interrupt_comb_16_31:
+ - IRQn: 'GPIO1_Combined_16_31_IRQn'
+ - enable_interrrupt: 'noInit'
+ - enable_priority: 'false'
+ - priority: '0'
+ - enable_custom_name: 'false'
+ - enable_irq_int0: 'false'
+ - gpio_interrupt_int0:
+ - IRQn: 'GPIO1_INT0_IRQn'
+ - enable_interrrupt: 'enabled'
+ - enable_priority: 'false'
+ - priority: '0'
+ - enable_custom_name: 'false'
+ - enable_irq_int1: 'false'
+ - gpio_interrupt_int1:
+ - IRQn: 'GPIO1_INT1_IRQn'
+ - enable_interrrupt: 'enabled'
+ - enable_priority: 'false'
+ - priority: '0'
+ - enable_custom_name: 'false'
+ - enable_irq_int2: 'false'
+ - gpio_interrupt_int2:
+ - IRQn: 'GPIO1_INT2_IRQn'
+ - enable_interrrupt: 'enabled'
+ - enable_priority: 'false'
+ - priority: '0'
+ - enable_custom_name: 'false'
+ - enable_irq_int3: 'false'
+ - gpio_interrupt_int3:
+ - IRQn: 'GPIO1_INT3_IRQn'
+ - enable_interrrupt: 'enabled'
+ - enable_priority: 'false'
+ - priority: '0'
+ - enable_custom_name: 'false'
+ - enable_irq_int4: 'false'
+ - gpio_interrupt_int4:
+ - IRQn: 'GPIO1_INT4_IRQn'
+ - enable_interrrupt: 'enabled'
+ - enable_priority: 'false'
+ - priority: '0'
+ - enable_custom_name: 'false'
+ - enable_irq_int5: 'false'
+ - gpio_interrupt_int5:
+ - IRQn: 'GPIO1_INT5_IRQn'
+ - enable_interrrupt: 'enabled'
+ - enable_priority: 'false'
+ - priority: '0'
+ - enable_custom_name: 'false'
+ - enable_irq_int6: 'false'
+ - gpio_interrupt_int6:
+ - IRQn: 'GPIO1_INT6_IRQn'
+ - enable_interrrupt: 'enabled'
+ - enable_priority: 'false'
+ - priority: '0'
+ - enable_custom_name: 'false'
+ - enable_irq_int7: 'false'
+ - gpio_interrupt_int7:
+ - IRQn: 'GPIO1_INT7_IRQn'
+ - enable_interrrupt: 'enabled'
+ - enable_priority: 'false'
+ - priority: '0'
+ - enable_custom_name: 'false'
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+static void GPIO1_init(void) {
+ /* Make sure, the clock gate for GPIO1 is enabled (e. g. in pin_mux.c) */
+ /* Interrupt vector GPIO1_Combined_0_15_IRQn priority settings in the NVIC. */
+ NVIC_SetPriority(GPIO1_GPIO_COMB_0_15_IRQN, GPIO1_GPIO_COMB_0_15_IRQ_PRIORITY);
+ /* Enable interrupt GPIO1_Combined_0_15_IRQn request in the NVIC. */
+ EnableIRQ(GPIO1_GPIO_COMB_0_15_IRQN);
+ /* Interrupt GPIO1_Combined_16_31_IRQn request in the NVIC is not initialized (disabled by default). */
+ /* It can be enabled later by EnableIRQ(GPIO1_GPIO_COMB_16_31_IRQN); function call. */
+}
+
/***********************************************************************************************************************
* FATFS initialization code
**********************************************************************************************************************/
@@ -343,7 +443,7 @@ instance:
- 1:
- Volume: '0'
- Partition: 'autoDetect'
- - enablePhysicalLayerInit: 'true'
+ - enablePhysicalLayerInit: 'false'
- diskConfig:
- initFunctionID: 'FATFS_DiskInit'
- initResultObject: 'false'
@@ -382,7 +482,7 @@ instance:
- FF_FS_RPATH: 'enableRP2'
- driveConfig:
- FF_VOLUMES: '1'
- - FF_STR_VOLUME_ID: 'stringIdWindows'
+ - FF_STR_VOLUME_ID: 'numericId'
- volumes:
- 0:
- volumeStr: 'SD'
@@ -394,11 +494,11 @@ instance:
- FF_USE_TRIM: 'false'
- systemConfig:
- FF_FS_TINY: 'false'
- - FF_FS_EXFAT: 'true'
- - FF_FS_NORTC: 'false'
+ - FF_FS_EXFAT: 'false'
+ - FF_FS_NORTC: 'true'
- FF_NORTC_MON: '1'
- FF_NORTC_MDAY: '1'
- - FF_NORTC_YEAR: '2020'
+ - FF_NORTC_YEAR: '2021'
- FF_FS_NOFSINFO: ''
- FF_FS_LOCK: '0'
- FF_FS_REENTRANT: 'false'
@@ -412,10 +512,9 @@ instance:
/* FATFS System object */
FATFS FATFS_System_0;
+/* Empty initialization function (commented out)
static void FATFS_init(void) {
- /* FATFS physical layer user initialization */
- FATFS_DiskInit();
-}
+} */
/***********************************************************************************************************************
* Initialization functions
@@ -426,7 +525,7 @@ void BOARD_InitPeripherals(void)
LPUART1_init();
SEMC_init();
LCDIF_init();
- FATFS_init();
+ GPIO1_init();
}
/***********************************************************************************************************************
diff --git a/board/peripherals.h b/board/peripherals.h
index 6154fa8..8f859b7 100644
--- a/board/peripherals.h
+++ b/board/peripherals.h
@@ -14,6 +14,7 @@
#include "fsl_clock.h"
#include "fsl_semc.h"
#include "fsl_elcdif.h"
+#include "fsl_gpio.h"
#include "ff.h"
#include "diskio.h"
@@ -48,6 +49,16 @@ extern "C" {
#define LCDIF_LCDIF_IRQ_PRIORITY 5
/* LCDIF interrupt handler identifier. */
#define LCDIF_LCDIF_IRQHANDLER LCDIF_IRQHandler
+/* GPIO1 interrupt vector ID (number). */
+#define GPIO1_GPIO_COMB_0_15_IRQN GPIO1_Combined_0_15_IRQn
+/* GPIO1 interrupt vector priority. */
+#define GPIO1_GPIO_COMB_0_15_IRQ_PRIORITY 6
+/* GPIO1 interrupt handler identifier. */
+#define GPIO1_GPIO_COMB_0_15_IRQHANDLER GPIO1_Combined_0_15_IRQHandler
+/* GPIO1 interrupt vector ID (number). */
+#define GPIO1_GPIO_COMB_16_31_IRQN GPIO1_Combined_16_31_IRQn
+/* GPIO1 interrupt handler identifier. */
+#define GPIO1_GPIO_COMB_16_31_IRQHANDLER GPIO1_Combined_16_31_IRQHandler
/***********************************************************************************************************************
* Global variables
diff --git a/board/peripherals.h.bak b/board/peripherals.h.bak
index 7f42ed3..6491e76 100644
--- a/board/peripherals.h.bak
+++ b/board/peripherals.h.bak
@@ -14,6 +14,7 @@
#include "fsl_clock.h"
#include "fsl_semc.h"
#include "fsl_elcdif.h"
+#include "fsl_gpio.h"
#include "ff.h"
#include "diskio.h"
@@ -48,6 +49,12 @@ extern "C" {
#define LCDIF_LCDIF_IRQ_PRIORITY 5
/* LCDIF interrupt handler identifier. */
#define LCDIF_LCDIF_IRQHANDLER LCDIF_IRQHandler
+/* GPIO1 interrupt vector ID (number). */
+#define GPIO1_GPIO_COMB_0_15_IRQN GPIO1_Combined_0_15_IRQn
+/* GPIO1 interrupt vector priority. */
+#define GPIO1_GPIO_COMB_0_15_IRQ_PRIORITY 6
+/* GPIO1 interrupt handler identifier. */
+#define GPIO1_GPIO_COMB_0_15_IRQHANDLER GPIO1_Combined_0_15_IRQHandler
/***********************************************************************************************************************
* Global variables
@@ -62,12 +69,6 @@ extern uint16_t LCDIF_Buffer[2][LCDIF_PANEL_HEIGHT][LCDIF_PANEL_WIDTH];
/* FATFS System object */
extern FATFS FATFS_System_0;
-/***********************************************************************************************************************
- * Callback functions
- **********************************************************************************************************************/
-/* Extern function for the physical layer initialization*/
-extern void FATFS_DiskInit(void);
-
/***********************************************************************************************************************
* Initialization functions
**********************************************************************************************************************/
diff --git a/board/pin_mux.c b/board/pin_mux.c
index 579383a..8a14792 100644
--- a/board/pin_mux.c
+++ b/board/pin_mux.c
@@ -126,7 +126,8 @@ BOARD_InitPins:
- {pin_num: H2, peripheral: USDHC1, signal: 'usdhc_data, 2', pin_signal: GPIO_SD_B0_04}
- {pin_num: J2, peripheral: USDHC1, signal: 'usdhc_data, 3', pin_signal: GPIO_SD_B0_05}
- {pin_num: J1, peripheral: USDHC1, signal: 'usdhc_data, 0', pin_signal: GPIO_SD_B0_02}
- - {pin_num: G11, peripheral: GPIO1, signal: 'gpio_io, 03', pin_signal: GPIO_AD_B0_03, direction: INPUT, gpio_interrupt: kGPIO_IntFallingEdge, pull_up_down_config: Pull_Up_100K_Ohm}
+ - {pin_num: G11, peripheral: GPIO1, signal: 'gpio_io, 03', pin_signal: GPIO_AD_B0_03, direction: INPUT, gpio_interrupt: kGPIO_IntRisingOrFallingEdge, pull_up_down_config: Pull_Up_100K_Ohm,
+ pull_keeper_select: Pull}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
@@ -152,7 +153,7 @@ void BOARD_InitPins(void) {
gpio_pin_config_t SD1_CD_config = {
.direction = kGPIO_DigitalInput,
.outputLogic = 0U,
- .interruptMode = kGPIO_IntFallingEdge
+ .interruptMode = kGPIO_IntRisingOrFallingEdge
};
/* Initialize GPIO functionality on GPIO_AD_B0_03 (pin G11) */
GPIO_PinInit(GPIO1, 3U, &SD1_CD_config);
@@ -261,7 +262,7 @@ void BOARD_InitPins(void) {
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_03_USDHC1_DATA1, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_04_USDHC1_DATA2, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3, 0U);
- IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_03_GPIO1_IO03, 0x90B0U);
+ IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_03_GPIO1_IO03, 0xB0B0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0x10B0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0x10B0U);
}
diff --git a/board/pin_mux.c.bak b/board/pin_mux.c.bak
index 0a3f171..0a59c2a 100644
--- a/board/pin_mux.c.bak
+++ b/board/pin_mux.c.bak
@@ -14,6 +14,7 @@ processor_version: 9.0.1
board: IMXRT1050-EVKB
pin_labels:
- {pin_num: M11, pin_signal: GPIO_AD_B0_02, label: LCDIF_RESET, identifier: LCDIF_RESEt;LCDIF_RESET}
+- {pin_num: G11, pin_signal: GPIO_AD_B0_03, label: 'USB_OTG1_OC/J24[1]', identifier: SD1_CD}
- {pin_num: G13, pin_signal: GPIO_AD_B0_10, label: LED_BLUE, identifier: INT1_COMBO;LED_BLUE}
- {pin_num: L10, pin_signal: GPIO_AD_B0_15, label: LCDIF_BL, identifier: CAN2_RX;LCDIF_BL}
power_domains: {NVCC_GPIO: '3.3', NVCC_SD0: '3.3'}
@@ -125,6 +126,7 @@ BOARD_InitPins:
- {pin_num: H2, peripheral: USDHC1, signal: 'usdhc_data, 2', pin_signal: GPIO_SD_B0_04}
- {pin_num: J2, peripheral: USDHC1, signal: 'usdhc_data, 3', pin_signal: GPIO_SD_B0_05}
- {pin_num: J1, peripheral: USDHC1, signal: 'usdhc_data, 0', pin_signal: GPIO_SD_B0_02}
+ - {pin_num: G11, peripheral: GPIO1, signal: 'gpio_io, 03', pin_signal: GPIO_AD_B0_03, direction: INPUT, gpio_interrupt: kGPIO_IntRisingOrFallingEdge, pull_up_down_config: Pull_Up_22K_Ohm}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
@@ -146,6 +148,17 @@ void BOARD_InitPins(void) {
/* Initialize GPIO functionality on GPIO_AD_B0_02 (pin M11) */
GPIO_PinInit(GPIO1, 2U, &LCDIF_RESET_config);
+ /* GPIO configuration of SD1_CD on GPIO_AD_B0_03 (pin G11) */
+ gpio_pin_config_t SD1_CD_config = {
+ .direction = kGPIO_DigitalInput,
+ .outputLogic = 0U,
+ .interruptMode = kGPIO_IntRisingOrFallingEdge
+ };
+ /* Initialize GPIO functionality on GPIO_AD_B0_03 (pin G11) */
+ GPIO_PinInit(GPIO1, 3U, &SD1_CD_config);
+ /* Enable GPIO pin interrupt on GPIO_AD_B0_03 (pin G11) */
+ GPIO_PortEnableInterrupts(GPIO1, 1U << 3U);
+
/* GPIO configuration of LED_BLUE on GPIO_AD_B0_10 (pin G13) */
gpio_pin_config_t LED_BLUE_config = {
.direction = kGPIO_DigitalOutput,
@@ -165,6 +178,7 @@ void BOARD_InitPins(void) {
GPIO_PinInit(GPIO1, 15U, &LCDIF_BL_config);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_02_GPIO1_IO02, 0U);
+ IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_03_GPIO1_IO03, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_10_GPIO1_IO10, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0U);
@@ -247,6 +261,7 @@ void BOARD_InitPins(void) {
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_03_USDHC1_DATA1, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_04_USDHC1_DATA2, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3, 0U);
+ IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_03_GPIO1_IO03, 0xD0B0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0x10B0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0x10B0U);
}
diff --git a/rt1050_freertos_hello.mex b/rt1050_freertos_hello.mex
index 683d001..176e3fb 100644
--- a/rt1050_freertos_hello.mex
+++ b/rt1050_freertos_hello.mex
@@ -218,8 +218,9 @@
-
+
+
@@ -568,6 +569,16 @@
0.14.0
+
+
+ true
+
+
+
+
+ 2.0.1
+
+
@@ -838,6 +849,8 @@
+
+
@@ -901,10 +914,16 @@
-
+
+
+
+
+
+
+
@@ -917,11 +936,11 @@
-
-
+
+
-
+
@@ -935,6 +954,90 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/source/ffconf.h b/source/ffconf.h
index 69374e3..7a92709 100644
--- a/source/ffconf.h
+++ b/source/ffconf.h
@@ -185,12 +185,12 @@
/ Drive/Volume Configurations
/---------------------------------------------------------------------------*/
-#define FF_VOLUMES 1
+#define FF_VOLUMES 3
/* Number of volumes (logical drives) to be used. (1-10) */
#define FF_STR_VOLUME_ID 1
-#define FF_VOLUME_STRS "SD"
+#define FF_VOLUME_STRS "RAM", "USB", "SD"
/* FF_STR_VOLUME_ID switches support for volume ID in arbitrary strings.
/ When FF_STR_VOLUME_ID is set to 1 or 2, arbitrary strings can be used as drive
/ number in the path name. FF_VOLUME_STRS defines the volume ID strings for each
@@ -250,16 +250,16 @@
/ buffer in the filesystem object (FATFS) is used for the file data transfer. */
-#define FF_FS_EXFAT 1
+#define FF_FS_EXFAT 0
/* This option switches support for exFAT filesystem. (0:Disable or 1:Enable)
/ To enable exFAT, also LFN needs to be enabled. (FF_USE_LFN >= 1)
/ Note that enabling exFAT discards ANSI C (C89) compatibility. */
-#define FF_FS_NORTC 0
+#define FF_FS_NORTC 1
#define FF_NORTC_MON 1
#define FF_NORTC_MDAY 1
-#define FF_NORTC_YEAR 2020
+#define FF_NORTC_YEAR 2021
/* The option FF_FS_NORTC switches timestamp functiton. If the system does not have
/ any RTC function or valid timestamp is not needed, set FF_FS_NORTC = 1 to disable
/ the timestamp function. Every object modified by FatFs will have a fixed timestamp
diff --git a/source/ffconf.h.bak b/source/ffconf.h.bak
index 37bfb2c..a850378 100644
--- a/source/ffconf.h.bak
+++ b/source/ffconf.h.bak
@@ -189,7 +189,7 @@
/* Number of volumes (logical drives) to be used. (1-10) */
-#define FF_STR_VOLUME_ID 1
+#define FF_STR_VOLUME_ID 0
#define FF_VOLUME_STRS "SD"
/* FF_STR_VOLUME_ID switches support for volume ID in arbitrary strings.
/ When FF_STR_VOLUME_ID is set to 1 or 2, arbitrary strings can be used as drive
@@ -250,16 +250,16 @@
/ buffer in the filesystem object (FATFS) is used for the file data transfer. */
-#define FF_FS_EXFAT 1
+#define FF_FS_EXFAT 0
/* This option switches support for exFAT filesystem. (0:Disable or 1:Enable)
/ To enable exFAT, also LFN needs to be enabled. (FF_USE_LFN >= 1)
/ Note that enabling exFAT discards ANSI C (C89) compatibility. */
-#define FF_FS_NORTC 0
+#define FF_FS_NORTC 1
#define FF_NORTC_MON 1
#define FF_NORTC_MDAY 1
-#define FF_NORTC_YEAR 2020
+#define FF_NORTC_YEAR 2021
/* The option FF_FS_NORTC switches timestamp functiton. If the system does not have
/ any RTC function or valid timestamp is not needed, set FF_FS_NORTC = 1 to disable
/ the timestamp function. Every object modified by FatFs will have a fixed timestamp
@@ -294,7 +294,7 @@
/ lock control is independent of re-entrancy. */
-#include // O/S definitions
+// #include // O/S definitions
#define FF_FS_REENTRANT 0
#define FF_FS_TIMEOUT 0
#define FF_SYNC_t HANDLE
diff --git a/source/freertos_hello.c b/source/freertos_hello.c
index f3cd6f5..df111f7 100644
--- a/source/freertos_hello.c
+++ b/source/freertos_hello.c
@@ -54,6 +54,9 @@ int main(void)
ret = xTaskCreate(hello_task, "HELO_TASK", 512, NULL, 4, &g_hello_task_handle);
if(ret != pdPASS) goto err_out;
+
+ ret = xTaskCreate(CardDetectTask, "CARD_TASK", 1024, NULL, 4, &g_card_detect_task_handle);
+ if(ret != pdPASS) goto err_out;
vTaskStartScheduler();
diff --git a/source/sdmmc_config.c b/source/sdmmc_config.c
index c4cbdf2..ee10d75 100644
--- a/source/sdmmc_config.c
+++ b/source/sdmmc_config.c
@@ -1,3 +1,359 @@
+/*
+ * Copyright 2020 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
#include "sdmmc_config.h"
#include "fsl_iomuxc.h"
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+/*******************************************************************************
+ * Prototypes
+ ******************************************************************************/
+void BOARD_SDCardPowerControl(bool enable);
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+/*!brief sdmmc dma buffer */
+AT_NONCACHEABLE_SECTION_ALIGN(static uint32_t s_sdmmcHostDmaBuffer[BOARD_SDMMC_HOST_DMA_DESCRIPTOR_BUFFER_SIZE],
+ SDMMCHOST_DMA_DESCRIPTOR_BUFFER_ALIGN_SIZE);
+#if defined SDMMCHOST_ENABLE_CACHE_LINE_ALIGN_TRANSFER && SDMMCHOST_ENABLE_CACHE_LINE_ALIGN_TRANSFER
+/* two cache line length for sdmmc host driver maintain unalign transfer */
+SDK_ALIGN(static uint8_t s_sdmmcCacheLineAlignBuffer[BOARD_SDMMC_DATA_BUFFER_ALIGN_SIZE * 2U],
+ BOARD_SDMMC_DATA_BUFFER_ALIGN_SIZE);
+#endif
+#if defined(SDIO_ENABLED) || defined(SD_ENABLED)
+static sd_detect_card_t s_cd;
+static sd_io_voltage_t s_ioVoltage = {
+ .type = BOARD_SDMMC_SD_IO_VOLTAGE_CONTROL_TYPE,
+ .func = NULL,
+};
+#endif
+static sdmmchost_t s_host;
+#ifdef SDIO_ENABLED
+static sdio_card_int_t s_sdioInt;
+#endif
+
+/*******************************************************************************
+ * Code
+ ******************************************************************************/
+uint32_t BOARD_USDHC1ClockConfiguration(void)
+{
+ CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN);
+ /*configure system pll PFD0 fractional divider to 24, output clock is 528MHZ * 18 / 24 = 396 MHZ*/
+ CLOCK_InitSysPfd(kCLOCK_Pfd0, 24U);
+ /* Configure USDHC clock source and divider */
+ CLOCK_SetDiv(kCLOCK_Usdhc1Div, 1U); /* USDHC clock root frequency maximum: 198MHZ */
+ CLOCK_SetMux(kCLOCK_Usdhc1Mux, 1U);
+
+ return 396000000U / 2U;
+}
+
+#if defined(SDIO_ENABLED) || defined(SD_ENABLED)
+bool BOARD_SDCardGetDetectStatus(void)
+{
+ return GPIO_PinRead(BOARD_SDMMC_SD_CD_GPIO_BASE, BOARD_SDMMC_SD_CD_GPIO_PIN) == BOARD_SDMMC_SD_CD_INSERT_LEVEL;
+}
+
+void BOARD_SDMMC_SD_CD_PORT_IRQ_HANDLER(void)
+{
+ if (GPIO_PortGetInterruptFlags(BOARD_SDMMC_SD_CD_GPIO_BASE) & (1U << BOARD_SDMMC_SD_CD_GPIO_PIN))
+ {
+ if (s_cd.callback != NULL)
+ {
+ s_cd.callback(BOARD_SDCardGetDetectStatus(), s_cd.userData);
+ }
+ }
+ /* Clear interrupt flag.*/
+ GPIO_PortClearInterruptFlags(BOARD_SDMMC_SD_CD_GPIO_BASE, ~0U);
+}
+
+void BOARD_SDCardDAT3PullFunction(uint32_t status)
+{
+ if (status == kSD_DAT3PullDown)
+ {
+ IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3,
+ IOMUXC_SW_PAD_CTL_PAD_SPEED(1) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(0) |
+ IOMUXC_SW_PAD_CTL_PAD_DSE(1));
+ }
+ else
+ {
+ IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3,
+ IOMUXC_SW_PAD_CTL_PAD_SPEED(1) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |
+ IOMUXC_SW_PAD_CTL_PAD_DSE(1));
+ }
+}
+
+void BOARD_SDCardDetectInit(sd_cd_t cd, void *userData)
+{
+ /* install card detect callback */
+ s_cd.cdDebounce_ms = BOARD_SDMMC_SD_CARD_DETECT_DEBOUNCE_DELAY_MS;
+ s_cd.type = BOARD_SDMMC_SD_CD_TYPE;
+ s_cd.cardDetected = BOARD_SDCardGetDetectStatus;
+ s_cd.callback = cd;
+ s_cd.userData = userData;
+
+ if (BOARD_SDMMC_SD_CD_TYPE == kSD_DetectCardByGpioCD)
+ {
+ gpio_pin_config_t sw_config = {
+ kGPIO_DigitalInput,
+ 0,
+ kGPIO_IntRisingOrFallingEdge,
+ };
+ GPIO_PinInit(BOARD_SDMMC_SD_CD_GPIO_BASE, BOARD_SDMMC_SD_CD_GPIO_PIN, &sw_config);
+ GPIO_PortEnableInterrupts(BOARD_SDMMC_SD_CD_GPIO_BASE, 1U << BOARD_SDMMC_SD_CD_GPIO_PIN);
+ GPIO_PortClearInterruptFlags(BOARD_SDMMC_SD_CD_GPIO_BASE, ~0);
+
+ /* set IRQ priority */
+ NVIC_SetPriority(BOARD_SDMMC_SD_CD_IRQ, BOARD_SDMMC_SD_CD_IRQ_PRIORITY);
+ /* Open card detection pin NVIC. */
+ EnableIRQ(BOARD_SDMMC_SD_CD_IRQ);
+
+ if (GPIO_PinRead(BOARD_SDMMC_SD_CD_GPIO_BASE, BOARD_SDMMC_SD_CD_GPIO_PIN) == BOARD_SDMMC_SD_CD_INSERT_LEVEL)
+ {
+ if (cd != NULL)
+ {
+ cd(true, userData);
+ }
+ }
+ }
+
+ /* register DAT3 pull function switch function pointer */
+ if (BOARD_SDMMC_SD_CD_TYPE == kSD_DetectCardByHostDATA3)
+ {
+ s_cd.dat3PullFunc = BOARD_SDCardDAT3PullFunction;
+ /* make sure the card is power on for DAT3 pull up */
+ BOARD_SDCardPowerControl(true);
+ }
+}
+
+void BOARD_SDCardPowerResetInit(void)
+{
+}
+
+void BOARD_SDCardPowerControl(bool enable)
+{
+}
+
+void BOARD_SD_Pin_Config(uint32_t freq)
+{
+ uint32_t speed = 0U, strength = 0U;
+
+ if (freq <= 50000000)
+ {
+ speed = 0U;
+ strength = 7U;
+ }
+ else if (freq <= 100000000)
+ {
+ speed = 2U;
+ strength = 7U;
+ }
+ else
+ {
+ speed = 3U;
+ strength = 7U;
+ }
+
+ IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_00_USDHC1_CMD,
+ IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |
+ IOMUXC_SW_PAD_CTL_PAD_DSE(strength));
+ IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_01_USDHC1_CLK,
+ IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(0) |
+ IOMUXC_SW_PAD_CTL_PAD_DSE(strength));
+ IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_02_USDHC1_DATA0,
+ IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |
+ IOMUXC_SW_PAD_CTL_PAD_DSE(strength));
+ IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_03_USDHC1_DATA1,
+ IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |
+ IOMUXC_SW_PAD_CTL_PAD_DSE(strength));
+ IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_04_USDHC1_DATA2,
+ IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |
+ IOMUXC_SW_PAD_CTL_PAD_DSE(strength));
+ IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3,
+ IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |
+ IOMUXC_SW_PAD_CTL_PAD_DSE(strength));
+}
+#endif
+
+#ifdef SD_ENABLED
+void BOARD_SD_Config(void *card, sd_cd_t cd, uint32_t hostIRQPriority, void *userData)
+{
+ assert(card);
+
+ s_host.dmaDesBuffer = s_sdmmcHostDmaBuffer;
+ s_host.dmaDesBufferWordsNum = BOARD_SDMMC_HOST_DMA_DESCRIPTOR_BUFFER_SIZE;
+ s_host.enableCacheControl = BOARD_SDMMC_HOST_CACHE_CONTROL;
+#if defined SDMMCHOST_ENABLE_CACHE_LINE_ALIGN_TRANSFER && SDMMCHOST_ENABLE_CACHE_LINE_ALIGN_TRANSFER
+ s_host.cacheAlignBuffer = s_sdmmcCacheLineAlignBuffer;
+ s_host.cacheAlignBufferSize = BOARD_SDMMC_DATA_BUFFER_ALIGN_SIZE * 2U;
+#endif
+
+ ((sd_card_t *)card)->host = &s_host;
+ ((sd_card_t *)card)->host->hostController.base = BOARD_SDMMC_SD_HOST_BASEADDR;
+ ((sd_card_t *)card)->host->hostController.sourceClock_Hz = BOARD_USDHC1ClockConfiguration();
+
+ ((sd_card_t *)card)->usrParam.cd = &s_cd;
+ ((sd_card_t *)card)->usrParam.pwr = BOARD_SDCardPowerControl;
+ ((sd_card_t *)card)->usrParam.ioStrength = BOARD_SD_Pin_Config;
+ ((sd_card_t *)card)->usrParam.ioVoltage = &s_ioVoltage;
+ ((sd_card_t *)card)->usrParam.maxFreq = BOARD_SDMMC_SD_HOST_SUPPORT_SDR104_FREQ;
+
+ BOARD_SDCardPowerResetInit();
+ BOARD_SDCardDetectInit(cd, userData);
+
+ NVIC_SetPriority(BOARD_SDMMC_SD_HOST_IRQ, hostIRQPriority);
+}
+#endif
+
+#ifdef SDIO_ENABLED
+void BOARD_SDIO_Config(void *card, sd_cd_t cd, uint32_t hostIRQPriority, sdio_int_t cardInt)
+{
+ assert(card);
+
+ s_host.dmaDesBuffer = s_sdmmcHostDmaBuffer;
+ s_host.dmaDesBufferWordsNum = BOARD_SDMMC_HOST_DMA_DESCRIPTOR_BUFFER_SIZE;
+ s_host.enableCacheControl = BOARD_SDMMC_HOST_CACHE_CONTROL;
+#if defined SDMMCHOST_ENABLE_CACHE_LINE_ALIGN_TRANSFER && SDMMCHOST_ENABLE_CACHE_LINE_ALIGN_TRANSFER
+ s_host.cacheAlignBuffer = s_sdmmcCacheLineAlignBuffer;
+ s_host.cacheAlignBufferSize = BOARD_SDMMC_DATA_BUFFER_ALIGN_SIZE * 2U;
+#endif
+
+ ((sdio_card_t *)card)->host = &s_host;
+ ((sdio_card_t *)card)->host->hostController.base = BOARD_SDMMC_SDIO_HOST_BASEADDR;
+ ((sdio_card_t *)card)->host->hostController.sourceClock_Hz = BOARD_USDHC1ClockConfiguration();
+
+ ((sdio_card_t *)card)->usrParam.cd = &s_cd;
+ ((sdio_card_t *)card)->usrParam.pwr = BOARD_SDCardPowerControl;
+ ((sdio_card_t *)card)->usrParam.ioStrength = BOARD_SD_Pin_Config;
+ ((sdio_card_t *)card)->usrParam.ioVoltage = &s_ioVoltage;
+ ((sdio_card_t *)card)->usrParam.maxFreq = BOARD_SDMMC_SD_HOST_SUPPORT_SDR104_FREQ;
+ if (cardInt != NULL)
+ {
+ s_sdioInt.cardInterrupt = cardInt;
+ ((sdio_card_t *)card)->usrParam.sdioInt = &s_sdioInt;
+ }
+
+ BOARD_SDCardPowerResetInit();
+ BOARD_SDCardDetectInit(cd, NULL);
+
+ NVIC_SetPriority(BOARD_SDMMC_SDIO_HOST_IRQ, hostIRQPriority);
+}
+#endif
+
+#ifdef MMC_ENABLED
+static void BOARD_MMC_Pin_Config(uint32_t freq)
+{
+ uint32_t speed = 0U, strength = 0U;
+
+ if (freq <= 50000000)
+ {
+ speed = 0U;
+ strength = 7U;
+ }
+ else if (freq <= 100000000)
+ {
+ speed = 2U;
+ strength = 7U;
+ }
+ else
+ {
+ speed = 3U;
+ strength = 7U;
+ }
+
+ IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_05_USDHC2_CMD,
+ IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |
+ IOMUXC_SW_PAD_CTL_PAD_DSE(strength));
+ IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_04_USDHC2_CLK,
+ IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(0) |
+ IOMUXC_SW_PAD_CTL_PAD_DSE(strength));
+ IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_03_USDHC2_DATA0,
+ IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |
+ IOMUXC_SW_PAD_CTL_PAD_DSE(strength));
+ IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_02_USDHC2_DATA1,
+ IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |
+ IOMUXC_SW_PAD_CTL_PAD_DSE(strength));
+ IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_01_USDHC2_DATA2,
+ IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |
+ IOMUXC_SW_PAD_CTL_PAD_DSE(strength));
+ IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_00_USDHC2_DATA3,
+ IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |
+ IOMUXC_SW_PAD_CTL_PAD_DSE(strength));
+ IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_08_USDHC2_DATA4,
+ IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |
+ IOMUXC_SW_PAD_CTL_PAD_DSE(strength));
+ IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_09_USDHC2_DATA5,
+ IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |
+ IOMUXC_SW_PAD_CTL_PAD_DSE(strength));
+ IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_10_USDHC2_DATA6,
+ IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |
+ IOMUXC_SW_PAD_CTL_PAD_DSE(strength));
+ IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_11_USDHC2_DATA7,
+ IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |
+ IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) |
+ IOMUXC_SW_PAD_CTL_PAD_DSE(strength));
+}
+
+void BOARD_MMC_Config(void *card, uint32_t hostIRQPriority)
+{
+ assert(card);
+
+ s_host.dmaDesBuffer = s_sdmmcHostDmaBuffer;
+ s_host.dmaDesBufferWordsNum = BOARD_SDMMC_HOST_DMA_DESCRIPTOR_BUFFER_SIZE;
+ s_host.enableCacheControl = BOARD_SDMMC_HOST_CACHE_CONTROL;
+#if defined SDMMCHOST_ENABLE_CACHE_LINE_ALIGN_TRANSFER && SDMMCHOST_ENABLE_CACHE_LINE_ALIGN_TRANSFER
+ s_host.cacheAlignBuffer = s_sdmmcCacheLineAlignBuffer;
+ s_host.cacheAlignBufferSize = BOARD_SDMMC_DATA_BUFFER_ALIGN_SIZE * 2U;
+#endif
+
+ ((mmc_card_t *)card)->host = &s_host;
+ ((mmc_card_t *)card)->host->hostController.base = BOARD_SDMMC_MMC_HOST_BASEADDR;
+ ((mmc_card_t *)card)->host->hostController.sourceClock_Hz = BOARD_USDHC1ClockConfiguration();
+ ((mmc_card_t *)card)->usrParam.ioStrength = BOARD_MMC_Pin_Config;
+ ((mmc_card_t *)card)->usrParam.maxFreq = BOARD_SDMMC_MMC_HOST_SUPPORT_HS200_FREQ;
+
+ ((mmc_card_t *)card)->hostVoltageWindowVCC = BOARD_SDMMC_MMC_VCC_SUPPLY;
+ ((mmc_card_t *)card)->hostVoltageWindowVCCQ = BOARD_SDMMC_MMC_VCCQ_SUPPLY;
+
+ NVIC_SetPriority(BOARD_SDMMC_MMC_HOST_IRQ, hostIRQPriority);
+}
+#endif
diff --git a/source/sdmmc_config.h b/source/sdmmc_config.h
index f0f6fcb..b54fdcf 100644
--- a/source/sdmmc_config.h
+++ b/source/sdmmc_config.h
@@ -7,4 +7,93 @@
#include "fsl_sdmmc_host.h"
#include "fsl_sdmmc_common.h"
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+/* @brief host basic configuration */
+#define BOARD_SDMMC_SD_HOST_BASEADDR USDHC1
+#define BOARD_SDMMC_SD_HOST_IRQ USDHC1_IRQn
+#define BOARD_SDMMC_MMC_HOST_BASEADDR USDHC1
+#define BOARD_SDMMC_MMC_HOST_IRQ USDHC1_IRQn
+#define BOARD_SDMMC_SDIO_HOST_BASEADDR USDHC1
+#define BOARD_SDMMC_SDIO_HOST_IRQ USDHC1_IRQn
+/* @brief card detect configuration */
+#define BOARD_SDMMC_SD_CD_GPIO_BASE GPIO1
+#define BOARD_SDMMC_SD_CD_GPIO_PIN 3U
+#define BOARD_SDMMC_SD_CD_IRQ_PRIORITY 6U
+#define BOARD_SDMMC_SD_CD_IRQ GPIO1_Combined_0_15_IRQn
+#define BOARD_SDMMC_SD_CD_INTTERUPT_TYPE kGPIO_IntRisingOrFallingEdge
+#define BOARD_SDMMC_SD_CD_INSERT_LEVEL (0U)
+#define BOARD_SDMMC_SD_CD_PORT_IRQ_HANDLER GPIO1_Combined_0_15_IRQHandler
+/* @brief card detect type
+ *
+ * Note: Please pay attention, DAT3 card detection cannot works during the card access,
+ * since the DAT3 will be used for data transfer, thus the functionality of card detect will be disabled. Using card
+ * detect pin for card detection is recommended.
+ */
+#define BOARD_SDMMC_SD_CD_TYPE kSD_DetectCardByGpioCD
+#define BOARD_SDMMC_SD_CARD_DETECT_DEBOUNCE_DELAY_MS (100U)
+
+/*! @brief SD IO voltage */
+#define BOARD_SDMMC_SD_IO_VOLTAGE_CONTROL_TYPE kSD_IOVoltageCtrlByHost
+
+#define BOARD_SDMMC_SD_HOST_SUPPORT_SDR104_FREQ (200000000U)
+#define BOARD_SDMMC_MMC_HOST_SUPPORT_HS200_FREQ (180000000U)
+/*! @brief mmc configuration */
+#define BOARD_SDMMC_MMC_VCC_SUPPLY kMMC_VoltageWindows270to360
+#define BOARD_SDMMC_MMC_VCCQ_SUPPLY kMMC_VoltageWindows270to360
+/*! @brief align with cache line size */
+#define BOARD_SDMMC_DATA_BUFFER_ALIGN_SIZE (32U)
+
+/*!@ brief host interrupt priority*/
+#define BOARD_SDMMC_SD_HOST_IRQ_PRIORITY (5U)
+#define BOARD_SDMMC_MMC_HOST_IRQ_PRIORITY (5U)
+#define BOARD_SDMMC_SDIO_HOST_IRQ_PRIORITY (5U)
+/*!@brief dma descriptor buffer size */
+#define BOARD_SDMMC_HOST_DMA_DESCRIPTOR_BUFFER_SIZE (32U)
+/*! @brief cache maintain function enabled for RW buffer */
+#define BOARD_SDMMC_HOST_CACHE_CONTROL kSDMMCHOST_CacheControlRWBuffer
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus */
+
+/*******************************************************************************
+ * API
+ ******************************************************************************/
+/*!
+ * @brief BOARD SD configurations.
+ * @param card card descriptor
+ * @param cd card detect callback
+ * @param userData user data for callback
+ */
+#ifdef SD_ENABLED
+void BOARD_SD_Config(void *card, sd_cd_t cd, uint32_t hostIRQPriority, void *userData);
+#endif
+
+/*!
+ * @brief BOARD SDIO configurations.
+ * @param card card descriptor
+ * @param cd card detect callback
+ * @param cardInt card interrupt
+ */
+#ifdef SDIO_ENABLED
+void BOARD_SDIO_Config(void *card, sd_cd_t cd, uint32_t hostIRQPriority, sdio_int_t cardInt);
+#endif
+
+/*!
+ * @brief BOARD MMC configurations.
+ * @param card card descriptor
+ * @param cd card detect callback
+ * @param userData user data for callback
+ */
+#ifdef MMC_ENABLED
+void BOARD_MMC_Config(void *card, uint32_t hostIRQPriority);
+
+#endif
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus */
+
#endif
\ No newline at end of file
diff --git a/source/tasks/user_sdcard_task.c b/source/tasks/user_sdcard_task.c
new file mode 100644
index 0000000..c16d2dd
--- /dev/null
+++ b/source/tasks/user_sdcard_task.c
@@ -0,0 +1,100 @@
+#include "FreeRTOS.h"
+#include "board.h"
+#include "clock_config.h"
+#include "ff.h"
+#include "diskio.h"
+#include "fsl_debug_console.h"
+#include "fsl_sd.h"
+#include "fsl_sd_disk.h"
+#include "pin_mux.h"
+#include "sdmmc_config.h"
+#include "semphr.h"
+#include "task.h"
+#include
+#include
+
+#include "fsl_common.h"
+
+static volatile bool s_cardInserted = false;
+static volatile bool s_cardInsertStatus = false;
+
+static SemaphoreHandle_t s_fileAccessSemaphore = NULL;
+static SemaphoreHandle_t s_CardDetectSemaphore = NULL;
+
+static FATFS g_fileSystem;
+
+static void SDCARD_DetectCallBack(bool isInserted, void *userData) {
+ s_cardInsertStatus = isInserted;
+ xSemaphoreGiveFromISR(s_CardDetectSemaphore, NULL);
+}
+
+static status_t DEMO_MakeFileSystem(void) {
+ FRESULT error;
+ const TCHAR driverNumberBuffer[4U] = {'S', 'D', ':', '/'};
+
+ if(f_mount(&g_fileSystem, driverNumberBuffer, 0U)) {
+ PRINTF("Mount volume failed.\r\n");
+ return kStatus_Fail;
+ }
+
+#if(FF_FS_RPATH >= 2U)
+ error = f_chdrive((char const *)&driverNumberBuffer[0U]);
+ if(error) {
+ PRINTF("Change drive failed.\r\n");
+ return kStatus_Fail;
+ }
+#endif
+
+ PRINTF("\r\nCreate directory......\r\n");
+ error = f_mkdir(_T("/images"));
+ if(error) {
+ if(error == FR_EXIST) {
+ PRINTF("Directory exists.\r\n");
+ } else {
+ PRINTF("Make directory failed.\r\n");
+ return kStatus_Fail;
+ }
+ }
+ return kStatus_Success;
+}
+
+void CardDetectTask(void *pvParameters) {
+ s_fileAccessSemaphore = xSemaphoreCreateBinary();
+ s_CardDetectSemaphore = xSemaphoreCreateBinary();
+
+ BOARD_SD_Config(&g_sd, SDCARD_DetectCallBack,
+ BOARD_SDMMC_SD_HOST_IRQ_PRIORITY, NULL);
+
+ /* SD host init function */
+ if(SD_HostInit(&g_sd) == kStatus_Success) {
+ while(true) {
+ /* take card detect semaphore */
+ if(xSemaphoreTake(s_CardDetectSemaphore, portMAX_DELAY) == pdTRUE) {
+ if(s_cardInserted != s_cardInsertStatus) {
+ s_cardInserted = s_cardInsertStatus;
+
+ if(s_cardInserted) {
+ PRINTF("\r\nCard inserted.\r\n");
+ /* power off card */
+ SD_SetCardPower(&g_sd, false);
+ /* power on the card */
+ SD_SetCardPower(&g_sd, true);
+ if(DEMO_MakeFileSystem() != kStatus_Success) {
+ continue;
+ }
+
+ xSemaphoreGive(s_fileAccessSemaphore);
+ }
+ }
+
+ if(!s_cardInserted) {
+ PRINTF("\r\nPlease insert a card into board.\r\n");
+ }
+ }
+ }
+ } else {
+ PRINTF("\r\nSD host init fail\r\n");
+ }
+
+ vTaskSuspend(NULL);
+}
diff --git a/source/user_tasks.h b/source/user_tasks.h
index 348db37..f78eb62 100644
--- a/source/user_tasks.h
+++ b/source/user_tasks.h
@@ -7,4 +7,7 @@
TaskHandle_t g_hello_task_handle;
void hello_task(void *pvParameters);
+TaskHandle_t g_card_detect_task_handle;
+void CardDetectTask(void *pvParameters);
+
#endif
\ No newline at end of file