840 lines
68 KiB
XML
840 lines
68 KiB
XML
<?xml version="1.0" encoding= "UTF-8" ?>
|
|
<configuration name="MIMXRT1052xxxxB" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_1.9 http://mcuxpresso.nxp.com/XSD/mex_configuration_1.9.xsd" uuid="23b2c0c6-a2f9-4d15-ac44-daaa7e04d445" version="1.9" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_1.9" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
|
|
<common>
|
|
<processor>MIMXRT1052xxxxB</processor>
|
|
<package>MIMXRT1052DVL6B</package>
|
|
<board>IMXRT1050-EVKB</board>
|
|
<mcu_data>ksdk2_0</mcu_data>
|
|
<cores selected="core0">
|
|
<core name="Cortex-M7F" id="core0" description="M7 core"/>
|
|
</cores>
|
|
<description>Configuration imported from /home/imi415/Documents/Hardwares/Kinetis_Projects/rt1050_freertos_template</description>
|
|
</common>
|
|
<preferences>
|
|
<validate_boot_init_only>true</validate_boot_init_only>
|
|
<generate_extended_information>false</generate_extended_information>
|
|
<generate_code_modified_registers_only>false</generate_code_modified_registers_only>
|
|
</preferences>
|
|
<tools>
|
|
<pins name="Pins" version="9.0" enabled="true" update_project_code="true">
|
|
<generated_project_files>
|
|
<file path="board/pin_mux.c" update_enabled="true"/>
|
|
<file path="board/pin_mux.h" update_enabled="true"/>
|
|
</generated_project_files>
|
|
<pins_profile>
|
|
<processor_version>9.0.1</processor_version>
|
|
<power_domains/>
|
|
</pins_profile>
|
|
<functions_list>
|
|
<function name="BOARD_InitPins">
|
|
<description>Configures pin routing and optionally pin electrical features.</description>
|
|
<options>
|
|
<callFromInitBoot>true</callFromInitBoot>
|
|
<coreID>core0</coreID>
|
|
<enableClock>true</enableClock>
|
|
</options>
|
|
<dependencies>
|
|
<dependency resourceType="Peripheral" resourceId="LPUART1" description="Peripheral LPUART1 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
|
|
<feature name="initialized" evaluation="equal">
|
|
<data>true</data>
|
|
</feature>
|
|
</dependency>
|
|
<dependency resourceType="Peripheral" resourceId="JTAG" description="Peripheral JTAG is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
|
|
<feature name="initialized" evaluation="equal">
|
|
<data>true</data>
|
|
</feature>
|
|
</dependency>
|
|
<dependency resourceType="Peripheral" resourceId="SUPPLY" description="Peripheral SUPPLY is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
|
|
<feature name="initialized" evaluation="equal">
|
|
<data>true</data>
|
|
</feature>
|
|
</dependency>
|
|
<dependency resourceType="Peripheral" resourceId="USB1" description="Peripheral USB1 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
|
|
<feature name="initialized" evaluation="equal">
|
|
<data>true</data>
|
|
</feature>
|
|
</dependency>
|
|
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
|
|
<feature name="enabled" evaluation="equal" configuration="core0">
|
|
<data>true</data>
|
|
</feature>
|
|
</dependency>
|
|
<dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
|
|
<feature name="enabled" evaluation="equal" configuration="core0">
|
|
<data>true</data>
|
|
</feature>
|
|
</dependency>
|
|
<dependency resourceType="SWComponent" resourceId="platform.drivers.igpio" description="Pins initialization requires the IGPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
|
|
<feature name="enabled" evaluation="equal" configuration="core0">
|
|
<data>true</data>
|
|
</feature>
|
|
</dependency>
|
|
</dependencies>
|
|
<pins>
|
|
<pin peripheral="LPUART1" signal="RX" pin_num="L14" pin_signal="GPIO_AD_B0_13">
|
|
<pin_features>
|
|
<pin_feature name="software_input_on" value="Disable"/>
|
|
<pin_feature name="hysteresis_enable" value="Disable"/>
|
|
<pin_feature name="pull_up_down_config" value="Pull_Down_100K_Ohm"/>
|
|
<pin_feature name="pull_keeper_select" value="Keeper"/>
|
|
<pin_feature name="pull_keeper_enable" value="Enable"/>
|
|
<pin_feature name="open_drain" value="Disable"/>
|
|
<pin_feature name="speed" value="MHZ_100"/>
|
|
<pin_feature name="drive_strength" value="R0_6"/>
|
|
<pin_feature name="slew_rate" value="Slow"/>
|
|
</pin_features>
|
|
</pin>
|
|
<pin peripheral="LPUART1" signal="TX" pin_num="K14" pin_signal="GPIO_AD_B0_12">
|
|
<pin_features>
|
|
<pin_feature name="software_input_on" value="Disable"/>
|
|
<pin_feature name="hysteresis_enable" value="Disable"/>
|
|
<pin_feature name="pull_up_down_config" value="Pull_Down_100K_Ohm"/>
|
|
<pin_feature name="pull_keeper_select" value="Keeper"/>
|
|
<pin_feature name="pull_keeper_enable" value="Enable"/>
|
|
<pin_feature name="open_drain" value="Disable"/>
|
|
<pin_feature name="speed" value="MHZ_100"/>
|
|
<pin_feature name="drive_strength" value="R0_6"/>
|
|
<pin_feature name="slew_rate" value="Slow"/>
|
|
</pin_features>
|
|
</pin>
|
|
<pin peripheral="GPIO1" signal="gpio_io, 10" pin_num="G13" pin_signal="GPIO_AD_B0_10">
|
|
<pin_features>
|
|
<pin_feature name="direction" value="OUTPUT"/>
|
|
<pin_feature name="gpio_init_state" value="true"/>
|
|
</pin_features>
|
|
</pin>
|
|
<pin peripheral="JTAG" signal="TMS" pin_num="E14" pin_signal="GPIO_AD_B0_06"/>
|
|
<pin peripheral="JTAG" signal="TCK" pin_num="F12" pin_signal="GPIO_AD_B0_07"/>
|
|
<pin peripheral="SUPPLY" signal="DCDC_GND, 0" pin_num="N1" pin_signal="DCDC_GND0"/>
|
|
<pin peripheral="SUPPLY" signal="DCDC_GND, 1" pin_num="N2" pin_signal="DCDC_GND1"/>
|
|
<pin peripheral="SUPPLY" signal="DCDC_IN, 0" pin_num="L1" pin_signal="DCDC_IN0"/>
|
|
<pin peripheral="SUPPLY" signal="DCDC_IN, 1" pin_num="L2" pin_signal="DCDC_IN1"/>
|
|
<pin peripheral="SUPPLY" signal="dcdc_in_q" pin_num="K4" pin_signal="DCDC_IN_Q"/>
|
|
<pin peripheral="SUPPLY" signal="DCDC_LP, 0" pin_num="M1" pin_signal="DCDC_LP0"/>
|
|
<pin peripheral="SUPPLY" signal="DCDC_LP, 1" pin_num="M2" pin_signal="DCDC_LP1"/>
|
|
<pin peripheral="SUPPLY" signal="dcdc_pswitch" pin_num="K3" pin_signal="DCDC_PSWITCH"/>
|
|
<pin peripheral="SUPPLY" signal="dcdc_sense" pin_num="J5" pin_signal="DCDC_SENSE"/>
|
|
<pin peripheral="SUPPLY" signal="gpanaio" pin_num="N10" pin_signal="GPANAIO"/>
|
|
<pin peripheral="SUPPLY" signal="ngnd_kel0" pin_num="K9" pin_signal="NGND_KEL0"/>
|
|
<pin peripheral="SUPPLY" signal="NVCC_EMC, 0" pin_num="F5" pin_signal="NVCC_EMC0"/>
|
|
<pin peripheral="SUPPLY" signal="NVCC_EMC, 1" pin_num="E6" pin_signal="NVCC_EMC1"/>
|
|
<pin peripheral="SUPPLY" signal="NVCC_GPIO, 0" pin_num="E9" pin_signal="NVCC_GPIO0"/>
|
|
<pin peripheral="SUPPLY" signal="NVCC_GPIO, 1" pin_num="F10" pin_signal="NVCC_GPIO1"/>
|
|
<pin peripheral="SUPPLY" signal="NVCC_GPIO, 2" pin_num="J10" pin_signal="NVCC_GPIO2"/>
|
|
<pin peripheral="SUPPLY" signal="nvcc_pll" pin_num="P10" pin_signal="NVCC_PLL"/>
|
|
<pin peripheral="SUPPLY" signal="nvcc_sd0" pin_num="J6" pin_signal="NVCC_SD0"/>
|
|
<pin peripheral="SUPPLY" signal="nvcc_sd1" pin_num="K5" pin_signal="NVCC_SD1"/>
|
|
<pin peripheral="SUPPLY" signal="test_mode" pin_num="K6" pin_signal="TEST_MODE"/>
|
|
<pin peripheral="SUPPLY" signal="usb_otg1_chd_b" pin_num="N12" pin_signal="USB_OTG1_CHD_B"/>
|
|
<pin peripheral="SUPPLY" signal="usb_otg1_dn" pin_num="M8" pin_signal="USB_OTG1_DN"/>
|
|
<pin peripheral="SUPPLY" signal="usb_otg1_dp" pin_num="L8" pin_signal="USB_OTG1_DP"/>
|
|
<pin peripheral="SUPPLY" signal="usb_otg1_vbus" pin_num="N6" pin_signal="USB_OTG1_VBUS"/>
|
|
<pin peripheral="SUPPLY" signal="usb_otg2_dn" pin_num="N7" pin_signal="USB_OTG2_DN"/>
|
|
<pin peripheral="SUPPLY" signal="usb_otg2_dp" pin_num="P7" pin_signal="USB_OTG2_DP"/>
|
|
<pin peripheral="SUPPLY" signal="usb_otg2_vbus" pin_num="P6" pin_signal="USB_OTG2_VBUS"/>
|
|
<pin peripheral="SUPPLY" signal="VDD_HIGH_CAP" pin_num="P8" pin_signal="VDD_HIGH_CAP"/>
|
|
<pin peripheral="SUPPLY" signal="VDD_HIGH_IN" pin_num="P12" pin_signal="VDD_HIGH_IN"/>
|
|
<pin peripheral="SUPPLY" signal="VDD_SNVS_CAP" pin_num="M10" pin_signal="VDD_SNVS_CAP"/>
|
|
<pin peripheral="SUPPLY" signal="VDD_SNVS_IN" pin_num="M9" pin_signal="VDD_SNVS_IN"/>
|
|
<pin peripheral="SUPPLY" signal="VDD_SOC_IN, 0" pin_num="F6" pin_signal="VDD_SOC_IN0"/>
|
|
<pin peripheral="SUPPLY" signal="VDD_SOC_IN, 1" pin_num="G6" pin_signal="VDD_SOC_IN1"/>
|
|
<pin peripheral="SUPPLY" signal="VDD_SOC_IN, 2" pin_num="H6" pin_signal="VDD_SOC_IN2"/>
|
|
<pin peripheral="SUPPLY" signal="VDD_SOC_IN, 3" pin_num="F7" pin_signal="VDD_SOC_IN3"/>
|
|
<pin peripheral="SUPPLY" signal="VDD_SOC_IN, 4" pin_num="F8" pin_signal="VDD_SOC_IN4"/>
|
|
<pin peripheral="SUPPLY" signal="VDD_SOC_IN, 5" pin_num="F9" pin_signal="VDD_SOC_IN5"/>
|
|
<pin peripheral="SUPPLY" signal="VDD_SOC_IN, 6" pin_num="G9" pin_signal="VDD_SOC_IN6"/>
|
|
<pin peripheral="SUPPLY" signal="VDD_SOC_IN, 7" pin_num="H9" pin_signal="VDD_SOC_IN7"/>
|
|
<pin peripheral="SUPPLY" signal="VDD_SOC_IN, 8" pin_num="J9" pin_signal="VDD_SOC_IN8"/>
|
|
<pin peripheral="SUPPLY" signal="VDD_USB_CAP" pin_num="K8" pin_signal="VDD_USB_CAP"/>
|
|
<pin peripheral="SUPPLY" signal="VDDA_ADC_3P3" pin_num="N14" pin_signal="VDDA_ADC_3P3"/>
|
|
<pin peripheral="SUPPLY" signal="VSS, 0" pin_num="A1" pin_signal="VSS0"/>
|
|
<pin peripheral="SUPPLY" signal="VSS, 1" pin_num="P1" pin_signal="VSS1"/>
|
|
<pin peripheral="SUPPLY" signal="VSS, 2" pin_num="E2" pin_signal="VSS2"/>
|
|
<pin peripheral="SUPPLY" signal="VSS, 3" pin_num="K2" pin_signal="VSS3"/>
|
|
<pin peripheral="SUPPLY" signal="VSS, 4" pin_num="B5" pin_signal="VSS4"/>
|
|
<pin peripheral="SUPPLY" signal="VSS, 5" pin_num="N5" pin_signal="VSS5"/>
|
|
<pin peripheral="SUPPLY" signal="VSS, 6" pin_num="G7" pin_signal="VSS6"/>
|
|
<pin peripheral="SUPPLY" signal="VSS, 7" pin_num="H7" pin_signal="VSS7"/>
|
|
<pin peripheral="SUPPLY" signal="VSS, 8" pin_num="J7" pin_signal="VSS8"/>
|
|
<pin peripheral="SUPPLY" signal="VSS, 9" pin_num="G8" pin_signal="VSS9"/>
|
|
<pin peripheral="SUPPLY" signal="VSS, 10" pin_num="H8" pin_signal="VSS10"/>
|
|
<pin peripheral="SUPPLY" signal="VSS, 11" pin_num="J8" pin_signal="VSS11"/>
|
|
<pin peripheral="SUPPLY" signal="VSS, 12" pin_num="N8" pin_signal="VSS12"/>
|
|
<pin peripheral="SUPPLY" signal="VSS, 13" pin_num="L9" pin_signal="VSS13"/>
|
|
<pin peripheral="SUPPLY" signal="VSS, 14" pin_num="B10" pin_signal="VSS14"/>
|
|
<pin peripheral="SUPPLY" signal="VSS, 15" pin_num="E13" pin_signal="VSS15"/>
|
|
<pin peripheral="SUPPLY" signal="VSS, 16" pin_num="K13" pin_signal="VSS16"/>
|
|
<pin peripheral="SUPPLY" signal="VSS, 17" pin_num="A14" pin_signal="VSS17"/>
|
|
<pin peripheral="SUPPLY" signal="VSS, 18" pin_num="P14" pin_signal="VSS18"/>
|
|
<pin peripheral="USB1" signal="usb_otg1_id" pin_num="H10" pin_signal="GPIO_AD_B0_01"/>
|
|
</pins>
|
|
</function>
|
|
</functions_list>
|
|
</pins>
|
|
<clocks name="Clocks" version="7.0" enabled="true" update_project_code="true">
|
|
<generated_project_files>
|
|
<file path="board/clock_config.c" update_enabled="true"/>
|
|
<file path="board/clock_config.h" update_enabled="true"/>
|
|
</generated_project_files>
|
|
<clocks_profile>
|
|
<processor_version>9.0.1</processor_version>
|
|
</clocks_profile>
|
|
<clock_configurations>
|
|
<clock_configuration name="BOARD_BootClockRUN">
|
|
<description></description>
|
|
<options/>
|
|
<dependencies>
|
|
<dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtali" description="'RTC_XTALI' (Pins tool id: XTALOSC24M.rtc_xtali, Clocks tool id: XTALOSC24M.RTC_XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
|
|
<feature name="routed" evaluation="">
|
|
<data>true</data>
|
|
</feature>
|
|
</dependency>
|
|
<dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtali" description="'RTC_XTALI' (Pins tool id: XTALOSC24M.rtc_xtali, Clocks tool id: XTALOSC24M.RTC_XTALI) needs to have 'INPUT' direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
|
|
<feature name="direction" evaluation="">
|
|
<data>INPUT</data>
|
|
</feature>
|
|
</dependency>
|
|
<dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtalo" description="'RTC_XTALO' (Pins tool id: XTALOSC24M.rtc_xtalo, Clocks tool id: XTALOSC24M.RTC_XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
|
|
<feature name="routed" evaluation="">
|
|
<data>true</data>
|
|
</feature>
|
|
</dependency>
|
|
<dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtalo" description="'RTC_XTALO' (Pins tool id: XTALOSC24M.rtc_xtalo, Clocks tool id: XTALOSC24M.RTC_XTALO) needs to have 'OUTPUT' direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
|
|
<feature name="direction" evaluation="">
|
|
<data>OUTPUT</data>
|
|
</feature>
|
|
</dependency>
|
|
<dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtali" description="'XTALI' (Pins tool id: XTALOSC24M.xtali, Clocks tool id: XTALOSC24M.XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
|
|
<feature name="routed" evaluation="">
|
|
<data>true</data>
|
|
</feature>
|
|
</dependency>
|
|
<dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtali" description="'XTALI' (Pins tool id: XTALOSC24M.xtali, Clocks tool id: XTALOSC24M.XTALI) needs to have 'INPUT' direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
|
|
<feature name="direction" evaluation="">
|
|
<data>INPUT</data>
|
|
</feature>
|
|
</dependency>
|
|
<dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtalo" description="'XTALO' (Pins tool id: XTALOSC24M.xtalo, Clocks tool id: XTALOSC24M.XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
|
|
<feature name="routed" evaluation="">
|
|
<data>true</data>
|
|
</feature>
|
|
</dependency>
|
|
<dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtalo" description="'XTALO' (Pins tool id: XTALOSC24M.xtalo, Clocks tool id: XTALOSC24M.XTALO) needs to have 'OUTPUT' direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
|
|
<feature name="direction" evaluation="">
|
|
<data>OUTPUT</data>
|
|
</feature>
|
|
</dependency>
|
|
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
|
|
<feature name="enabled" evaluation="equal" configuration="core0">
|
|
<data>true</data>
|
|
</feature>
|
|
</dependency>
|
|
<dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Clocks initialization requires the IOMUXC Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
|
|
<feature name="enabled" evaluation="equal" configuration="core0">
|
|
<data>true</data>
|
|
</feature>
|
|
</dependency>
|
|
</dependencies>
|
|
<clock_sources>
|
|
<clock_source id="XTALOSC24M.RTC_OSC.outFreq" value="32.768 kHz" locked="false" enabled="true"/>
|
|
</clock_sources>
|
|
<clock_outputs>
|
|
<clock_output id="AHB_CLK_ROOT.outFreq" value="600 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="CAN_CLK_ROOT.outFreq" value="40 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="CKIL_SYNC_CLK_ROOT.outFreq" value="32.768 kHz" locked="false" accuracy=""/>
|
|
<clock_output id="CLK_1M.outFreq" value="1 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="CLK_24M.outFreq" value="24 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="CSI_CLK_ROOT.outFreq" value="12 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="ENET1_TX_CLK.outFreq" value="2.4 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="ENET_125M_CLK.outFreq" value="2.4 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="ENET_25M_REF_CLK.outFreq" value="1.2 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="FLEXIO1_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="FLEXIO2_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="FLEXSPI_CLK_ROOT.outFreq" value="160 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="GPT1_ipg_clk_highfreq.outFreq" value="75 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="GPT2_ipg_clk_highfreq.outFreq" value="75 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="IPG_CLK_ROOT.outFreq" value="150 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="LCDIF_CLK_ROOT.outFreq" value="67.5 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="LPI2C_CLK_ROOT.outFreq" value="60 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="LPSPI_CLK_ROOT.outFreq" value="105.6 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="LVDS1_CLK.outFreq" value="1.2 GHz" locked="false" accuracy=""/>
|
|
<clock_output id="MQS_MCLK.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="PERCLK_CLK_ROOT.outFreq" value="75 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="PLL7_MAIN_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="SAI1_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="SAI1_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="SAI1_MCLK2.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="SAI1_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="SAI2_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="SAI2_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="SAI2_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="SAI3_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="SAI3_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="SAI3_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="SEMC_CLK_ROOT.outFreq" value="75 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="SPDIF0_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="TRACE_CLK_ROOT.outFreq" value="132 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="UART_CLK_ROOT.outFreq" value="80 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="USBPHY1_CLK.outFreq" value="480 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="USDHC1_CLK_ROOT.outFreq" value="198 MHz" locked="false" accuracy=""/>
|
|
<clock_output id="USDHC2_CLK_ROOT.outFreq" value="198 MHz" locked="false" accuracy=""/>
|
|
</clock_outputs>
|
|
<clock_settings>
|
|
<setting id="CCM.AHB_PODF.scale" value="1" locked="true"/>
|
|
<setting id="CCM.ARM_PODF.scale" value="2" locked="true"/>
|
|
<setting id="CCM.FLEXSPI_PODF.scale" value="3" locked="true"/>
|
|
<setting id="CCM.FLEXSPI_SEL.sel" value="CCM.PLL3_SW_CLK_SEL" locked="false"/>
|
|
<setting id="CCM.LPSPI_PODF.scale" value="5" locked="true"/>
|
|
<setting id="CCM.PERCLK_PODF.scale" value="2" locked="true"/>
|
|
<setting id="CCM.SEMC_PODF.scale" value="8" locked="false"/>
|
|
<setting id="CCM.TRACE_CLK_SEL.sel" value="CCM_ANALOG.PLL2_MAIN_CLK" locked="false"/>
|
|
<setting id="CCM.TRACE_PODF.scale" value="4" locked="true"/>
|
|
<setting id="CCM_ANALOG.PLL1_BYPASS.sel" value="CCM_ANALOG.PLL1" locked="false"/>
|
|
<setting id="CCM_ANALOG.PLL1_PREDIV.scale" value="1" locked="true"/>
|
|
<setting id="CCM_ANALOG.PLL1_VDIV.scale" value="50" locked="true"/>
|
|
<setting id="CCM_ANALOG.PLL2.denom" value="1" locked="true"/>
|
|
<setting id="CCM_ANALOG.PLL2.num" value="0" locked="true"/>
|
|
<setting id="CCM_ANALOG.PLL2_BYPASS.sel" value="CCM_ANALOG.PLL2_OUT_CLK" locked="false"/>
|
|
<setting id="CCM_ANALOG.PLL2_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD0" locked="false"/>
|
|
<setting id="CCM_ANALOG.PLL2_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD1" locked="false"/>
|
|
<setting id="CCM_ANALOG.PLL2_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD2" locked="false"/>
|
|
<setting id="CCM_ANALOG.PLL2_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD3" locked="false"/>
|
|
<setting id="CCM_ANALOG.PLL3_BYPASS.sel" value="CCM_ANALOG.PLL3" locked="false"/>
|
|
<setting id="CCM_ANALOG.PLL3_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD0" locked="false"/>
|
|
<setting id="CCM_ANALOG.PLL3_PFD0_DIV.scale" value="33" locked="true"/>
|
|
<setting id="CCM_ANALOG.PLL3_PFD0_MUL.scale" value="18" locked="true"/>
|
|
<setting id="CCM_ANALOG.PLL3_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD1" locked="false"/>
|
|
<setting id="CCM_ANALOG.PLL3_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD2" locked="false"/>
|
|
<setting id="CCM_ANALOG.PLL3_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD3" locked="false"/>
|
|
<setting id="CCM_ANALOG.PLL4.denom" value="50" locked="false"/>
|
|
<setting id="CCM_ANALOG.PLL4.div" value="47" locked="false"/>
|
|
<setting id="CCM_ANALOG.PLL5.denom" value="1" locked="false"/>
|
|
<setting id="CCM_ANALOG.PLL5.div" value="31" locked="true"/>
|
|
<setting id="CCM_ANALOG.PLL5.num" value="0" locked="false"/>
|
|
<setting id="CCM_ANALOG.PLL5_BYPASS.sel" value="CCM_ANALOG.PLL5_POST_DIV" locked="false"/>
|
|
<setting id="CCM_ANALOG.PLL5_POST_DIV.scale" value="2" locked="false"/>
|
|
<setting id="CCM_ANALOG.VIDEO_DIV.scale" value="4" locked="false"/>
|
|
<setting id="CCM_ANALOG_PLL_ENET_POWERDOWN_CFG" value="Yes" locked="false"/>
|
|
<setting id="CCM_ANALOG_PLL_USB1_EN_USB_CLKS_CFG" value="Enabled" locked="false"/>
|
|
<setting id="CCM_ANALOG_PLL_USB1_EN_USB_CLKS_OUT_CFG" value="Enabled" locked="false"/>
|
|
<setting id="CCM_ANALOG_PLL_USB1_POWER_CFG" value="Yes" locked="false"/>
|
|
<setting id="CCM_ANALOG_PLL_VIDEO_POWERDOWN_CFG" value="No" locked="false"/>
|
|
</clock_settings>
|
|
<called_from_default_init>true</called_from_default_init>
|
|
</clock_configuration>
|
|
</clock_configurations>
|
|
</clocks>
|
|
<dcdx name="DCDx" version="3.0" enabled="true" update_project_code="true">
|
|
<generated_project_files>
|
|
<file path="board/dcd.c" update_enabled="true"/>
|
|
<file path="board/dcd.h" update_enabled="true"/>
|
|
</generated_project_files>
|
|
<dcdx_profile>
|
|
<processor_version>9.0.1</processor_version>
|
|
<output_format>c_array</output_format>
|
|
</dcdx_profile>
|
|
<dcdx_configurations>
|
|
<dcdx_configuration name="Device_configuration">
|
|
<description></description>
|
|
<options/>
|
|
<command_groups>
|
|
<command_group name="Imported Commands" enabled="true">
|
|
<commands>
|
|
<command type="write_value" address="CCM_CCGR0" value="0xFFFFFFFF" value_width="4"/>
|
|
<command type="write_value" address="CCM_CCGR1" value="0xFFFFFFFF" value_width="4"/>
|
|
<command type="write_value" address="CCM_CCGR2" value="0xFFFFFFFF" value_width="4"/>
|
|
<command type="write_value" address="CCM_CCGR3" value="0xFFFFFFFF" value_width="4"/>
|
|
<command type="write_value" address="CCM_CCGR4" value="0xFFFFFFFF" value_width="4"/>
|
|
<command type="write_value" address="CCM_CCGR5" value="0xFFFFFFFF" value_width="4"/>
|
|
<command type="write_value" address="CCM_CCGR6" value="0xFFFFFFFF" value_width="4"/>
|
|
<command type="write_value" address="CCM_ANALOG_PLL_SYS" value="0x2001" value_width="4"/>
|
|
<command type="write_value" address="CCM_ANALOG_PFD_528" value="0x1D0000" value_width="4"/>
|
|
<command type="write_value" address="CCM_CBCDR" value="0x10D40" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_00" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_01" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_02" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_03" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_04" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_05" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_06" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_07" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_08" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_09" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_10" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_11" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_12" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_13" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_14" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_15" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_16" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_17" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_18" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_19" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_20" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_21" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_22" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_23" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_24" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_25" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_26" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_27" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_28" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_29" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_30" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_31" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_32" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_33" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_34" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_35" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_36" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_37" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_38" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_39" value="0x10" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_00" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_01" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_02" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_03" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_04" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_05" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_06" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_07" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_08" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_09" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_10" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_11" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_12" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_13" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_14" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_15" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_16" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_17" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_18" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_19" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_20" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_21" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_22" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_23" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_24" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_25" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_26" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_27" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_28" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_29" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_30" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_31" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_32" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_33" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_34" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_35" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_36" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_37" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_38" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_39" value="0x110F9" value_width="4"/>
|
|
<command type="write_value" address="SEMC_MCR" value="0x10000004" value_width="4"/>
|
|
<command type="write_value" address="SEMC_BMCR0" value="0x81" value_width="4"/>
|
|
<command type="write_value" address="SEMC_BMCR1" value="0x81" value_width="4"/>
|
|
<command type="write_value" address="SEMC_BR0" value="0x8000001B" value_width="4"/>
|
|
<command type="write_value" address="SEMC_BR1" value="0x8200001B" value_width="4"/>
|
|
<command type="write_value" address="SEMC_BR2" value="0x8400001B" value_width="4"/>
|
|
<command type="write_value" address="SEMC_BR3" value="0x8600001B" value_width="4"/>
|
|
<command type="write_value" address="SEMC_BR4" value="0x90000021" value_width="4"/>
|
|
<command type="write_value" address="SEMC_BR5" value="0xA0000019" value_width="4"/>
|
|
<command type="write_value" address="SEMC_BR6" value="0xA8000017" value_width="4"/>
|
|
<command type="write_value" address="SEMC_BR7" value="0xA900001B" value_width="4"/>
|
|
<command type="write_value" address="SEMC_BR8" value="0x21" value_width="4"/>
|
|
<command type="write_value" address="SEMC_IOCR" value="0x79A8" value_width="4"/>
|
|
<command type="write_value" address="SEMC_SDRAMCR0" value="0xF31" value_width="4"/>
|
|
<command type="write_value" address="SEMC_SDRAMCR1" value="0x652922" value_width="4"/>
|
|
<command type="write_value" address="SEMC_SDRAMCR2" value="0x10920" value_width="4"/>
|
|
<command type="write_value" address="SEMC_SDRAMCR3" value="0x50210A08" value_width="4"/>
|
|
<command type="write_value" address="SEMC_DBICR0" value="0x21" value_width="4"/>
|
|
<command type="write_value" address="SEMC_DBICR1" value="0x888888" value_width="4"/>
|
|
<command type="write_value" address="SEMC_IPCR1" value="0x02" value_width="4"/>
|
|
<command type="write_value" address="SEMC_IPCR2" value="0x00" value_width="4"/>
|
|
<command type="write_value" address="SEMC_IPCR0" value="0x80000000" value_width="4"/>
|
|
<command type="write_value" address="SEMC_IPCMD" value="0xA55A000F" value_width="4"/>
|
|
<command type="check_any_bit_set" address="SEMC_INTR" value="0x01" value_width="4"/>
|
|
<command type="write_value" address="SEMC_IPCR0" value="0x80000000" value_width="4"/>
|
|
<command type="write_value" address="SEMC_IPCMD" value="0xA55A000C" value_width="4"/>
|
|
<command type="check_any_bit_set" address="SEMC_INTR" value="0x01" value_width="4"/>
|
|
<command type="write_value" address="SEMC_IPCR0" value="0x80000000" value_width="4"/>
|
|
<command type="write_value" address="SEMC_IPCMD" value="0xA55A000C" value_width="4"/>
|
|
<command type="check_any_bit_set" address="SEMC_INTR" value="0x01" value_width="4"/>
|
|
<command type="write_value" address="SEMC_IPTXDAT" value="0x33" value_width="4"/>
|
|
<command type="write_value" address="SEMC_IPCR0" value="0x80000000" value_width="4"/>
|
|
<command type="write_value" address="SEMC_IPCMD" value="0xA55A000A" value_width="4"/>
|
|
<command type="check_any_bit_set" address="SEMC_INTR" value="0x01" value_width="4"/>
|
|
<command type="write_value" address="SEMC_SDRAMCR3" value="0x50210A09" value_width="4"/>
|
|
</commands>
|
|
</command_group>
|
|
</command_groups>
|
|
</dcdx_configuration>
|
|
</dcdx_configurations>
|
|
</dcdx>
|
|
<periphs name="Peripherals" version="9.0" enabled="true" update_project_code="true">
|
|
<dependencies>
|
|
<dependency resourceType="SWComponent" resourceId="platform.drivers.lpuart" description="LPUART Driver not found in the toolchain/IDE project. Project will not compile!" problem_level="2" source="Peripherals">
|
|
<feature name="enabled" evaluation="equal">
|
|
<data type="Boolean">true</data>
|
|
</feature>
|
|
</dependency>
|
|
<dependency resourceType="SWComponent" resourceId="platform.drivers.lpuart" description="Unsupported version of the LPUART Driver in the toolchain/IDE project. Required: ${required_value}, actual: ${actual_value}. Project might not compile correctly." problem_level="1" source="Peripherals">
|
|
<feature name="version" evaluation="greaterOrEqual">
|
|
<data type="Version">2.2.8</data>
|
|
</feature>
|
|
</dependency>
|
|
<dependency resourceType="SWComponent" resourceId="middleware.usb.common_header" description="USB Common Header not found in the toolchain/IDE project. Project will not compile!" problem_level="2" source="Peripherals">
|
|
<feature name="enabled" evaluation="equal">
|
|
<data type="Boolean">true</data>
|
|
</feature>
|
|
</dependency>
|
|
<dependency resourceType="SWComponent" resourceId="middleware.usb.common_header" description="Unsupported version of the USB Common Header in the toolchain/IDE project. Required: ${required_value}, actual: ${actual_value}. Project might not compile correctly." problem_level="1" source="Peripherals">
|
|
<feature name="version" evaluation="equivalent">
|
|
<data type="Version">2.7.0</data>
|
|
</feature>
|
|
</dependency>
|
|
</dependencies>
|
|
<generated_project_files>
|
|
<file path="board/peripherals.c" update_enabled="true"/>
|
|
<file path="board/peripherals.h" update_enabled="true"/>
|
|
<file path="source/generated/usb_device_composite.c" update_enabled="true"/>
|
|
<file path="source/generated/usb_device_composite.h" update_enabled="true"/>
|
|
<file path="source/generated/usb_device_config.h" update_enabled="true"/>
|
|
<file path="source/generated/usb_device_descriptor.c" update_enabled="true"/>
|
|
<file path="source/generated/usb_device_descriptor.h" update_enabled="true"/>
|
|
<file path="source/usb_device_interface_0_cic_vcom.c" update_enabled="true"/>
|
|
<file path="source/usb_device_interface_0_cic_vcom.h" update_enabled="true"/>
|
|
<file path="source/usb_device_interface_2_cic_vcom.c" update_enabled="true"/>
|
|
<file path="source/usb_device_interface_2_cic_vcom.h" update_enabled="true"/>
|
|
<file path="source/usb_device_interface_4_cic_vcom.c" update_enabled="true"/>
|
|
<file path="source/usb_device_interface_4_cic_vcom.h" update_enabled="true"/>
|
|
</generated_project_files>
|
|
<peripherals_profile>
|
|
<processor_version>9.0.1</processor_version>
|
|
</peripherals_profile>
|
|
<functional_groups>
|
|
<functional_group name="BOARD_InitPeripherals" uuid="f1fa4e90-59a0-4ebb-b5c6-285f38e255e8" called_from_default_init="true" id_prefix="" core="core0">
|
|
<description></description>
|
|
<options/>
|
|
<dependencies>
|
|
<dependency resourceType="ClockOutput" resourceId="UART_CLK_ROOT" description="UART_CLK_ROOT is inactive." problem_level="2" source="Peripherals:BOARD_InitPeripherals">
|
|
<feature name="frequency" evaluation="greaterThan">
|
|
<data type="Frequency" unit="Hz">0</data>
|
|
</feature>
|
|
</dependency>
|
|
<dependency resourceType="PeripheralUnifiedSignal" resourceId="LPUART1.uart_tx" description="Signal TX of the peripheral LPUART1 is not routed." problem_level="1" source="Peripherals:BOARD_InitPeripherals">
|
|
<feature name="routed" evaluation="equal">
|
|
<data type="Boolean">true</data>
|
|
</feature>
|
|
</dependency>
|
|
<dependency resourceType="PeripheralUnifiedSignal" resourceId="LPUART1.uart_rx" description="Signal RX of the peripheral LPUART1 is not routed." problem_level="1" source="Peripherals:BOARD_InitPeripherals">
|
|
<feature name="routed" evaluation="equal">
|
|
<data type="Boolean">true</data>
|
|
</feature>
|
|
</dependency>
|
|
<dependency resourceType="SWComponent" resourceId="middleware.usb.device_controller_ehci" description=""USB Device EHCI Controller Driver(HS)" component is missing in the project." problem_level="2" source="Peripherals:BOARD_InitPeripherals">
|
|
<feature name="enabled" evaluation="equal">
|
|
<data type="Boolean">true</data>
|
|
</feature>
|
|
</dependency>
|
|
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description=""Common" driver is missing in the project." problem_level="2" source="Peripherals:BOARD_InitPeripherals">
|
|
<feature name="enabled" evaluation="equal">
|
|
<data type="Boolean">true</data>
|
|
</feature>
|
|
</dependency>
|
|
<dependency resourceType="ClockOutput" resourceId="USBPHY1_CLK" description="USB Function Clock (USBPHY1_CLK) is inactive and USB module will not work." problem_level="2" source="Peripherals:BOARD_InitPeripherals">
|
|
<feature name="frequency" evaluation="greaterThan">
|
|
<data type="Frequency" unit="Hz">0</data>
|
|
</feature>
|
|
</dependency>
|
|
<dependency resourceType="SWComponent" resourceId="middleware.usb.device.cdc.external" description=""USB device CDC" driver is missing in the project." problem_level="2" source="Peripherals:BOARD_InitPeripherals">
|
|
<feature name="enabled" evaluation="equal">
|
|
<data type="Boolean">true</data>
|
|
</feature>
|
|
</dependency>
|
|
<dependency resourceType="SWComponent" resourceId="middleware.usb.device.cdc.external" description=""USB device CDC" driver is missing in the project." problem_level="2" source="Peripherals:BOARD_InitPeripherals">
|
|
<feature name="enabled" evaluation="equal">
|
|
<data type="Boolean">true</data>
|
|
</feature>
|
|
</dependency>
|
|
</dependencies>
|
|
<instances>
|
|
<instance name="NVIC" uuid="dbd92b3e-7d46-4b9a-885c-402ea0f21aa7" type="nvic" type_id="nvic_57b5eef3774cc60acaede6f5b8bddc67" mode="general" peripheral="NVIC" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
|
|
<config_set name="nvic">
|
|
<array name="interrupt_table"/>
|
|
<array name="interrupts"/>
|
|
</config_set>
|
|
</instance>
|
|
<instance name="LPUART1" uuid="4ddb9aca-40e1-49bc-aa3f-28d73cbb2654" type="lpuart" type_id="lpuart_54a65a580e3462acdbacefd5299e0cac" mode="polling" peripheral="LPUART1" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
|
|
<config_set name="lpuartConfig_t" quick_selection="QuickSelection1">
|
|
<struct name="lpuartConfig">
|
|
<setting name="clockSource" value="LpuartClock"/>
|
|
<setting name="lpuartSrcClkFreq" value="BOARD_BootClockRUN"/>
|
|
<setting name="baudRate_Bps" value="115200"/>
|
|
<setting name="parityMode" value="kLPUART_ParityDisabled"/>
|
|
<setting name="dataBitsCount" value="kLPUART_EightDataBits"/>
|
|
<setting name="isMsb" value="false"/>
|
|
<setting name="stopBitCount" value="kLPUART_OneStopBit"/>
|
|
<setting name="txFifoWatermark" value="0"/>
|
|
<setting name="rxFifoWatermark" value="1"/>
|
|
<setting name="enableRxRTS" value="false"/>
|
|
<setting name="enableTxCTS" value="false"/>
|
|
<setting name="txCtsSource" value="kLPUART_CtsSourcePin"/>
|
|
<setting name="txCtsConfig" value="kLPUART_CtsSampleAtStart"/>
|
|
<setting name="rxIdleType" value="kLPUART_IdleTypeStartBit"/>
|
|
<setting name="rxIdleConfig" value="kLPUART_IdleCharacter1"/>
|
|
<setting name="enableTx" value="true"/>
|
|
<setting name="enableRx" value="true"/>
|
|
</struct>
|
|
</config_set>
|
|
</instance>
|
|
<instance name="USB1" uuid="fa0728df-ea7a-47b6-9678-549e8a96b072" type="usb" type_id="usb_49b3e4c7d25fbcd298641994d1b911e9" mode="device" peripheral="USB1" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
|
|
<config_set name="deviceSetting">
|
|
<setting name="vendor_id" value="0x1FC9"/>
|
|
<setting name="product_id" value="0x0094"/>
|
|
<setting name="manufacturer_string" value="NXP Semiconductors"/>
|
|
<setting name="product_string" value="CDC Virtual COM"/>
|
|
<setting name="self_powered" value="true"/>
|
|
<setting name="max_power" value="500"/>
|
|
<array name="interfaces">
|
|
<struct name="0">
|
|
<setting name="interface_class" value="kClassCic"/>
|
|
<struct name="setting_cic" quick_selection="QS_INTERFACE_CIC_VCOM">
|
|
<setting name="interface_name" value="CIC VCOM"/>
|
|
<setting name="subclass" value="kSubclassAcm"/>
|
|
<setting name="protocol" value="kProtocolNone"/>
|
|
<setting name="implementation" value="kImplementationCicVcom"/>
|
|
<array name="endpoints_settings">
|
|
<struct name="0">
|
|
<setting name="setting_name" value="Default"/>
|
|
<array name="endpoints">
|
|
<struct name="0">
|
|
<setting name="direction" value="kIn"/>
|
|
<setting name="transfer_type" value="kInterrupt"/>
|
|
<setting name="synchronization" value="kNoSynchronization"/>
|
|
<setting name="usage" value="kData"/>
|
|
<setting name="max_packet_size_fs" value="k16"/>
|
|
<setting name="polling_interval_fs" value="8"/>
|
|
<setting name="max_packet_size_hs" value="k16"/>
|
|
<setting name="polling_interval_hs" value="7"/>
|
|
<setting name="bRefresh" value="0"/>
|
|
<setting name="bSynchAddress" value="NoSynchronization"/>
|
|
</struct>
|
|
</array>
|
|
</struct>
|
|
</array>
|
|
<setting name="data_interface_count" value="1"/>
|
|
</struct>
|
|
</struct>
|
|
<struct name="1">
|
|
<setting name="interface_class" value="kClassDic"/>
|
|
<struct name="setting_dic" quick_selection="QS_INTERFACE_DIC_VCOM">
|
|
<setting name="interface_name" value="DIC VCOM"/>
|
|
<setting name="subclass" value="kSubclassNone"/>
|
|
<setting name="protocol" value="kProtocolNone"/>
|
|
<setting name="implementation" value="kImplementationDicVcom"/>
|
|
<array name="endpoints_settings">
|
|
<struct name="0">
|
|
<setting name="setting_name" value="Default"/>
|
|
<array name="endpoints">
|
|
<struct name="0">
|
|
<setting name="direction" value="kIn"/>
|
|
<setting name="transfer_type" value="kBulk"/>
|
|
<setting name="synchronization" value="kNoSynchronization"/>
|
|
<setting name="usage" value="kData"/>
|
|
<setting name="max_packet_size_fs" value="k64"/>
|
|
<setting name="polling_interval_fs" value="0"/>
|
|
<setting name="max_packet_size_hs" value="k512"/>
|
|
<setting name="polling_interval_hs" value="0"/>
|
|
<setting name="bRefresh" value="0"/>
|
|
<setting name="bSynchAddress" value="NoSynchronization"/>
|
|
</struct>
|
|
<struct name="1">
|
|
<setting name="direction" value="kOut"/>
|
|
<setting name="transfer_type" value="kBulk"/>
|
|
<setting name="synchronization" value="kNoSynchronization"/>
|
|
<setting name="usage" value="kData"/>
|
|
<setting name="max_packet_size_fs" value="k64"/>
|
|
<setting name="polling_interval_fs" value="0"/>
|
|
<setting name="max_packet_size_hs" value="k512"/>
|
|
<setting name="polling_interval_hs" value="0"/>
|
|
<setting name="bRefresh" value="0"/>
|
|
<setting name="bSynchAddress" value="NoSynchronization"/>
|
|
</struct>
|
|
</array>
|
|
</struct>
|
|
</array>
|
|
</struct>
|
|
</struct>
|
|
<struct name="2">
|
|
<setting name="interface_class" value="kClassCic"/>
|
|
<struct name="setting_cic" quick_selection="QS_INTERFACE_CIC_VCOM">
|
|
<setting name="interface_name" value="CIC VCOM"/>
|
|
<setting name="subclass" value="kSubclassAcm"/>
|
|
<setting name="protocol" value="kProtocolNone"/>
|
|
<setting name="implementation" value="kImplementationCicVcom"/>
|
|
<array name="endpoints_settings">
|
|
<struct name="0">
|
|
<setting name="setting_name" value="Default"/>
|
|
<array name="endpoints">
|
|
<struct name="0">
|
|
<setting name="direction" value="kIn"/>
|
|
<setting name="transfer_type" value="kInterrupt"/>
|
|
<setting name="synchronization" value="kNoSynchronization"/>
|
|
<setting name="usage" value="kData"/>
|
|
<setting name="max_packet_size_fs" value="k16"/>
|
|
<setting name="polling_interval_fs" value="8"/>
|
|
<setting name="max_packet_size_hs" value="k16"/>
|
|
<setting name="polling_interval_hs" value="7"/>
|
|
<setting name="bRefresh" value="0"/>
|
|
<setting name="bSynchAddress" value="NoSynchronization"/>
|
|
</struct>
|
|
</array>
|
|
</struct>
|
|
</array>
|
|
<setting name="data_interface_count" value="1"/>
|
|
</struct>
|
|
</struct>
|
|
<struct name="3">
|
|
<setting name="interface_class" value="kClassDic"/>
|
|
<struct name="setting_dic" quick_selection="QS_INTERFACE_DIC_VCOM">
|
|
<setting name="interface_name" value="DIC VCOM"/>
|
|
<setting name="subclass" value="kSubclassNone"/>
|
|
<setting name="protocol" value="kProtocolNone"/>
|
|
<setting name="implementation" value="kImplementationDicVcom"/>
|
|
<array name="endpoints_settings">
|
|
<struct name="0">
|
|
<setting name="setting_name" value="Default"/>
|
|
<array name="endpoints">
|
|
<struct name="0">
|
|
<setting name="direction" value="kIn"/>
|
|
<setting name="transfer_type" value="kBulk"/>
|
|
<setting name="synchronization" value="kNoSynchronization"/>
|
|
<setting name="usage" value="kData"/>
|
|
<setting name="max_packet_size_fs" value="k64"/>
|
|
<setting name="polling_interval_fs" value="0"/>
|
|
<setting name="max_packet_size_hs" value="k512"/>
|
|
<setting name="polling_interval_hs" value="0"/>
|
|
<setting name="bRefresh" value="0"/>
|
|
<setting name="bSynchAddress" value="NoSynchronization"/>
|
|
</struct>
|
|
<struct name="1">
|
|
<setting name="direction" value="kOut"/>
|
|
<setting name="transfer_type" value="kBulk"/>
|
|
<setting name="synchronization" value="kNoSynchronization"/>
|
|
<setting name="usage" value="kData"/>
|
|
<setting name="max_packet_size_fs" value="k64"/>
|
|
<setting name="polling_interval_fs" value="0"/>
|
|
<setting name="max_packet_size_hs" value="k512"/>
|
|
<setting name="polling_interval_hs" value="0"/>
|
|
<setting name="bRefresh" value="0"/>
|
|
<setting name="bSynchAddress" value="NoSynchronization"/>
|
|
</struct>
|
|
</array>
|
|
</struct>
|
|
</array>
|
|
</struct>
|
|
</struct>
|
|
<struct name="4">
|
|
<setting name="interface_class" value="kClassCic"/>
|
|
<struct name="setting_cic" quick_selection="QS_INTERFACE_CIC_VCOM">
|
|
<setting name="interface_name" value="CIC VCOM"/>
|
|
<setting name="subclass" value="kSubclassAcm"/>
|
|
<setting name="protocol" value="kProtocolNone"/>
|
|
<setting name="implementation" value="kImplementationCicVcom"/>
|
|
<array name="endpoints_settings">
|
|
<struct name="0">
|
|
<setting name="setting_name" value="Default"/>
|
|
<array name="endpoints">
|
|
<struct name="0">
|
|
<setting name="direction" value="kIn"/>
|
|
<setting name="transfer_type" value="kInterrupt"/>
|
|
<setting name="synchronization" value="kNoSynchronization"/>
|
|
<setting name="usage" value="kData"/>
|
|
<setting name="max_packet_size_fs" value="k16"/>
|
|
<setting name="polling_interval_fs" value="8"/>
|
|
<setting name="max_packet_size_hs" value="k16"/>
|
|
<setting name="polling_interval_hs" value="7"/>
|
|
<setting name="bRefresh" value="0"/>
|
|
<setting name="bSynchAddress" value="NoSynchronization"/>
|
|
</struct>
|
|
</array>
|
|
</struct>
|
|
</array>
|
|
<setting name="data_interface_count" value="1"/>
|
|
</struct>
|
|
</struct>
|
|
<struct name="5">
|
|
<setting name="interface_class" value="kClassDic"/>
|
|
<struct name="setting_dic" quick_selection="QS_INTERFACE_DIC_VCOM">
|
|
<setting name="interface_name" value="DIC VCOM"/>
|
|
<setting name="subclass" value="kSubclassNone"/>
|
|
<setting name="protocol" value="kProtocolNone"/>
|
|
<setting name="implementation" value="kImplementationDicVcom"/>
|
|
<array name="endpoints_settings">
|
|
<struct name="0">
|
|
<setting name="setting_name" value="Default"/>
|
|
<array name="endpoints">
|
|
<struct name="0">
|
|
<setting name="direction" value="kIn"/>
|
|
<setting name="transfer_type" value="kBulk"/>
|
|
<setting name="synchronization" value="kNoSynchronization"/>
|
|
<setting name="usage" value="kData"/>
|
|
<setting name="max_packet_size_fs" value="k64"/>
|
|
<setting name="polling_interval_fs" value="0"/>
|
|
<setting name="max_packet_size_hs" value="k512"/>
|
|
<setting name="polling_interval_hs" value="0"/>
|
|
<setting name="bRefresh" value="0"/>
|
|
<setting name="bSynchAddress" value="NoSynchronization"/>
|
|
</struct>
|
|
<struct name="1">
|
|
<setting name="direction" value="kOut"/>
|
|
<setting name="transfer_type" value="kBulk"/>
|
|
<setting name="synchronization" value="kNoSynchronization"/>
|
|
<setting name="usage" value="kData"/>
|
|
<setting name="max_packet_size_fs" value="k64"/>
|
|
<setting name="polling_interval_fs" value="0"/>
|
|
<setting name="max_packet_size_hs" value="k512"/>
|
|
<setting name="polling_interval_hs" value="0"/>
|
|
<setting name="bRefresh" value="0"/>
|
|
<setting name="bSynchAddress" value="NoSynchronization"/>
|
|
</struct>
|
|
</array>
|
|
</struct>
|
|
</array>
|
|
</struct>
|
|
</struct>
|
|
</array>
|
|
</config_set>
|
|
</instance>
|
|
</instances>
|
|
</functional_group>
|
|
</functional_groups>
|
|
<components>
|
|
<component name="system" uuid="d0c932a2-af11-45c8-9068-578113d4458f" type_id="system_54b53072540eeeb8f8e9343e71f28176">
|
|
<config_set_global name="global_system_definitions">
|
|
<setting name="user_definitions" value=""/>
|
|
<setting name="user_includes" value=""/>
|
|
</config_set_global>
|
|
</component>
|
|
<component name="generic_can" uuid="862cba3d-7291-44a1-b043-976f28f34ecb" type_id="generic_can_1bfdd78b1af214566c1f23cf6a582d80">
|
|
<config_set_global name="global_can"/>
|
|
</component>
|
|
<component name="generic_uart" uuid="fd9515f5-187d-4f7c-a70a-640edf702e14" type_id="generic_uart_8cae00565451cf2346eb1b8c624e73a6">
|
|
<config_set_global name="global_uart"/>
|
|
</component>
|
|
<component name="msg" uuid="633fcfb6-aa60-45c6-8f93-5d59ee2d261e" type_id="msg_6e2baaf3b97dbeef01c0043275f9a0e7">
|
|
<config_set_global name="global_messages"/>
|
|
</component>
|
|
</components>
|
|
</periphs>
|
|
<tee name="TEE" version="3.0" enabled="false" update_project_code="true">
|
|
<generated_project_files/>
|
|
<tee_profile>
|
|
<processor_version>N/A</processor_version>
|
|
</tee_profile>
|
|
<global_options/>
|
|
<user_memory_regions/>
|
|
</tee>
|
|
</tools>
|
|
</configuration> |