631 lines
19 KiB
C
631 lines
19 KiB
C
/* USER CODE BEGIN Header */
|
|
/**
|
|
******************************************************************************
|
|
* @file : main.c
|
|
* @brief : Main program body
|
|
******************************************************************************
|
|
* @attention
|
|
*
|
|
* <h2><center>© Copyright (c) 2021 STMicroelectronics.
|
|
* All rights reserved.</center></h2>
|
|
*
|
|
* This software component is licensed by ST under BSD 3-Clause license,
|
|
* the "License"; You may not use this file except in compliance with the
|
|
* License. You may obtain a copy of the License at:
|
|
* opensource.org/licenses/BSD-3-Clause
|
|
*
|
|
******************************************************************************
|
|
*/
|
|
/* USER CODE END Header */
|
|
/* Includes ------------------------------------------------------------------*/
|
|
#include "main.h"
|
|
#include "cmsis_os.h"
|
|
|
|
/* Private includes ----------------------------------------------------------*/
|
|
/* USER CODE BEGIN Includes */
|
|
|
|
#include "printf.h"
|
|
#include "user_power_mgmt.h"
|
|
#include "SEGGER_SYSVIEW.h"
|
|
|
|
#include "arm_etm.h"
|
|
|
|
/* USER CODE END Includes */
|
|
|
|
/* Private typedef -----------------------------------------------------------*/
|
|
/* USER CODE BEGIN PTD */
|
|
|
|
/* USER CODE END PTD */
|
|
|
|
/* Private define ------------------------------------------------------------*/
|
|
/* USER CODE BEGIN PD */
|
|
/* USER CODE END PD */
|
|
|
|
/* Private macro -------------------------------------------------------------*/
|
|
/* USER CODE BEGIN PM */
|
|
|
|
/* USER CODE END PM */
|
|
|
|
/* Private variables ---------------------------------------------------------*/
|
|
RTC_HandleTypeDef hrtc;
|
|
|
|
TIM_HandleTypeDef htim4;
|
|
|
|
UART_HandleTypeDef huart1;
|
|
|
|
SRAM_HandleTypeDef hsram1;
|
|
|
|
/* Definitions for defaultTask */
|
|
osThreadId_t defaultTaskHandle;
|
|
const osThreadAttr_t defaultTask_attributes = {
|
|
.name = "defaultTask",
|
|
.stack_size = 128 * 4,
|
|
.priority = (osPriority_t) osPriorityNormal,
|
|
};
|
|
/* USER CODE BEGIN PV */
|
|
|
|
static uint8_t ucHeap[configTOTAL_HEAP_SIZE];
|
|
|
|
static const HeapRegion_t xHeapRegions[] = {
|
|
{ (uint8_t *)ucHeap, configTOTAL_HEAP_SIZE }, // Internal SRAM
|
|
{ (uint8_t *)0x68000000UL, 0x100000 }, // External SRAM 1MB on FSMC Bank 1 NE 3
|
|
{ NULL, 0 } // Terminates the array.
|
|
};
|
|
|
|
/* USER CODE END PV */
|
|
|
|
/* Private function prototypes -----------------------------------------------*/
|
|
void SystemClock_Config(void);
|
|
static void MX_GPIO_Init(void);
|
|
static void MX_RTC_Init(void);
|
|
static void MX_USART1_UART_Init(void);
|
|
static void MX_FSMC_Init(void);
|
|
static void MX_TIM4_Init(void);
|
|
void StartDefaultTask(void *argument);
|
|
|
|
/* USER CODE BEGIN PFP */
|
|
|
|
/* USER CODE END PFP */
|
|
|
|
/* Private user code ---------------------------------------------------------*/
|
|
/* USER CODE BEGIN 0 */
|
|
|
|
static void configure_etm_trace(void) {
|
|
DBGMCU->CR |= DBGMCU_CR_TRACE_IOEN; // Enable IO trace pins
|
|
|
|
if (!(DBGMCU->CR & DBGMCU_CR_TRACE_IOEN))
|
|
{
|
|
// Some (all?) STM32s don't allow writes to DBGMCU register until
|
|
// C_DEBUGEN in CoreDebug->DHCSR is set. This cannot be set by the
|
|
// CPU itself, so in practice you need to connect to the CPU with
|
|
// a debugger once before resetting it.
|
|
return;
|
|
}
|
|
|
|
/* Configure Trace Port Interface Unit */
|
|
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; // Enable access to registers
|
|
TPI->ACPR = 0; // Trace clock = HCLK/(x+1) = 8MHz = UART 's baudrate
|
|
// The HCLK of F105 is 8MHz so x is 0, and the F103 is 72MHz so x is 8
|
|
TPI->SPPR = 2; // Pin protocol = NRZ/USART
|
|
TPI->FFCR = 0x102; // TPIU packet framing enabled when bit 2 is set.
|
|
// You can use 0x100 if you only need DWT/ITM and not ETM.
|
|
|
|
/* Configure PC sampling and exception trace */
|
|
DWT->CTRL = (0 << DWT_CTRL_CYCTAP_Pos) // Prescaler for PC sampling
|
|
// 0 = x32, 1 = x512
|
|
| (0 << DWT_CTRL_POSTPRESET_Pos) // Postscaler for PC sampling
|
|
// Divider = value + 1
|
|
| (1 << DWT_CTRL_PCSAMPLENA_Pos) // Enable PC sampling
|
|
| (1 << DWT_CTRL_SYNCTAP_Pos) // Sync packet interval
|
|
// 0 = Off, 1 = Every 2^23 cycles,
|
|
// 2 = Every 2^25, 3 = Every 2^27
|
|
| (1 << DWT_CTRL_EXCTRCENA_Pos) // Enable exception trace
|
|
| (1 << DWT_CTRL_CYCCNTENA_Pos); // Enable cycle counter
|
|
|
|
/* Configure instrumentation trace macroblock */
|
|
ITM->LAR = 0xC5ACCE55;
|
|
ITM->TCR = (1 << ITM_TCR_TraceBusID_Pos) // Trace bus ID for TPIU
|
|
| (1 << ITM_TCR_DWTENA_Pos) // Enable events from DWT
|
|
| (1 << ITM_TCR_SYNCENA_Pos) // Enable sync packets
|
|
| (1 << ITM_TCR_ITMENA_Pos); // Main enable for ITM
|
|
ITM->TER = 0xFFFFFFFF; // Enable all stimulus ports
|
|
|
|
/* Configure embedded trace macroblock */
|
|
ETM->LAR = 0xC5ACCE55;
|
|
ETM_SetupMode();
|
|
ETM->CR = ETM_CR_ETMEN // Enable ETM output port
|
|
| ETM_CR_STALL_PROCESSOR // Stall processor when fifo is full
|
|
| ETM_CR_BRANCH_OUTPUT; // Report all branches
|
|
// | ETM_CR_PORTSIZE_8BIT; // Add this code in F103 to set port_size 21, 6, 5, 4 as 0, 0, 0, 1 for 8Bit.
|
|
ETM->TRACEIDR = 2; // Trace bus ID for TPIU
|
|
ETM->TECR1 = ETM_TECR1_EXCLUDE; // Trace always enabled
|
|
ETM->FFRR = ETM_FFRR_EXCLUDE; // Stalling always enabled
|
|
ETM->FFLR = 24; // Stall when less than N bytes free in FIFO (range 1..24)
|
|
// Larger values mean less latency in trace, but more stalls.
|
|
// ETM->TRIGGER = 0x0000406F; // Add this code in F103 to define the trigger event
|
|
// ETM->TEEVR = 0x0000006F; // Add this code in F103 to define an event to start/stop
|
|
// Note: we do not enable ETM trace yet, only for specific parts of code.
|
|
|
|
ETM_TraceMode();
|
|
}
|
|
|
|
/* USER CODE END 0 */
|
|
|
|
/**
|
|
* @brief The application entry point.
|
|
* @retval int
|
|
*/
|
|
int main(void)
|
|
{
|
|
/* USER CODE BEGIN 1 */
|
|
|
|
configure_etm_trace();
|
|
|
|
/* USER CODE END 1 */
|
|
|
|
/* MCU Configuration--------------------------------------------------------*/
|
|
|
|
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
|
|
HAL_Init();
|
|
|
|
/* USER CODE BEGIN Init */
|
|
|
|
/* USER CODE END Init */
|
|
|
|
/* Configure the system clock */
|
|
SystemClock_Config();
|
|
|
|
/* USER CODE BEGIN SysInit */
|
|
|
|
/* USER CODE END SysInit */
|
|
|
|
/* Initialize all configured peripherals */
|
|
MX_GPIO_Init();
|
|
MX_RTC_Init();
|
|
MX_USART1_UART_Init();
|
|
MX_FSMC_Init();
|
|
MX_TIM4_Init();
|
|
/* USER CODE BEGIN 2 */
|
|
|
|
// Define heap region for heap_5.
|
|
vPortDefineHeapRegions(xHeapRegions);
|
|
|
|
SEGGER_SYSVIEW_Conf();
|
|
|
|
/* USER CODE END 2 */
|
|
|
|
/* Init scheduler */
|
|
osKernelInitialize();
|
|
|
|
/* USER CODE BEGIN RTOS_MUTEX */
|
|
/* add mutexes, ... */
|
|
/* USER CODE END RTOS_MUTEX */
|
|
|
|
/* USER CODE BEGIN RTOS_SEMAPHORES */
|
|
/* add semaphores, ... */
|
|
/* USER CODE END RTOS_SEMAPHORES */
|
|
|
|
/* USER CODE BEGIN RTOS_TIMERS */
|
|
/* start timers, add new ones, ... */
|
|
/* USER CODE END RTOS_TIMERS */
|
|
|
|
/* USER CODE BEGIN RTOS_QUEUES */
|
|
/* add queues, ... */
|
|
/* USER CODE END RTOS_QUEUES */
|
|
|
|
/* Create the thread(s) */
|
|
/* creation of defaultTask */
|
|
defaultTaskHandle = osThreadNew(StartDefaultTask, NULL, &defaultTask_attributes);
|
|
|
|
/* USER CODE BEGIN RTOS_THREADS */
|
|
/* add threads, ... */
|
|
/* USER CODE END RTOS_THREADS */
|
|
|
|
/* USER CODE BEGIN RTOS_EVENTS */
|
|
/* add events, ... */
|
|
/* USER CODE END RTOS_EVENTS */
|
|
|
|
/* Start scheduler */
|
|
osKernelStart();
|
|
|
|
/* We should never get here as control is now taken by the scheduler */
|
|
/* Infinite loop */
|
|
/* USER CODE BEGIN WHILE */
|
|
while (1)
|
|
{
|
|
/* USER CODE END WHILE */
|
|
|
|
/* USER CODE BEGIN 3 */
|
|
}
|
|
/* USER CODE END 3 */
|
|
}
|
|
|
|
/**
|
|
* @brief System Clock Configuration
|
|
* @retval None
|
|
*/
|
|
void SystemClock_Config(void)
|
|
{
|
|
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
|
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
|
|
|
/** Configure the main internal regulator output voltage
|
|
*/
|
|
__HAL_RCC_PWR_CLK_ENABLE();
|
|
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
|
|
/** Initializes the RCC Oscillators according to the specified parameters
|
|
* in the RCC_OscInitTypeDef structure.
|
|
*/
|
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE;
|
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
|
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
|
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
|
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
|
{
|
|
Error_Handler();
|
|
}
|
|
/** Initializes the CPU, AHB and APB buses clocks
|
|
*/
|
|
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
|
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
|
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE;
|
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
|
|
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
|
|
|
|
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
|
|
{
|
|
Error_Handler();
|
|
}
|
|
/** Enables the Clock Security System
|
|
*/
|
|
HAL_RCC_EnableCSS();
|
|
}
|
|
|
|
/**
|
|
* @brief RTC Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_RTC_Init(void)
|
|
{
|
|
|
|
/* USER CODE BEGIN RTC_Init 0 */
|
|
|
|
/* USER CODE END RTC_Init 0 */
|
|
|
|
RTC_TimeTypeDef sTime = {0};
|
|
RTC_DateTypeDef sDate = {0};
|
|
|
|
/* USER CODE BEGIN RTC_Init 1 */
|
|
|
|
/* USER CODE END RTC_Init 1 */
|
|
/** Initialize RTC Only
|
|
*/
|
|
hrtc.Instance = RTC;
|
|
hrtc.Init.HourFormat = RTC_HOURFORMAT_24;
|
|
hrtc.Init.AsynchPrediv = 127;
|
|
hrtc.Init.SynchPrediv = 255;
|
|
hrtc.Init.OutPut = RTC_OUTPUT_DISABLE;
|
|
hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
|
|
hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
|
|
if (HAL_RTC_Init(&hrtc) != HAL_OK)
|
|
{
|
|
Error_Handler();
|
|
}
|
|
|
|
/* USER CODE BEGIN Check_RTC_BKUP */
|
|
|
|
/* USER CODE END Check_RTC_BKUP */
|
|
|
|
/** Initialize RTC and set the Time and Date
|
|
*/
|
|
sTime.Hours = 0;
|
|
sTime.Minutes = 0;
|
|
sTime.Seconds = 0;
|
|
sTime.DayLightSaving = RTC_DAYLIGHTSAVING_NONE;
|
|
sTime.StoreOperation = RTC_STOREOPERATION_RESET;
|
|
if (HAL_RTC_SetTime(&hrtc, &sTime, RTC_FORMAT_BIN) != HAL_OK)
|
|
{
|
|
Error_Handler();
|
|
}
|
|
sDate.WeekDay = RTC_WEEKDAY_MONDAY;
|
|
sDate.Month = RTC_MONTH_JANUARY;
|
|
sDate.Date = 1;
|
|
sDate.Year = 0;
|
|
|
|
if (HAL_RTC_SetDate(&hrtc, &sDate, RTC_FORMAT_BIN) != HAL_OK)
|
|
{
|
|
Error_Handler();
|
|
}
|
|
/* USER CODE BEGIN RTC_Init 2 */
|
|
|
|
/* USER CODE END RTC_Init 2 */
|
|
|
|
}
|
|
|
|
/**
|
|
* @brief TIM4 Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_TIM4_Init(void)
|
|
{
|
|
|
|
/* USER CODE BEGIN TIM4_Init 0 */
|
|
|
|
/* USER CODE END TIM4_Init 0 */
|
|
|
|
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
|
|
TIM_MasterConfigTypeDef sMasterConfig = {0};
|
|
|
|
/* USER CODE BEGIN TIM4_Init 1 */
|
|
|
|
/* USER CODE END TIM4_Init 1 */
|
|
htim4.Instance = TIM4;
|
|
htim4.Init.Prescaler = 8000-1;
|
|
htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
|
|
htim4.Init.Period = 5000;
|
|
htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
|
htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
|
if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
|
|
{
|
|
Error_Handler();
|
|
}
|
|
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
|
|
if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
|
|
{
|
|
Error_Handler();
|
|
}
|
|
if (HAL_TIM_OnePulse_Init(&htim4, TIM_OPMODE_SINGLE) != HAL_OK)
|
|
{
|
|
Error_Handler();
|
|
}
|
|
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
|
|
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
|
if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
|
|
{
|
|
Error_Handler();
|
|
}
|
|
/* USER CODE BEGIN TIM4_Init 2 */
|
|
|
|
/* USER CODE END TIM4_Init 2 */
|
|
|
|
}
|
|
|
|
/**
|
|
* @brief USART1 Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_USART1_UART_Init(void)
|
|
{
|
|
|
|
/* USER CODE BEGIN USART1_Init 0 */
|
|
|
|
/* USER CODE END USART1_Init 0 */
|
|
|
|
/* USER CODE BEGIN USART1_Init 1 */
|
|
|
|
/* USER CODE END USART1_Init 1 */
|
|
huart1.Instance = USART1;
|
|
huart1.Init.BaudRate = 115200;
|
|
huart1.Init.WordLength = UART_WORDLENGTH_8B;
|
|
huart1.Init.StopBits = UART_STOPBITS_1;
|
|
huart1.Init.Parity = UART_PARITY_NONE;
|
|
huart1.Init.Mode = UART_MODE_TX_RX;
|
|
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
|
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
|
|
if (HAL_UART_Init(&huart1) != HAL_OK)
|
|
{
|
|
Error_Handler();
|
|
}
|
|
/* USER CODE BEGIN USART1_Init 2 */
|
|
|
|
/* USER CODE END USART1_Init 2 */
|
|
|
|
}
|
|
|
|
/**
|
|
* @brief GPIO Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_GPIO_Init(void)
|
|
{
|
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
|
|
/* GPIO Ports Clock Enable */
|
|
__HAL_RCC_GPIOC_CLK_ENABLE();
|
|
__HAL_RCC_GPIOF_CLK_ENABLE();
|
|
__HAL_RCC_GPIOH_CLK_ENABLE();
|
|
__HAL_RCC_GPIOG_CLK_ENABLE();
|
|
__HAL_RCC_GPIOE_CLK_ENABLE();
|
|
__HAL_RCC_GPIOD_CLK_ENABLE();
|
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
|
|
|
/*Configure GPIO pin Output Level */
|
|
HAL_GPIO_WritePin(GPIOF, GPIO_PIN_8|LED1_Pin, GPIO_PIN_SET);
|
|
|
|
/*Configure GPIO pin Output Level */
|
|
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET);
|
|
|
|
/*Configure GPIO pins : PF8 LED1_Pin LED2_Pin */
|
|
GPIO_InitStruct.Pin = GPIO_PIN_8|LED1_Pin|LED2_Pin;
|
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
|
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
|
|
|
|
}
|
|
|
|
/* FSMC initialization function */
|
|
static void MX_FSMC_Init(void)
|
|
{
|
|
|
|
/* USER CODE BEGIN FSMC_Init 0 */
|
|
|
|
/* USER CODE END FSMC_Init 0 */
|
|
|
|
FSMC_NORSRAM_TimingTypeDef Timing = {0};
|
|
|
|
/* USER CODE BEGIN FSMC_Init 1 */
|
|
|
|
/* USER CODE END FSMC_Init 1 */
|
|
|
|
/** Perform the SRAM1 memory initialization sequence
|
|
*/
|
|
hsram1.Instance = FSMC_NORSRAM_DEVICE;
|
|
hsram1.Extended = FSMC_NORSRAM_EXTENDED_DEVICE;
|
|
/* hsram1.Init */
|
|
hsram1.Init.NSBank = FSMC_NORSRAM_BANK3;
|
|
hsram1.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE;
|
|
hsram1.Init.MemoryType = FSMC_MEMORY_TYPE_SRAM;
|
|
hsram1.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_16;
|
|
hsram1.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_DISABLE;
|
|
hsram1.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW;
|
|
hsram1.Init.WrapMode = FSMC_WRAP_MODE_DISABLE;
|
|
hsram1.Init.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS;
|
|
hsram1.Init.WriteOperation = FSMC_WRITE_OPERATION_ENABLE;
|
|
hsram1.Init.WaitSignal = FSMC_WAIT_SIGNAL_DISABLE;
|
|
hsram1.Init.ExtendedMode = FSMC_EXTENDED_MODE_DISABLE;
|
|
hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
|
|
hsram1.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE;
|
|
hsram1.Init.PageSize = FSMC_PAGE_SIZE_NONE;
|
|
/* Timing */
|
|
Timing.AddressSetupTime = 2;
|
|
Timing.AddressHoldTime = 15;
|
|
Timing.DataSetupTime = 10;
|
|
Timing.BusTurnAroundDuration = 2;
|
|
Timing.CLKDivision = 16;
|
|
Timing.DataLatency = 17;
|
|
Timing.AccessMode = FSMC_ACCESS_MODE_A;
|
|
/* ExtTiming */
|
|
|
|
if (HAL_SRAM_Init(&hsram1, &Timing, NULL) != HAL_OK)
|
|
{
|
|
Error_Handler( );
|
|
}
|
|
|
|
/* USER CODE BEGIN FSMC_Init 2 */
|
|
|
|
/* USER CODE END FSMC_Init 2 */
|
|
}
|
|
|
|
/* USER CODE BEGIN 4 */
|
|
|
|
void _putchar(char character) {
|
|
HAL_UART_Transmit(&huart1, (uint8_t *)&character, 1, 1000);
|
|
}
|
|
|
|
void user_pm_frequency_update_callback(void) {
|
|
// STM32Cube relies on the systick timer for FreeRTOS tick, update anyway.
|
|
// A timing jitter may occur.
|
|
SysTick_Config(configCPU_CLOCK_HZ / configTICK_RATE_HZ);
|
|
|
|
// Other peripherals also needs to be updated.
|
|
HAL_UART_Init(&huart1);
|
|
}
|
|
|
|
static void update_frequency_profile(user_pm_vfs_preset_t profile) {
|
|
|
|
// Do not switch my context out.
|
|
taskENTER_CRITICAL();
|
|
|
|
// Scale frequency.
|
|
user_pm_scale_vfs(profile);
|
|
|
|
taskEXIT_CRITICAL();
|
|
}
|
|
|
|
static void report_system_frequencies(void) {
|
|
printf("======== Report System Clock Frequencies ========\r\n");
|
|
printf("[%012u] SYSCLK: %uMHz\t", xTaskGetTickCount(), HAL_RCC_GetSysClockFreq() / 1000000);
|
|
printf("HCLK: %uMHz\t", HAL_RCC_GetHCLKFreq() / 1000000);
|
|
printf("PCLK1: %uMHz\t", HAL_RCC_GetPCLK1Freq() / 1000000);
|
|
printf("PCLK2: %uMHz\r\n", HAL_RCC_GetPCLK2Freq() / 1000000);
|
|
printf("================== Report Done ==================\r\n");
|
|
}
|
|
|
|
/* USER CODE END 4 */
|
|
|
|
/* USER CODE BEGIN Header_StartDefaultTask */
|
|
/**
|
|
* @brief Function implementing the defaultTask thread.
|
|
* @param argument: Not used
|
|
* @retval None
|
|
*/
|
|
/* USER CODE END Header_StartDefaultTask */
|
|
void StartDefaultTask(void *argument)
|
|
{
|
|
/* USER CODE BEGIN 5 */
|
|
|
|
HeapStats_t stats;
|
|
vPortGetHeapStats(&stats);
|
|
printf("Heap available: %d bytes.\r\n", stats.xAvailableHeapSpaceInBytes);
|
|
|
|
/* Infinite loop */
|
|
for(;;)
|
|
{
|
|
report_system_frequencies();
|
|
osDelay(1000);
|
|
}
|
|
/* USER CODE END 5 */
|
|
}
|
|
|
|
/**
|
|
* @brief Period elapsed callback in non blocking mode
|
|
* @note This function is called when TIM6 interrupt took place, inside
|
|
* HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
|
|
* a global variable "uwTick" used as application time base.
|
|
* @param htim : TIM handle
|
|
* @retval None
|
|
*/
|
|
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
|
|
{
|
|
/* USER CODE BEGIN Callback 0 */
|
|
|
|
/* USER CODE END Callback 0 */
|
|
if (htim->Instance == TIM6) {
|
|
HAL_IncTick();
|
|
}
|
|
/* USER CODE BEGIN Callback 1 */
|
|
|
|
/* USER CODE END Callback 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function is executed in case of error occurrence.
|
|
* @retval None
|
|
*/
|
|
void Error_Handler(void)
|
|
{
|
|
/* USER CODE BEGIN Error_Handler_Debug */
|
|
/* User can add his own implementation to report the HAL error return state */
|
|
__disable_irq();
|
|
while (1)
|
|
{
|
|
}
|
|
/* USER CODE END Error_Handler_Debug */
|
|
}
|
|
|
|
#ifdef USE_FULL_ASSERT
|
|
/**
|
|
* @brief Reports the name of the source file and the source line number
|
|
* where the assert_param error has occurred.
|
|
* @param file: pointer to the source file name
|
|
* @param line: assert_param error line source number
|
|
* @retval None
|
|
*/
|
|
void assert_failed(uint8_t *file, uint32_t line)
|
|
{
|
|
/* USER CODE BEGIN 6 */
|
|
/* User can add his own implementation to report the file name and line number,
|
|
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
|
|
/* USER CODE END 6 */
|
|
}
|
|
#endif /* USE_FULL_ASSERT */
|
|
|
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|