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STM32H750VB_Bootloader/build/printf.lst

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ARM GAS /tmp/ccibzHy5.s page 1
1 .cpu cortex-m7
2 .eabi_attribute 28, 1
3 .eabi_attribute 20, 1
4 .eabi_attribute 21, 1
5 .eabi_attribute 23, 3
6 .eabi_attribute 24, 1
7 .eabi_attribute 25, 1
8 .eabi_attribute 26, 1
9 .eabi_attribute 30, 1
10 .eabi_attribute 34, 1
11 .eabi_attribute 18, 4
12 .file "printf.c"
13 .text
14 .Ltext0:
15 .cfi_sections .debug_frame
16 .section .text._out_buffer,"ax",%progbits
17 .align 1
18 .arch armv7e-m
19 .syntax unified
20 .thumb
21 .thumb_func
22 .fpu fpv5-d16
24 _out_buffer:
25 .LVL0:
26 .LFB0:
27 .file 1 "Core/Src/printf.c"
1:Core/Src/printf.c **** ///////////////////////////////////////////////////////////////////////////////
2:Core/Src/printf.c **** // \author (c) Marco Paland (info@paland.com)
3:Core/Src/printf.c **** // 2014-2019, PALANDesign Hannover, Germany
4:Core/Src/printf.c **** //
5:Core/Src/printf.c **** // \license The MIT License (MIT)
6:Core/Src/printf.c **** //
7:Core/Src/printf.c **** // Permission is hereby granted, free of charge, to any person obtaining a copy
8:Core/Src/printf.c **** // of this software and associated documentation files (the "Software"), to deal
9:Core/Src/printf.c **** // in the Software without restriction, including without limitation the rights
10:Core/Src/printf.c **** // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11:Core/Src/printf.c **** // copies of the Software, and to permit persons to whom the Software is
12:Core/Src/printf.c **** // furnished to do so, subject to the following conditions:
13:Core/Src/printf.c **** //
14:Core/Src/printf.c **** // The above copyright notice and this permission notice shall be included in
15:Core/Src/printf.c **** // all copies or substantial portions of the Software.
16:Core/Src/printf.c **** //
17:Core/Src/printf.c **** // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18:Core/Src/printf.c **** // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19:Core/Src/printf.c **** // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
20:Core/Src/printf.c **** // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21:Core/Src/printf.c **** // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22:Core/Src/printf.c **** // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23:Core/Src/printf.c **** // THE SOFTWARE.
24:Core/Src/printf.c **** //
25:Core/Src/printf.c **** // \brief Tiny printf, sprintf and (v)snprintf implementation, optimized for speed on
26:Core/Src/printf.c **** // embedded systems with a very limited resources. These routines are thread
27:Core/Src/printf.c **** // safe and reentrant!
28:Core/Src/printf.c **** // Use this instead of the bloated standard/newlib printf cause these use
29:Core/Src/printf.c **** // malloc for printf (and may not be thread safe).
30:Core/Src/printf.c **** //
31:Core/Src/printf.c **** ///////////////////////////////////////////////////////////////////////////////
ARM GAS /tmp/ccibzHy5.s page 2
32:Core/Src/printf.c ****
33:Core/Src/printf.c **** #include <stdbool.h>
34:Core/Src/printf.c **** #include <stdint.h>
35:Core/Src/printf.c ****
36:Core/Src/printf.c **** #include "printf.h"
37:Core/Src/printf.c ****
38:Core/Src/printf.c ****
39:Core/Src/printf.c **** // define this globally (e.g. gcc -DPRINTF_INCLUDE_CONFIG_H ...) to include the
40:Core/Src/printf.c **** // printf_config.h header file
41:Core/Src/printf.c **** // default: undefined
42:Core/Src/printf.c **** #ifdef PRINTF_INCLUDE_CONFIG_H
43:Core/Src/printf.c **** #include "printf_config.h"
44:Core/Src/printf.c **** #endif
45:Core/Src/printf.c ****
46:Core/Src/printf.c ****
47:Core/Src/printf.c **** // 'ntoa' conversion buffer size, this must be big enough to hold one converted
48:Core/Src/printf.c **** // numeric number including padded zeros (dynamically created on stack)
49:Core/Src/printf.c **** // default: 32 byte
50:Core/Src/printf.c **** #ifndef PRINTF_NTOA_BUFFER_SIZE
51:Core/Src/printf.c **** #define PRINTF_NTOA_BUFFER_SIZE 32U
52:Core/Src/printf.c **** #endif
53:Core/Src/printf.c ****
54:Core/Src/printf.c **** // 'ftoa' conversion buffer size, this must be big enough to hold one converted
55:Core/Src/printf.c **** // float number including padded zeros (dynamically created on stack)
56:Core/Src/printf.c **** // default: 32 byte
57:Core/Src/printf.c **** #ifndef PRINTF_FTOA_BUFFER_SIZE
58:Core/Src/printf.c **** #define PRINTF_FTOA_BUFFER_SIZE 32U
59:Core/Src/printf.c **** #endif
60:Core/Src/printf.c ****
61:Core/Src/printf.c **** // support for the floating point type (%f)
62:Core/Src/printf.c **** // default: activated
63:Core/Src/printf.c **** #ifndef PRINTF_DISABLE_SUPPORT_FLOAT
64:Core/Src/printf.c **** #define PRINTF_SUPPORT_FLOAT
65:Core/Src/printf.c **** #endif
66:Core/Src/printf.c ****
67:Core/Src/printf.c **** // support for exponential floating point notation (%e/%g)
68:Core/Src/printf.c **** // default: activated
69:Core/Src/printf.c **** #ifndef PRINTF_DISABLE_SUPPORT_EXPONENTIAL
70:Core/Src/printf.c **** #define PRINTF_SUPPORT_EXPONENTIAL
71:Core/Src/printf.c **** #endif
72:Core/Src/printf.c ****
73:Core/Src/printf.c **** // define the default floating point precision
74:Core/Src/printf.c **** // default: 6 digits
75:Core/Src/printf.c **** #ifndef PRINTF_DEFAULT_FLOAT_PRECISION
76:Core/Src/printf.c **** #define PRINTF_DEFAULT_FLOAT_PRECISION 6U
77:Core/Src/printf.c **** #endif
78:Core/Src/printf.c ****
79:Core/Src/printf.c **** // define the largest float suitable to print with %f
80:Core/Src/printf.c **** // default: 1e9
81:Core/Src/printf.c **** #ifndef PRINTF_MAX_FLOAT
82:Core/Src/printf.c **** #define PRINTF_MAX_FLOAT 1e9
83:Core/Src/printf.c **** #endif
84:Core/Src/printf.c ****
85:Core/Src/printf.c **** // support for the long long types (%llu or %p)
86:Core/Src/printf.c **** // default: activated
87:Core/Src/printf.c **** #ifndef PRINTF_DISABLE_SUPPORT_LONG_LONG
88:Core/Src/printf.c **** #define PRINTF_SUPPORT_LONG_LONG
ARM GAS /tmp/ccibzHy5.s page 3
89:Core/Src/printf.c **** #endif
90:Core/Src/printf.c ****
91:Core/Src/printf.c **** // support for the ptrdiff_t type (%t)
92:Core/Src/printf.c **** // ptrdiff_t is normally defined in <stddef.h> as long or long long type
93:Core/Src/printf.c **** // default: activated
94:Core/Src/printf.c **** #ifndef PRINTF_DISABLE_SUPPORT_PTRDIFF_T
95:Core/Src/printf.c **** #define PRINTF_SUPPORT_PTRDIFF_T
96:Core/Src/printf.c **** #endif
97:Core/Src/printf.c ****
98:Core/Src/printf.c **** ///////////////////////////////////////////////////////////////////////////////
99:Core/Src/printf.c ****
100:Core/Src/printf.c **** // internal flag definitions
101:Core/Src/printf.c **** #define FLAGS_ZEROPAD (1U << 0U)
102:Core/Src/printf.c **** #define FLAGS_LEFT (1U << 1U)
103:Core/Src/printf.c **** #define FLAGS_PLUS (1U << 2U)
104:Core/Src/printf.c **** #define FLAGS_SPACE (1U << 3U)
105:Core/Src/printf.c **** #define FLAGS_HASH (1U << 4U)
106:Core/Src/printf.c **** #define FLAGS_UPPERCASE (1U << 5U)
107:Core/Src/printf.c **** #define FLAGS_CHAR (1U << 6U)
108:Core/Src/printf.c **** #define FLAGS_SHORT (1U << 7U)
109:Core/Src/printf.c **** #define FLAGS_LONG (1U << 8U)
110:Core/Src/printf.c **** #define FLAGS_LONG_LONG (1U << 9U)
111:Core/Src/printf.c **** #define FLAGS_PRECISION (1U << 10U)
112:Core/Src/printf.c **** #define FLAGS_ADAPT_EXP (1U << 11U)
113:Core/Src/printf.c ****
114:Core/Src/printf.c ****
115:Core/Src/printf.c **** // import float.h for DBL_MAX
116:Core/Src/printf.c **** #if defined(PRINTF_SUPPORT_FLOAT)
117:Core/Src/printf.c **** #include <float.h>
118:Core/Src/printf.c **** #endif
119:Core/Src/printf.c ****
120:Core/Src/printf.c ****
121:Core/Src/printf.c **** // output function type
122:Core/Src/printf.c **** typedef void (*out_fct_type)(char character, void* buffer, size_t idx, size_t maxlen);
123:Core/Src/printf.c ****
124:Core/Src/printf.c ****
125:Core/Src/printf.c **** // wrapper (used as buffer) for output function type
126:Core/Src/printf.c **** typedef struct {
127:Core/Src/printf.c **** void (*fct)(char character, void* arg);
128:Core/Src/printf.c **** void* arg;
129:Core/Src/printf.c **** } out_fct_wrap_type;
130:Core/Src/printf.c ****
131:Core/Src/printf.c ****
132:Core/Src/printf.c **** // internal buffer output
133:Core/Src/printf.c **** static inline void _out_buffer(char character, void* buffer, size_t idx, size_t maxlen)
134:Core/Src/printf.c **** {
28 .loc 1 134 1 view -0
29 .cfi_startproc
30 @ args = 0, pretend = 0, frame = 0
31 @ frame_needed = 0, uses_anonymous_args = 0
32 @ link register save eliminated.
135:Core/Src/printf.c **** if (idx < maxlen) {
33 .loc 1 135 3 view .LVU1
34 .loc 1 135 6 is_stmt 0 view .LVU2
35 0000 9A42 cmp r2, r3
36 0002 00D2 bcs .L1
136:Core/Src/printf.c **** ((char*)buffer)[idx] = character;
ARM GAS /tmp/ccibzHy5.s page 4
37 .loc 1 136 5 is_stmt 1 view .LVU3
38 .loc 1 136 26 is_stmt 0 view .LVU4
39 0004 8854 strb r0, [r1, r2]
40 .L1:
137:Core/Src/printf.c **** }
138:Core/Src/printf.c **** }
41 .loc 1 138 1 view .LVU5
42 0006 7047 bx lr
43 .cfi_endproc
44 .LFE0:
46 .section .text._out_null,"ax",%progbits
47 .align 1
48 .syntax unified
49 .thumb
50 .thumb_func
51 .fpu fpv5-d16
53 _out_null:
54 .LVL1:
55 .LFB1:
139:Core/Src/printf.c ****
140:Core/Src/printf.c ****
141:Core/Src/printf.c **** // internal null output
142:Core/Src/printf.c **** static inline void _out_null(char character, void* buffer, size_t idx, size_t maxlen)
143:Core/Src/printf.c **** {
56 .loc 1 143 1 is_stmt 1 view -0
57 .cfi_startproc
58 @ args = 0, pretend = 0, frame = 0
59 @ frame_needed = 0, uses_anonymous_args = 0
60 @ link register save eliminated.
144:Core/Src/printf.c **** (void)character; (void)buffer; (void)idx; (void)maxlen;
61 .loc 1 144 3 view .LVU7
62 .loc 1 144 20 view .LVU8
63 .loc 1 144 34 view .LVU9
64 .loc 1 144 45 view .LVU10
145:Core/Src/printf.c **** }
65 .loc 1 145 1 is_stmt 0 view .LVU11
66 0000 7047 bx lr
67 .cfi_endproc
68 .LFE1:
70 .section .text._out_fct,"ax",%progbits
71 .align 1
72 .syntax unified
73 .thumb
74 .thumb_func
75 .fpu fpv5-d16
77 _out_fct:
78 .LVL2:
79 .LFB3:
146:Core/Src/printf.c ****
147:Core/Src/printf.c ****
148:Core/Src/printf.c **** // internal _putchar wrapper
149:Core/Src/printf.c **** static inline void _out_char(char character, void* buffer, size_t idx, size_t maxlen)
150:Core/Src/printf.c **** {
151:Core/Src/printf.c **** (void)buffer; (void)idx; (void)maxlen;
152:Core/Src/printf.c **** if (character) {
153:Core/Src/printf.c **** _putchar(character);
154:Core/Src/printf.c **** }
ARM GAS /tmp/ccibzHy5.s page 5
155:Core/Src/printf.c **** }
156:Core/Src/printf.c ****
157:Core/Src/printf.c ****
158:Core/Src/printf.c **** // internal output function wrapper
159:Core/Src/printf.c **** static inline void _out_fct(char character, void* buffer, size_t idx, size_t maxlen)
160:Core/Src/printf.c **** {
80 .loc 1 160 1 is_stmt 1 view -0
81 .cfi_startproc
82 @ args = 0, pretend = 0, frame = 0
83 @ frame_needed = 0, uses_anonymous_args = 0
161:Core/Src/printf.c **** (void)idx; (void)maxlen;
84 .loc 1 161 3 view .LVU13
85 .loc 1 161 14 view .LVU14
162:Core/Src/printf.c **** if (character) {
86 .loc 1 162 3 view .LVU15
87 .loc 1 162 6 is_stmt 0 view .LVU16
88 0000 20B1 cbz r0, .L7
160:Core/Src/printf.c **** (void)idx; (void)maxlen;
89 .loc 1 160 1 view .LVU17
90 0002 08B5 push {r3, lr}
91 .LCFI0:
92 .cfi_def_cfa_offset 8
93 .cfi_offset 3, -8
94 .cfi_offset 14, -4
163:Core/Src/printf.c **** // buffer is the output fct pointer
164:Core/Src/printf.c **** ((out_fct_wrap_type*)buffer)->fct(character, ((out_fct_wrap_type*)buffer)->arg);
95 .loc 1 164 5 is_stmt 1 view .LVU18
96 .loc 1 164 33 is_stmt 0 view .LVU19
97 0004 0A68 ldr r2, [r1]
98 .LVL3:
99 .loc 1 164 6 view .LVU20
100 0006 4968 ldr r1, [r1, #4]
101 .LVL4:
102 .loc 1 164 6 view .LVU21
103 0008 9047 blx r2
104 .LVL5:
165:Core/Src/printf.c **** }
166:Core/Src/printf.c **** }
105 .loc 1 166 1 view .LVU22
106 000a 08BD pop {r3, pc}
107 .LVL6:
108 .L7:
109 .LCFI1:
110 .cfi_def_cfa_offset 0
111 .cfi_restore 3
112 .cfi_restore 14
113 .loc 1 166 1 view .LVU23
114 000c 7047 bx lr
115 .cfi_endproc
116 .LFE3:
118 .section .text._atoi,"ax",%progbits
119 .align 1
120 .syntax unified
121 .thumb
122 .thumb_func
123 .fpu fpv5-d16
125 _atoi:
ARM GAS /tmp/ccibzHy5.s page 6
126 .LVL7:
127 .LFB6:
167:Core/Src/printf.c ****
168:Core/Src/printf.c ****
169:Core/Src/printf.c **** // internal secure strlen
170:Core/Src/printf.c **** // \return The length of the string (excluding the terminating 0) limited by 'maxsize'
171:Core/Src/printf.c **** static inline unsigned int _strnlen_s(const char* str, size_t maxsize)
172:Core/Src/printf.c **** {
173:Core/Src/printf.c **** const char* s;
174:Core/Src/printf.c **** for (s = str; *s && maxsize--; ++s);
175:Core/Src/printf.c **** return (unsigned int)(s - str);
176:Core/Src/printf.c **** }
177:Core/Src/printf.c ****
178:Core/Src/printf.c ****
179:Core/Src/printf.c **** // internal test if char is a digit (0-9)
180:Core/Src/printf.c **** // \return true if char is a digit
181:Core/Src/printf.c **** static inline bool _is_digit(char ch)
182:Core/Src/printf.c **** {
183:Core/Src/printf.c **** return (ch >= '0') && (ch <= '9');
184:Core/Src/printf.c **** }
185:Core/Src/printf.c ****
186:Core/Src/printf.c ****
187:Core/Src/printf.c **** // internal ASCII string to unsigned int conversion
188:Core/Src/printf.c **** static unsigned int _atoi(const char** str)
189:Core/Src/printf.c **** {
128 .loc 1 189 1 is_stmt 1 view -0
129 .cfi_startproc
130 @ args = 0, pretend = 0, frame = 0
131 @ frame_needed = 0, uses_anonymous_args = 0
132 @ link register save eliminated.
133 .loc 1 189 1 is_stmt 0 view .LVU25
134 0000 0146 mov r1, r0
190:Core/Src/printf.c **** unsigned int i = 0U;
135 .loc 1 190 3 is_stmt 1 view .LVU26
136 .LVL8:
191:Core/Src/printf.c **** while (_is_digit(**str)) {
137 .loc 1 191 3 view .LVU27
190:Core/Src/printf.c **** unsigned int i = 0U;
138 .loc 1 190 16 is_stmt 0 view .LVU28
139 0002 0020 movs r0, #0
140 .LVL9:
141 .loc 1 191 9 view .LVU29
142 0004 07E0 b .L11
143 .LVL10:
144 .L12:
192:Core/Src/printf.c **** i = i * 10U + (unsigned int)(*((*str)++) - '0');
145 .loc 1 192 5 is_stmt 1 view .LVU30
146 .loc 1 192 11 is_stmt 0 view .LVU31
147 0006 00EB8000 add r0, r0, r0, lsl #2
148 .LVL11:
149 .loc 1 192 42 view .LVU32
150 000a 531C adds r3, r2, #1
151 000c 0B60 str r3, [r1]
152 .loc 1 192 34 view .LVU33
153 000e 1378 ldrb r3, [r2] @ zero_extendqisi2
154 .loc 1 192 17 view .LVU34
155 0010 03EB4000 add r0, r3, r0, lsl #1
ARM GAS /tmp/ccibzHy5.s page 7
156 .loc 1 192 7 view .LVU35
157 0014 3038 subs r0, r0, #48
158 .LVL12:
159 .L11:
191:Core/Src/printf.c **** while (_is_digit(**str)) {
160 .loc 1 191 9 is_stmt 1 view .LVU36
191:Core/Src/printf.c **** while (_is_digit(**str)) {
161 .loc 1 191 21 is_stmt 0 view .LVU37
162 0016 0A68 ldr r2, [r1]
191:Core/Src/printf.c **** while (_is_digit(**str)) {
163 .loc 1 191 10 view .LVU38
164 0018 1378 ldrb r3, [r2] @ zero_extendqisi2
165 .LVL13:
166 .LBB20:
167 .LBI20:
181:Core/Src/printf.c **** {
168 .loc 1 181 20 is_stmt 1 view .LVU39
169 .LBB21:
183:Core/Src/printf.c **** }
170 .loc 1 183 3 view .LVU40
183:Core/Src/printf.c **** }
171 .loc 1 183 22 is_stmt 0 view .LVU41
172 001a 303B subs r3, r3, #48
173 .LVL14:
183:Core/Src/printf.c **** }
174 .loc 1 183 22 view .LVU42
175 001c DBB2 uxtb r3, r3
176 .LVL15:
183:Core/Src/printf.c **** }
177 .loc 1 183 22 view .LVU43
178 .LBE21:
179 .LBE20:
191:Core/Src/printf.c **** i = i * 10U + (unsigned int)(*((*str)++) - '0');
180 .loc 1 191 9 view .LVU44
181 001e 092B cmp r3, #9
182 0020 F1D9 bls .L12
193:Core/Src/printf.c **** }
194:Core/Src/printf.c **** return i;
183 .loc 1 194 3 is_stmt 1 view .LVU45
195:Core/Src/printf.c **** }
184 .loc 1 195 1 is_stmt 0 view .LVU46
185 0022 7047 bx lr
186 .cfi_endproc
187 .LFE6:
189 .section .text._out_rev,"ax",%progbits
190 .align 1
191 .syntax unified
192 .thumb
193 .thumb_func
194 .fpu fpv5-d16
196 _out_rev:
197 .LVL16:
198 .LFB7:
196:Core/Src/printf.c ****
197:Core/Src/printf.c ****
198:Core/Src/printf.c **** // output the specified string in reverse, taking care of any zero-padding
199:Core/Src/printf.c **** static size_t _out_rev(out_fct_type out, char* buffer, size_t idx, size_t maxlen, const char* buf,
ARM GAS /tmp/ccibzHy5.s page 8
200:Core/Src/printf.c **** {
199 .loc 1 200 1 is_stmt 1 view -0
200 .cfi_startproc
201 @ args = 16, pretend = 0, frame = 8
202 @ frame_needed = 0, uses_anonymous_args = 0
203 .loc 1 200 1 is_stmt 0 view .LVU48
204 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
205 .LCFI2:
206 .cfi_def_cfa_offset 36
207 .cfi_offset 4, -36
208 .cfi_offset 5, -32
209 .cfi_offset 6, -28
210 .cfi_offset 7, -24
211 .cfi_offset 8, -20
212 .cfi_offset 9, -16
213 .cfi_offset 10, -12
214 .cfi_offset 11, -8
215 .cfi_offset 14, -4
216 0004 83B0 sub sp, sp, #12
217 .LCFI3:
218 .cfi_def_cfa_offset 48
219 0006 0546 mov r5, r0
220 0008 0E46 mov r6, r1
221 000a 9346 mov fp, r2
222 000c 1F46 mov r7, r3
223 000e DDF830A0 ldr r10, [sp, #48]
224 0012 0D9C ldr r4, [sp, #52]
225 0014 DDF83890 ldr r9, [sp, #56]
201:Core/Src/printf.c **** const size_t start_idx = idx;
226 .loc 1 201 3 is_stmt 1 view .LVU49
227 .LVL17:
202:Core/Src/printf.c ****
203:Core/Src/printf.c **** // pad spaces up to given width
204:Core/Src/printf.c **** if (!(flags & FLAGS_LEFT) && !(flags & FLAGS_ZEROPAD)) {
228 .loc 1 204 3 view .LVU50
229 .loc 1 204 6 is_stmt 0 view .LVU51
230 0018 0F9B ldr r3, [sp, #60]
231 .LVL18:
232 .loc 1 204 6 view .LVU52
233 001a 13F0030F tst r3, #3
234 001e 19D1 bne .L15
235 .LBB22:
205:Core/Src/printf.c **** for (size_t i = len; i < width; i++) {
236 .loc 1 205 17 view .LVU53
237 0020 A046 mov r8, r4
238 .LBE22:
239 0022 0192 str r2, [sp, #4]
240 .LVL19:
241 .L14:
242 .LBB23:
243 .loc 1 205 26 is_stmt 1 discriminator 1 view .LVU54
244 .loc 1 205 5 is_stmt 0 discriminator 1 view .LVU55
245 0024 C845 cmp r8, r9
246 0026 09D2 bcs .L25
206:Core/Src/printf.c **** out(' ', buffer, idx++, maxlen);
247 .loc 1 206 7 is_stmt 1 discriminator 3 view .LVU56
248 0028 02F1010B add fp, r2, #1
ARM GAS /tmp/ccibzHy5.s page 9
249 .LVL20:
250 .loc 1 206 7 is_stmt 0 discriminator 3 view .LVU57
251 002c 3B46 mov r3, r7
252 002e 3146 mov r1, r6
253 0030 2020 movs r0, #32
254 0032 A847 blx r5
255 .LVL21:
205:Core/Src/printf.c **** for (size_t i = len; i < width; i++) {
256 .loc 1 205 37 is_stmt 1 discriminator 3 view .LVU58
205:Core/Src/printf.c **** for (size_t i = len; i < width; i++) {
257 .loc 1 205 38 is_stmt 0 discriminator 3 view .LVU59
258 0034 08F10108 add r8, r8, #1
259 .LVL22:
260 .loc 1 206 7 discriminator 3 view .LVU60
261 0038 5A46 mov r2, fp
262 003a F3E7 b .L14
263 .LVL23:
264 .L25:
265 .loc 1 206 7 discriminator 3 view .LVU61
266 003c DDF804B0 ldr fp, [sp, #4]
267 0040 08E0 b .L15
268 .LVL24:
269 .L18:
270 .loc 1 206 7 discriminator 3 view .LVU62
271 .LBE23:
207:Core/Src/printf.c **** }
208:Core/Src/printf.c **** }
209:Core/Src/printf.c ****
210:Core/Src/printf.c **** // reverse string
211:Core/Src/printf.c **** while (len) {
212:Core/Src/printf.c **** out(buf[--len], buffer, idx++, maxlen);
272 .loc 1 212 5 is_stmt 1 view .LVU63
273 0042 013C subs r4, r4, #1
274 .LVL25:
275 .loc 1 212 5 is_stmt 0 view .LVU64
276 0044 02F10108 add r8, r2, #1
277 .LVL26:
278 .loc 1 212 5 view .LVU65
279 0048 3B46 mov r3, r7
280 004a 3146 mov r1, r6
281 004c 1AF80400 ldrb r0, [r10, r4] @ zero_extendqisi2
282 0050 A847 blx r5
283 .LVL27:
284 0052 4246 mov r2, r8
285 .LVL28:
286 .L15:
211:Core/Src/printf.c **** out(buf[--len], buffer, idx++, maxlen);
287 .loc 1 211 9 is_stmt 1 view .LVU66
288 0054 002C cmp r4, #0
289 0056 F4D1 bne .L18
213:Core/Src/printf.c **** }
214:Core/Src/printf.c ****
215:Core/Src/printf.c **** // append pad spaces up to given width
216:Core/Src/printf.c **** if (flags & FLAGS_LEFT) {
290 .loc 1 216 3 view .LVU67
291 .loc 1 216 6 is_stmt 0 view .LVU68
292 0058 0F9B ldr r3, [sp, #60]
ARM GAS /tmp/ccibzHy5.s page 10
293 005a 13F0020F tst r3, #2
294 005e 03D1 bne .L19
295 .LVL29:
296 .L13:
217:Core/Src/printf.c **** while (idx - start_idx < width) {
218:Core/Src/printf.c **** out(' ', buffer, idx++, maxlen);
219:Core/Src/printf.c **** }
220:Core/Src/printf.c **** }
221:Core/Src/printf.c ****
222:Core/Src/printf.c **** return idx;
223:Core/Src/printf.c **** }
297 .loc 1 223 1 view .LVU69
298 0060 1046 mov r0, r2
299 0062 03B0 add sp, sp, #12
300 .LCFI4:
301 .cfi_remember_state
302 .cfi_def_cfa_offset 36
303 @ sp needed
304 0064 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
305 .LVL30:
306 .L19:
307 .LCFI5:
308 .cfi_restore_state
217:Core/Src/printf.c **** while (idx - start_idx < width) {
309 .loc 1 217 11 is_stmt 1 view .LVU70
217:Core/Src/printf.c **** while (idx - start_idx < width) {
310 .loc 1 217 16 is_stmt 0 view .LVU71
311 0068 A2EB0B03 sub r3, r2, fp
217:Core/Src/printf.c **** while (idx - start_idx < width) {
312 .loc 1 217 11 view .LVU72
313 006c 4B45 cmp r3, r9
314 006e F7D2 bcs .L13
218:Core/Src/printf.c **** }
315 .loc 1 218 7 is_stmt 1 view .LVU73
316 0070 541C adds r4, r2, #1
317 .LVL31:
218:Core/Src/printf.c **** }
318 .loc 1 218 7 is_stmt 0 view .LVU74
319 0072 3B46 mov r3, r7
320 0074 3146 mov r1, r6
321 0076 2020 movs r0, #32
322 0078 A847 blx r5
323 .LVL32:
324 007a 2246 mov r2, r4
325 007c F4E7 b .L19
326 .cfi_endproc
327 .LFE7:
329 .section .text._ntoa_format,"ax",%progbits
330 .align 1
331 .syntax unified
332 .thumb
333 .thumb_func
334 .fpu fpv5-d16
336 _ntoa_format:
337 .LVL33:
338 .LFB8:
224:Core/Src/printf.c ****
ARM GAS /tmp/ccibzHy5.s page 11
225:Core/Src/printf.c ****
226:Core/Src/printf.c **** // internal itoa format
227:Core/Src/printf.c **** static size_t _ntoa_format(out_fct_type out, char* buffer, size_t idx, size_t maxlen, char* buf, si
228:Core/Src/printf.c **** {
339 .loc 1 228 1 is_stmt 1 view -0
340 .cfi_startproc
341 @ args = 28, pretend = 0, frame = 0
342 @ frame_needed = 0, uses_anonymous_args = 0
343 .loc 1 228 1 is_stmt 0 view .LVU76
344 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr}
345 .LCFI6:
346 .cfi_def_cfa_offset 28
347 .cfi_offset 4, -28
348 .cfi_offset 5, -24
349 .cfi_offset 6, -20
350 .cfi_offset 7, -16
351 .cfi_offset 8, -12
352 .cfi_offset 9, -8
353 .cfi_offset 14, -4
354 0004 85B0 sub sp, sp, #20
355 .LCFI7:
356 .cfi_def_cfa_offset 48
357 0006 9E46 mov lr, r3
358 0008 0C9D ldr r5, [sp, #48]
359 000a 0D9C ldr r4, [sp, #52]
360 000c 9DF83890 ldrb r9, [sp, #56] @ zero_extendqisi2
361 0010 DDF83C80 ldr r8, [sp, #60]
362 0014 DDF840C0 ldr ip, [sp, #64]
363 0018 119B ldr r3, [sp, #68]
364 .LVL34:
365 .loc 1 228 1 view .LVU77
366 001a 129E ldr r6, [sp, #72]
229:Core/Src/printf.c **** // pad leading zeros
230:Core/Src/printf.c **** if (!(flags & FLAGS_LEFT)) {
367 .loc 1 230 3 is_stmt 1 view .LVU78
368 .loc 1 230 6 is_stmt 0 view .LVU79
369 001c 16F0020F tst r6, #2
370 0020 20D1 bne .L27
231:Core/Src/printf.c **** if (width && (flags & FLAGS_ZEROPAD) && (negative || (flags & (FLAGS_PLUS | FLAGS_SPACE)))) {
371 .loc 1 231 5 is_stmt 1 view .LVU80
372 .loc 1 231 8 is_stmt 0 view .LVU81
373 0022 6BB1 cbz r3, .L30
374 .loc 1 231 15 discriminator 1 view .LVU82
375 0024 16F0010F tst r6, #1
376 0028 0AD0 beq .L30
377 .loc 1 231 42 discriminator 2 view .LVU83
378 002a B9F1000F cmp r9, #0
379 002e 02D1 bne .L29
380 .loc 1 231 55 discriminator 3 view .LVU84
381 0030 16F00C0F tst r6, #12
382 0034 04D0 beq .L30
383 .L29:
232:Core/Src/printf.c **** width--;
384 .loc 1 232 7 is_stmt 1 view .LVU85
385 .loc 1 232 12 is_stmt 0 view .LVU86
386 0036 013B subs r3, r3, #1
387 .LVL35:
ARM GAS /tmp/ccibzHy5.s page 12
388 .loc 1 232 12 view .LVU87
389 0038 02E0 b .L30
390 .LVL36:
391 .L31:
233:Core/Src/printf.c **** }
234:Core/Src/printf.c **** while ((len < prec) && (len < PRINTF_NTOA_BUFFER_SIZE)) {
235:Core/Src/printf.c **** buf[len++] = '0';
392 .loc 1 235 7 is_stmt 1 view .LVU88
393 .loc 1 235 18 is_stmt 0 view .LVU89
394 003a 3027 movs r7, #48
395 003c 2F55 strb r7, [r5, r4]
396 .loc 1 235 14 view .LVU90
397 003e 0134 adds r4, r4, #1
398 .LVL37:
399 .L30:
234:Core/Src/printf.c **** buf[len++] = '0';
400 .loc 1 234 11 is_stmt 1 view .LVU91
401 0040 1F2C cmp r4, #31
402 0042 98BF it ls
403 0044 6445 cmpls r4, ip
404 0046 F8D3 bcc .L31
405 .L32:
236:Core/Src/printf.c **** }
237:Core/Src/printf.c **** while ((flags & FLAGS_ZEROPAD) && (len < width) && (len < PRINTF_NTOA_BUFFER_SIZE)) {
406 .loc 1 237 11 view .LVU92
407 0048 16F0010F tst r6, #1
408 004c 0AD0 beq .L27
409 .loc 1 237 61 is_stmt 0 discriminator 1 view .LVU93
410 004e 1F2C cmp r4, #31
411 0050 8CBF ite hi
412 0052 0027 movhi r7, #0
413 0054 0127 movls r7, #1
414 .loc 1 237 53 discriminator 1 view .LVU94
415 0056 9C42 cmp r4, r3
416 0058 04D2 bcs .L27
417 005a 1FB1 cbz r7, .L27
238:Core/Src/printf.c **** buf[len++] = '0';
418 .loc 1 238 7 is_stmt 1 view .LVU95
419 .LVL38:
420 .loc 1 238 18 is_stmt 0 view .LVU96
421 005c 3027 movs r7, #48
422 005e 2F55 strb r7, [r5, r4]
423 .loc 1 238 14 view .LVU97
424 0060 0134 adds r4, r4, #1
425 .LVL39:
426 .loc 1 238 14 view .LVU98
427 0062 F1E7 b .L32
428 .LVL40:
429 .L27:
239:Core/Src/printf.c **** }
240:Core/Src/printf.c **** }
241:Core/Src/printf.c ****
242:Core/Src/printf.c **** // handle hash
243:Core/Src/printf.c **** if (flags & FLAGS_HASH) {
430 .loc 1 243 3 is_stmt 1 view .LVU99
431 .loc 1 243 6 is_stmt 0 view .LVU100
432 0064 16F0100F tst r6, #16
ARM GAS /tmp/ccibzHy5.s page 13
433 0068 27D0 beq .L35
244:Core/Src/printf.c **** if (!(flags & FLAGS_PRECISION) && len && ((len == prec) || (len == width))) {
434 .loc 1 244 5 is_stmt 1 view .LVU101
435 .loc 1 244 8 is_stmt 0 view .LVU102
436 006a 16F4806F tst r6, #1024
437 006e 11D1 bne .L36
438 .loc 1 244 36 discriminator 1 view .LVU103
439 0070 84B1 cbz r4, .L36
440 .loc 1 244 43 discriminator 2 view .LVU104
441 0072 9C42 cmp r4, r3
442 0074 18BF it ne
443 0076 6445 cmpne r4, ip
444 0078 0CD1 bne .L36
245:Core/Src/printf.c **** len--;
445 .loc 1 245 7 is_stmt 1 view .LVU105
446 .LVL41:
246:Core/Src/printf.c **** if (len && (base == 16U)) {
447 .loc 1 246 7 view .LVU106
448 .loc 1 246 11 is_stmt 0 view .LVU107
449 007a B4F1010C subs ip, r4, #1
450 .LVL42:
451 .loc 1 246 11 view .LVU108
452 007e 14BF ite ne
453 0080 0127 movne r7, #1
454 0082 0027 moveq r7, #0
455 .loc 1 246 15 view .LVU109
456 0084 B8F1100F cmp r8, #16
457 0088 14BF ite ne
458 008a 0027 movne r7, #0
459 008c 07F00107 andeq r7, r7, #1
460 .loc 1 246 10 view .LVU110
461 0090 2FB3 cbz r7, .L43
247:Core/Src/printf.c **** len--;
462 .loc 1 247 9 is_stmt 1 view .LVU111
463 .loc 1 247 12 is_stmt 0 view .LVU112
464 0092 023C subs r4, r4, #2
465 .LVL43:
466 .L36:
248:Core/Src/printf.c **** }
249:Core/Src/printf.c **** }
250:Core/Src/printf.c **** if ((base == 16U) && !(flags & FLAGS_UPPERCASE) && (len < PRINTF_NTOA_BUFFER_SIZE)) {
467 .loc 1 250 5 is_stmt 1 view .LVU113
468 .loc 1 250 8 is_stmt 0 view .LVU114
469 0094 B8F1100F cmp r8, #16
470 0098 23D0 beq .L45
471 .L37:
251:Core/Src/printf.c **** buf[len++] = 'x';
252:Core/Src/printf.c **** }
253:Core/Src/printf.c **** else if ((base == 16U) && (flags & FLAGS_UPPERCASE) && (len < PRINTF_NTOA_BUFFER_SIZE)) {
472 .loc 1 253 10 is_stmt 1 view .LVU115
473 .loc 1 253 13 is_stmt 0 view .LVU116
474 009a B8F1100F cmp r8, #16
475 009e 29D0 beq .L46
476 .L39:
254:Core/Src/printf.c **** buf[len++] = 'X';
255:Core/Src/printf.c **** }
256:Core/Src/printf.c **** else if ((base == 2U) && (len < PRINTF_NTOA_BUFFER_SIZE)) {
ARM GAS /tmp/ccibzHy5.s page 14
477 .loc 1 256 10 is_stmt 1 view .LVU117
478 .loc 1 256 13 is_stmt 0 view .LVU118
479 00a0 1F2C cmp r4, #31
480 00a2 98BF it ls
481 00a4 B8F1020F cmpls r8, #2
482 00a8 02D1 bne .L38
257:Core/Src/printf.c **** buf[len++] = 'b';
483 .loc 1 257 7 is_stmt 1 view .LVU119
484 .LVL44:
485 .loc 1 257 18 is_stmt 0 view .LVU120
486 00aa 6227 movs r7, #98
487 00ac 2F55 strb r7, [r5, r4]
488 .loc 1 257 14 view .LVU121
489 00ae 0134 adds r4, r4, #1
490 .LVL45:
491 .L38:
258:Core/Src/printf.c **** }
259:Core/Src/printf.c **** if (len < PRINTF_NTOA_BUFFER_SIZE) {
492 .loc 1 259 5 is_stmt 1 view .LVU122
493 .loc 1 259 8 is_stmt 0 view .LVU123
494 00b0 1F2C cmp r4, #31
495 00b2 02D8 bhi .L35
260:Core/Src/printf.c **** buf[len++] = '0';
496 .loc 1 260 7 is_stmt 1 view .LVU124
497 .LVL46:
498 .loc 1 260 18 is_stmt 0 view .LVU125
499 00b4 3027 movs r7, #48
500 00b6 2F55 strb r7, [r5, r4]
501 .loc 1 260 14 view .LVU126
502 00b8 0134 adds r4, r4, #1
503 .LVL47:
504 .L35:
261:Core/Src/printf.c **** }
262:Core/Src/printf.c **** }
263:Core/Src/printf.c ****
264:Core/Src/printf.c **** if (len < PRINTF_NTOA_BUFFER_SIZE) {
505 .loc 1 264 3 is_stmt 1 view .LVU127
506 .loc 1 264 6 is_stmt 0 view .LVU128
507 00ba 1F2C cmp r4, #31
508 00bc 05D8 bhi .L40
265:Core/Src/printf.c **** if (negative) {
509 .loc 1 265 5 is_stmt 1 view .LVU129
510 .loc 1 265 8 is_stmt 0 view .LVU130
511 00be B9F1000F cmp r9, #0
512 00c2 20D0 beq .L41
266:Core/Src/printf.c **** buf[len++] = '-';
513 .loc 1 266 7 is_stmt 1 view .LVU131
514 .LVL48:
515 .loc 1 266 18 is_stmt 0 view .LVU132
516 00c4 2D27 movs r7, #45
517 00c6 2F55 strb r7, [r5, r4]
518 .loc 1 266 14 view .LVU133
519 00c8 0134 adds r4, r4, #1
520 .LVL49:
521 .L40:
267:Core/Src/printf.c **** }
268:Core/Src/printf.c **** else if (flags & FLAGS_PLUS) {
ARM GAS /tmp/ccibzHy5.s page 15
269:Core/Src/printf.c **** buf[len++] = '+'; // ignore the space if the '+' exists
270:Core/Src/printf.c **** }
271:Core/Src/printf.c **** else if (flags & FLAGS_SPACE) {
272:Core/Src/printf.c **** buf[len++] = ' ';
273:Core/Src/printf.c **** }
274:Core/Src/printf.c **** }
275:Core/Src/printf.c ****
276:Core/Src/printf.c **** return _out_rev(out, buffer, idx, maxlen, buf, len, width, flags);
522 .loc 1 276 3 is_stmt 1 view .LVU134
523 .loc 1 276 10 is_stmt 0 view .LVU135
524 00ca 0396 str r6, [sp, #12]
525 00cc 0293 str r3, [sp, #8]
526 00ce 0194 str r4, [sp, #4]
527 00d0 0095 str r5, [sp]
528 00d2 7346 mov r3, lr
529 .LVL50:
530 .loc 1 276 10 view .LVU136
531 00d4 FFF7FEFF bl _out_rev
532 .LVL51:
277:Core/Src/printf.c **** }
533 .loc 1 277 1 view .LVU137
534 00d8 05B0 add sp, sp, #20
535 .LCFI8:
536 .cfi_remember_state
537 .cfi_def_cfa_offset 28
538 @ sp needed
539 00da BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc}
540 .LVL52:
541 .L43:
542 .LCFI9:
543 .cfi_restore_state
245:Core/Src/printf.c **** if (len && (base == 16U)) {
544 .loc 1 245 10 view .LVU138
545 00de 6446 mov r4, ip
546 00e0 D8E7 b .L36
547 .LVL53:
548 .L45:
250:Core/Src/printf.c **** buf[len++] = 'x';
549 .loc 1 250 23 discriminator 1 view .LVU139
550 00e2 16F0200F tst r6, #32
551 00e6 D8D1 bne .L37
250:Core/Src/printf.c **** buf[len++] = 'x';
552 .loc 1 250 53 discriminator 2 view .LVU140
553 00e8 1F2C cmp r4, #31
554 00ea D6D8 bhi .L37
251:Core/Src/printf.c **** }
555 .loc 1 251 7 is_stmt 1 view .LVU141
556 .LVL54:
251:Core/Src/printf.c **** }
557 .loc 1 251 18 is_stmt 0 view .LVU142
558 00ec 7827 movs r7, #120
559 00ee 2F55 strb r7, [r5, r4]
251:Core/Src/printf.c **** }
560 .loc 1 251 14 view .LVU143
561 00f0 0134 adds r4, r4, #1
562 .LVL55:
251:Core/Src/printf.c **** }
ARM GAS /tmp/ccibzHy5.s page 16
563 .loc 1 251 18 view .LVU144
564 00f2 DDE7 b .L38
565 .L46:
253:Core/Src/printf.c **** buf[len++] = 'X';
566 .loc 1 253 28 discriminator 1 view .LVU145
567 00f4 16F0200F tst r6, #32
568 00f8 D2D0 beq .L39
253:Core/Src/printf.c **** buf[len++] = 'X';
569 .loc 1 253 57 discriminator 2 view .LVU146
570 00fa 1F2C cmp r4, #31
571 00fc D0D8 bhi .L39
254:Core/Src/printf.c **** }
572 .loc 1 254 7 is_stmt 1 view .LVU147
573 .LVL56:
254:Core/Src/printf.c **** }
574 .loc 1 254 18 is_stmt 0 view .LVU148
575 00fe 5827 movs r7, #88
576 0100 2F55 strb r7, [r5, r4]
254:Core/Src/printf.c **** }
577 .loc 1 254 14 view .LVU149
578 0102 0134 adds r4, r4, #1
579 .LVL57:
254:Core/Src/printf.c **** }
580 .loc 1 254 18 view .LVU150
581 0104 D4E7 b .L38
582 .L41:
268:Core/Src/printf.c **** buf[len++] = '+'; // ignore the space if the '+' exists
583 .loc 1 268 10 is_stmt 1 view .LVU151
268:Core/Src/printf.c **** buf[len++] = '+'; // ignore the space if the '+' exists
584 .loc 1 268 13 is_stmt 0 view .LVU152
585 0106 16F0040F tst r6, #4
586 010a 03D0 beq .L42
269:Core/Src/printf.c **** }
587 .loc 1 269 7 is_stmt 1 view .LVU153
588 .LVL58:
269:Core/Src/printf.c **** }
589 .loc 1 269 18 is_stmt 0 view .LVU154
590 010c 2B27 movs r7, #43
591 010e 2F55 strb r7, [r5, r4]
269:Core/Src/printf.c **** }
592 .loc 1 269 14 view .LVU155
593 0110 0134 adds r4, r4, #1
594 .LVL59:
269:Core/Src/printf.c **** }
595 .loc 1 269 14 view .LVU156
596 0112 DAE7 b .L40
597 .L42:
271:Core/Src/printf.c **** buf[len++] = ' ';
598 .loc 1 271 10 is_stmt 1 view .LVU157
271:Core/Src/printf.c **** buf[len++] = ' ';
599 .loc 1 271 13 is_stmt 0 view .LVU158
600 0114 16F0080F tst r6, #8
601 0118 D7D0 beq .L40
272:Core/Src/printf.c **** }
602 .loc 1 272 7 is_stmt 1 view .LVU159
603 .LVL60:
272:Core/Src/printf.c **** }
ARM GAS /tmp/ccibzHy5.s page 17
604 .loc 1 272 18 is_stmt 0 view .LVU160
605 011a 2027 movs r7, #32
606 011c 2F55 strb r7, [r5, r4]
272:Core/Src/printf.c **** }
607 .loc 1 272 14 view .LVU161
608 011e 0134 adds r4, r4, #1
609 .LVL61:
272:Core/Src/printf.c **** }
610 .loc 1 272 14 view .LVU162
611 0120 D3E7 b .L40
612 .cfi_endproc
613 .LFE8:
615 .section .text._ntoa_long,"ax",%progbits
616 .align 1
617 .syntax unified
618 .thumb
619 .thumb_func
620 .fpu fpv5-d16
622 _ntoa_long:
623 .LVL62:
624 .LFB9:
278:Core/Src/printf.c ****
279:Core/Src/printf.c ****
280:Core/Src/printf.c **** // internal itoa for 'long' type
281:Core/Src/printf.c **** static size_t _ntoa_long(out_fct_type out, char* buffer, size_t idx, size_t maxlen, unsigned long v
282:Core/Src/printf.c **** {
625 .loc 1 282 1 is_stmt 1 view -0
626 .cfi_startproc
627 @ args = 24, pretend = 0, frame = 32
628 @ frame_needed = 0, uses_anonymous_args = 0
629 .loc 1 282 1 is_stmt 0 view .LVU164
630 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr}
631 .LCFI10:
632 .cfi_def_cfa_offset 24
633 .cfi_offset 4, -24
634 .cfi_offset 5, -20
635 .cfi_offset 6, -16
636 .cfi_offset 7, -12
637 .cfi_offset 8, -8
638 .cfi_offset 14, -4
639 0004 90B0 sub sp, sp, #64
640 .LCFI11:
641 .cfi_def_cfa_offset 88
642 0006 169C ldr r4, [sp, #88]
643 0008 189D ldr r5, [sp, #96]
644 000a 1B9E ldr r6, [sp, #108]
283:Core/Src/printf.c **** char buf[PRINTF_NTOA_BUFFER_SIZE];
645 .loc 1 283 3 is_stmt 1 view .LVU165
284:Core/Src/printf.c **** size_t len = 0U;
646 .loc 1 284 3 view .LVU166
647 .LVL63:
285:Core/Src/printf.c ****
286:Core/Src/printf.c **** // no hash for 0 values
287:Core/Src/printf.c **** if (!value) {
648 .loc 1 287 3 view .LVU167
649 .loc 1 287 6 is_stmt 0 view .LVU168
650 000c 0CB9 cbnz r4, .L48
ARM GAS /tmp/ccibzHy5.s page 18
288:Core/Src/printf.c **** flags &= ~FLAGS_HASH;
651 .loc 1 288 5 is_stmt 1 view .LVU169
652 .loc 1 288 11 is_stmt 0 view .LVU170
653 000e 26F01006 bic r6, r6, #16
654 .LVL64:
655 .L48:
289:Core/Src/printf.c **** }
290:Core/Src/printf.c ****
291:Core/Src/printf.c **** // write if precision != 0 and value is != 0
292:Core/Src/printf.c **** if (!(flags & FLAGS_PRECISION) || value) {
656 .loc 1 292 3 is_stmt 1 view .LVU171
657 .loc 1 292 6 is_stmt 0 view .LVU172
658 0012 16F4806E ands lr, r6, #1024
659 0016 1AD0 beq .L54
660 .loc 1 292 34 discriminator 1 view .LVU173
661 0018 84B3 cbz r4, .L55
662 001a 4FF0000E mov lr, #0
663 001e 16E0 b .L54
664 .LVL65:
665 .L59:
666 .LBB24:
293:Core/Src/printf.c **** do {
294:Core/Src/printf.c **** const char digit = (char)(value % base);
295:Core/Src/printf.c **** buf[len++] = digit < 10 ? '0' + digit : (flags & FLAGS_UPPERCASE ? 'A' : 'a') + digit - 10;
667 .loc 1 295 18 discriminator 1 view .LVU174
668 0020 0CF1300C add ip, ip, #48
669 .LVL66:
670 .loc 1 295 18 discriminator 1 view .LVU175
671 0024 5FFA8CFC uxtb ip, ip
672 .LVL67:
673 .L52:
674 .loc 1 295 14 discriminator 8 view .LVU176
675 0028 0EF10107 add r7, lr, #1
676 .LVL68:
677 .loc 1 295 18 discriminator 8 view .LVU177
678 002c 0DF14008 add r8, sp, #64
679 0030 C644 add lr, lr, r8
680 0032 0EF820CC strb ip, [lr, #-32]
296:Core/Src/printf.c **** value /= base;
681 .loc 1 296 7 is_stmt 1 discriminator 8 view .LVU178
682 .loc 1 296 13 is_stmt 0 discriminator 8 view .LVU179
683 0036 B4FBF5FC udiv ip, r4, r5
684 .LVL69:
685 .loc 1 296 13 discriminator 8 view .LVU180
686 .LBE24:
297:Core/Src/printf.c **** } while (value && (len < PRINTF_NTOA_BUFFER_SIZE));
687 .loc 1 297 13 is_stmt 1 discriminator 8 view .LVU181
688 .loc 1 297 20 is_stmt 0 discriminator 8 view .LVU182
689 003a AC42 cmp r4, r5
690 003c 34BF ite cc
691 003e 0024 movcc r4, #0
692 .LVL70:
693 .loc 1 297 20 discriminator 8 view .LVU183
694 0040 0124 movcs r4, #1
695 0042 1F2F cmp r7, #31
696 0044 88BF it hi
697 0046 0024 movhi r4, #0
ARM GAS /tmp/ccibzHy5.s page 19
698 .loc 1 297 5 discriminator 8 view .LVU184
699 0048 CCB1 cbz r4, .L50
700 .LBB25:
295:Core/Src/printf.c **** value /= base;
701 .loc 1 295 14 view .LVU185
702 004a BE46 mov lr, r7
296:Core/Src/printf.c **** value /= base;
703 .loc 1 296 13 view .LVU186
704 004c 6446 mov r4, ip
705 .LVL71:
706 .L54:
296:Core/Src/printf.c **** value /= base;
707 .loc 1 296 13 view .LVU187
708 .LBE25:
293:Core/Src/printf.c **** const char digit = (char)(value % base);
709 .loc 1 293 5 is_stmt 1 view .LVU188
710 .LBB26:
294:Core/Src/printf.c **** buf[len++] = digit < 10 ? '0' + digit : (flags & FLAGS_UPPERCASE ? 'A' : 'a') + digit - 10;
711 .loc 1 294 7 view .LVU189
294:Core/Src/printf.c **** buf[len++] = digit < 10 ? '0' + digit : (flags & FLAGS_UPPERCASE ? 'A' : 'a') + digit - 10;
712 .loc 1 294 39 is_stmt 0 view .LVU190
713 004e B4FBF5FC udiv ip, r4, r5
714 0052 05FB1C4C mls ip, r5, ip, r4
294:Core/Src/printf.c **** buf[len++] = digit < 10 ? '0' + digit : (flags & FLAGS_UPPERCASE ? 'A' : 'a') + digit - 10;
715 .loc 1 294 18 view .LVU191
716 0056 5FFA8CFC uxtb ip, ip
717 .LVL72:
295:Core/Src/printf.c **** value /= base;
718 .loc 1 295 7 is_stmt 1 view .LVU192
295:Core/Src/printf.c **** value /= base;
719 .loc 1 295 18 is_stmt 0 view .LVU193
720 005a BCF1090F cmp ip, #9
721 005e DFD9 bls .L59
295:Core/Src/printf.c **** value /= base;
722 .loc 1 295 85 discriminator 2 view .LVU194
723 0060 16F0200F tst r6, #32
724 0064 08D0 beq .L56
295:Core/Src/printf.c **** value /= base;
725 .loc 1 295 85 view .LVU195
726 0066 4127 movs r7, #65
727 .L53:
295:Core/Src/printf.c **** value /= base;
728 .loc 1 295 85 discriminator 7 view .LVU196
729 0068 BC44 add ip, ip, r7
730 .LVL73:
295:Core/Src/printf.c **** value /= base;
731 .loc 1 295 85 discriminator 7 view .LVU197
732 006a 5FFA8CFC uxtb ip, ip
295:Core/Src/printf.c **** value /= base;
733 .loc 1 295 18 discriminator 7 view .LVU198
734 006e ACF10A0C sub ip, ip, #10
735 0072 5FFA8CFC uxtb ip, ip
736 0076 D7E7 b .L52
737 .LVL74:
738 .L56:
295:Core/Src/printf.c **** value /= base;
739 .loc 1 295 85 view .LVU199
ARM GAS /tmp/ccibzHy5.s page 20
740 0078 6127 movs r7, #97
741 007a F5E7 b .L53
742 .LVL75:
743 .L55:
295:Core/Src/printf.c **** value /= base;
744 .loc 1 295 85 view .LVU200
745 .LBE26:
284:Core/Src/printf.c ****
746 .loc 1 284 10 view .LVU201
747 007c 2746 mov r7, r4
748 .LVL76:
749 .L50:
298:Core/Src/printf.c **** }
299:Core/Src/printf.c ****
300:Core/Src/printf.c **** return _ntoa_format(out, buffer, idx, maxlen, buf, len, negative, (unsigned int)base, prec, width
750 .loc 1 300 3 is_stmt 1 view .LVU202
751 .loc 1 300 10 is_stmt 0 view .LVU203
752 007e 0696 str r6, [sp, #24]
753 0080 1A9C ldr r4, [sp, #104]
754 0082 0594 str r4, [sp, #20]
755 0084 199C ldr r4, [sp, #100]
756 0086 0494 str r4, [sp, #16]
757 0088 0395 str r5, [sp, #12]
758 008a 9DF85C40 ldrb r4, [sp, #92] @ zero_extendqisi2
759 008e 0294 str r4, [sp, #8]
760 0090 0197 str r7, [sp, #4]
761 0092 08AC add r4, sp, #32
762 0094 0094 str r4, [sp]
763 0096 FFF7FEFF bl _ntoa_format
764 .LVL77:
301:Core/Src/printf.c **** }
765 .loc 1 301 1 view .LVU204
766 009a 10B0 add sp, sp, #64
767 .LCFI12:
768 .cfi_def_cfa_offset 24
769 @ sp needed
770 009c BDE8F081 pop {r4, r5, r6, r7, r8, pc}
771 .loc 1 301 1 view .LVU205
772 .cfi_endproc
773 .LFE9:
775 .global __aeabi_uldivmod
776 .section .text._ntoa_long_long,"ax",%progbits
777 .align 1
778 .syntax unified
779 .thumb
780 .thumb_func
781 .fpu fpv5-d16
783 _ntoa_long_long:
784 .LVL78:
785 .LFB10:
302:Core/Src/printf.c ****
303:Core/Src/printf.c ****
304:Core/Src/printf.c **** // internal itoa for 'long long' type
305:Core/Src/printf.c **** #if defined(PRINTF_SUPPORT_LONG_LONG)
306:Core/Src/printf.c **** static size_t _ntoa_long_long(out_fct_type out, char* buffer, size_t idx, size_t maxlen, unsigned l
307:Core/Src/printf.c **** {
786 .loc 1 307 1 is_stmt 1 view -0
ARM GAS /tmp/ccibzHy5.s page 21
787 .cfi_startproc
788 @ args = 36, pretend = 0, frame = 48
789 @ frame_needed = 0, uses_anonymous_args = 0
790 .loc 1 307 1 is_stmt 0 view .LVU207
791 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
792 .LCFI13:
793 .cfi_def_cfa_offset 36
794 .cfi_offset 4, -36
795 .cfi_offset 5, -32
796 .cfi_offset 6, -28
797 .cfi_offset 7, -24
798 .cfi_offset 8, -20
799 .cfi_offset 9, -16
800 .cfi_offset 10, -12
801 .cfi_offset 11, -8
802 .cfi_offset 14, -4
803 0004 95B0 sub sp, sp, #84
804 .LCFI14:
805 .cfi_def_cfa_offset 120
806 0006 0990 str r0, [sp, #36]
807 0008 0A91 str r1, [sp, #40]
808 000a 0B92 str r2, [sp, #44]
809 000c 9B46 mov fp, r3
810 000e 1E9D ldr r5, [sp, #120]
811 0010 1F9E ldr r6, [sp, #124]
812 0012 229F ldr r7, [sp, #136]
813 0014 DDF88C80 ldr r8, [sp, #140]
814 0018 DDF898A0 ldr r10, [sp, #152]
308:Core/Src/printf.c **** char buf[PRINTF_NTOA_BUFFER_SIZE];
815 .loc 1 308 3 is_stmt 1 view .LVU208
309:Core/Src/printf.c **** size_t len = 0U;
816 .loc 1 309 3 view .LVU209
817 .LVL79:
310:Core/Src/printf.c ****
311:Core/Src/printf.c **** // no hash for 0 values
312:Core/Src/printf.c **** if (!value) {
818 .loc 1 312 3 view .LVU210
819 .loc 1 312 6 is_stmt 0 view .LVU211
820 001c 55EA0603 orrs r3, r5, r6
821 .LVL80:
822 .loc 1 312 6 view .LVU212
823 0020 01D1 bne .L61
313:Core/Src/printf.c **** flags &= ~FLAGS_HASH;
824 .loc 1 313 5 is_stmt 1 view .LVU213
825 .loc 1 313 11 is_stmt 0 view .LVU214
826 0022 2AF0100A bic r10, r10, #16
827 .LVL81:
828 .L61:
314:Core/Src/printf.c **** }
315:Core/Src/printf.c ****
316:Core/Src/printf.c **** // write if precision != 0 and value is != 0
317:Core/Src/printf.c **** if (!(flags & FLAGS_PRECISION) || value) {
829 .loc 1 317 3 is_stmt 1 view .LVU215
830 .loc 1 317 6 is_stmt 0 view .LVU216
831 0026 1AF48064 ands r4, r10, #1024
832 002a 23D0 beq .L67
833 .loc 1 317 34 discriminator 1 view .LVU217
ARM GAS /tmp/ccibzHy5.s page 22
834 002c 55EA0603 orrs r3, r5, r6
835 0030 34D0 beq .L68
836 0032 0024 movs r4, #0
837 0034 1EE0 b .L67
838 .LVL82:
839 .L73:
840 .LBB27:
318:Core/Src/printf.c **** do {
319:Core/Src/printf.c **** const char digit = (char)(value % base);
320:Core/Src/printf.c **** buf[len++] = digit < 10 ? '0' + digit : (flags & FLAGS_UPPERCASE ? 'A' : 'a') + digit - 10;
841 .loc 1 320 18 discriminator 1 view .LVU218
842 0036 03F13002 add r2, r3, #48
843 003a D2B2 uxtb r2, r2
844 .L65:
845 .loc 1 320 14 discriminator 8 view .LVU219
846 003c 04F10109 add r9, r4, #1
847 .LVL83:
848 .loc 1 320 18 discriminator 8 view .LVU220
849 0040 14AB add r3, sp, #80
850 .LVL84:
851 .loc 1 320 18 discriminator 8 view .LVU221
852 0042 1C44 add r4, r4, r3
853 0044 04F8202C strb r2, [r4, #-32]
321:Core/Src/printf.c **** value /= base;
854 .loc 1 321 7 is_stmt 1 discriminator 8 view .LVU222
855 .loc 1 321 13 is_stmt 0 discriminator 8 view .LVU223
856 0048 3A46 mov r2, r7
857 004a 4346 mov r3, r8
858 004c 2846 mov r0, r5
859 004e 3146 mov r1, r6
860 0050 FFF7FEFF bl __aeabi_uldivmod
861 .LVL85:
862 .loc 1 321 13 discriminator 8 view .LVU224
863 .LBE27:
322:Core/Src/printf.c **** } while (value && (len < PRINTF_NTOA_BUFFER_SIZE));
864 .loc 1 322 13 is_stmt 1 discriminator 8 view .LVU225
865 .loc 1 322 14 is_stmt 0 discriminator 8 view .LVU226
866 0054 BD42 cmp r5, r7
867 0056 76EB0803 sbcs r3, r6, r8
868 005a 2CBF ite cs
869 005c 0123 movcs r3, #1
870 005e 0023 movcc r3, #0
871 .loc 1 322 20 discriminator 8 view .LVU227
872 0060 B9F11F0F cmp r9, #31
873 0064 8CBF ite hi
874 0066 0023 movhi r3, #0
875 0068 03F00103 andls r3, r3, #1
876 .loc 1 322 5 discriminator 8 view .LVU228
877 006c C3B1 cbz r3, .L63
878 .LBB28:
320:Core/Src/printf.c **** value /= base;
879 .loc 1 320 14 view .LVU229
880 006e 4C46 mov r4, r9
321:Core/Src/printf.c **** value /= base;
881 .loc 1 321 13 view .LVU230
882 0070 0546 mov r5, r0
883 0072 0E46 mov r6, r1
ARM GAS /tmp/ccibzHy5.s page 23
884 .LVL86:
885 .L67:
321:Core/Src/printf.c **** value /= base;
886 .loc 1 321 13 view .LVU231
887 .LBE28:
318:Core/Src/printf.c **** const char digit = (char)(value % base);
888 .loc 1 318 5 is_stmt 1 view .LVU232
889 .LBB29:
319:Core/Src/printf.c **** buf[len++] = digit < 10 ? '0' + digit : (flags & FLAGS_UPPERCASE ? 'A' : 'a') + digit - 10;
890 .loc 1 319 7 view .LVU233
319:Core/Src/printf.c **** buf[len++] = digit < 10 ? '0' + digit : (flags & FLAGS_UPPERCASE ? 'A' : 'a') + digit - 10;
891 .loc 1 319 39 is_stmt 0 view .LVU234
892 0074 3A46 mov r2, r7
893 0076 4346 mov r3, r8
894 0078 2846 mov r0, r5
895 007a 3146 mov r1, r6
896 007c FFF7FEFF bl __aeabi_uldivmod
897 .LVL87:
319:Core/Src/printf.c **** buf[len++] = digit < 10 ? '0' + digit : (flags & FLAGS_UPPERCASE ? 'A' : 'a') + digit - 10;
898 .loc 1 319 18 view .LVU235
899 0080 D3B2 uxtb r3, r2
900 .LVL88:
320:Core/Src/printf.c **** value /= base;
901 .loc 1 320 7 is_stmt 1 view .LVU236
320:Core/Src/printf.c **** value /= base;
902 .loc 1 320 18 is_stmt 0 view .LVU237
903 0082 092B cmp r3, #9
904 0084 D7D9 bls .L73
320:Core/Src/printf.c **** value /= base;
905 .loc 1 320 85 discriminator 2 view .LVU238
906 0086 1AF0200F tst r10, #32
907 008a 05D0 beq .L69
320:Core/Src/printf.c **** value /= base;
908 .loc 1 320 85 view .LVU239
909 008c 4122 movs r2, #65
910 .L66:
320:Core/Src/printf.c **** value /= base;
911 .loc 1 320 85 discriminator 7 view .LVU240
912 008e 1A44 add r2, r2, r3
913 0090 D2B2 uxtb r2, r2
320:Core/Src/printf.c **** value /= base;
914 .loc 1 320 18 discriminator 7 view .LVU241
915 0092 0A3A subs r2, r2, #10
916 0094 D2B2 uxtb r2, r2
917 0096 D1E7 b .L65
918 .L69:
320:Core/Src/printf.c **** value /= base;
919 .loc 1 320 85 view .LVU242
920 0098 6122 movs r2, #97
921 009a F8E7 b .L66
922 .LVL89:
923 .L68:
320:Core/Src/printf.c **** value /= base;
924 .loc 1 320 85 view .LVU243
925 .LBE29:
309:Core/Src/printf.c ****
926 .loc 1 309 10 view .LVU244
ARM GAS /tmp/ccibzHy5.s page 24
927 009c 4FF00009 mov r9, #0
928 .LVL90:
929 .L63:
323:Core/Src/printf.c **** }
324:Core/Src/printf.c ****
325:Core/Src/printf.c **** return _ntoa_format(out, buffer, idx, maxlen, buf, len, negative, (unsigned int)base, prec, width
930 .loc 1 325 3 is_stmt 1 view .LVU245
931 .loc 1 325 10 is_stmt 0 view .LVU246
932 00a0 CDF818A0 str r10, [sp, #24]
933 00a4 259B ldr r3, [sp, #148]
934 00a6 0593 str r3, [sp, #20]
935 00a8 249B ldr r3, [sp, #144]
936 00aa 0493 str r3, [sp, #16]
937 00ac 0397 str r7, [sp, #12]
938 00ae 9DF88030 ldrb r3, [sp, #128] @ zero_extendqisi2
939 00b2 0293 str r3, [sp, #8]
940 00b4 CDF80490 str r9, [sp, #4]
941 00b8 0CAB add r3, sp, #48
942 00ba 0093 str r3, [sp]
943 00bc 5B46 mov r3, fp
944 00be 0B9A ldr r2, [sp, #44]
945 00c0 0A99 ldr r1, [sp, #40]
946 00c2 0998 ldr r0, [sp, #36]
947 00c4 FFF7FEFF bl _ntoa_format
948 .LVL91:
326:Core/Src/printf.c **** }
949 .loc 1 326 1 view .LVU247
950 00c8 15B0 add sp, sp, #84
951 .LCFI15:
952 .cfi_def_cfa_offset 36
953 @ sp needed
954 00ca BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
955 .loc 1 326 1 view .LVU248
956 .cfi_endproc
957 .LFE10:
959 .section .text._etoa,"ax",%progbits
960 .align 1
961 .syntax unified
962 .thumb
963 .thumb_func
964 .fpu fpv5-d16
966 _etoa:
967 .LVL92:
968 .LFB12:
327:Core/Src/printf.c **** #endif // PRINTF_SUPPORT_LONG_LONG
328:Core/Src/printf.c ****
329:Core/Src/printf.c ****
330:Core/Src/printf.c **** #if defined(PRINTF_SUPPORT_FLOAT)
331:Core/Src/printf.c ****
332:Core/Src/printf.c **** #if defined(PRINTF_SUPPORT_EXPONENTIAL)
333:Core/Src/printf.c **** // forward declaration so that _ftoa can switch to exp notation for values > PRINTF_MAX_FLOAT
334:Core/Src/printf.c **** static size_t _etoa(out_fct_type out, char* buffer, size_t idx, size_t maxlen, double value, unsign
335:Core/Src/printf.c **** #endif
336:Core/Src/printf.c ****
337:Core/Src/printf.c ****
338:Core/Src/printf.c **** // internal ftoa for fixed decimal floating point
339:Core/Src/printf.c **** static size_t _ftoa(out_fct_type out, char* buffer, size_t idx, size_t maxlen, double value, unsign
ARM GAS /tmp/ccibzHy5.s page 25
340:Core/Src/printf.c **** {
341:Core/Src/printf.c **** char buf[PRINTF_FTOA_BUFFER_SIZE];
342:Core/Src/printf.c **** size_t len = 0U;
343:Core/Src/printf.c **** double diff = 0.0;
344:Core/Src/printf.c ****
345:Core/Src/printf.c **** // powers of 10
346:Core/Src/printf.c **** static const double pow10[] = { 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000, 100000000, 10
347:Core/Src/printf.c ****
348:Core/Src/printf.c **** // test for special values
349:Core/Src/printf.c **** if (value != value)
350:Core/Src/printf.c **** return _out_rev(out, buffer, idx, maxlen, "nan", 3, width, flags);
351:Core/Src/printf.c **** if (value < -DBL_MAX)
352:Core/Src/printf.c **** return _out_rev(out, buffer, idx, maxlen, "fni-", 4, width, flags);
353:Core/Src/printf.c **** if (value > DBL_MAX)
354:Core/Src/printf.c **** return _out_rev(out, buffer, idx, maxlen, (flags & FLAGS_PLUS) ? "fni+" : "fni", (flags & FLAGS
355:Core/Src/printf.c ****
356:Core/Src/printf.c **** // test for very large values
357:Core/Src/printf.c **** // standard printf behavior is to print EVERY whole number digit -- which could be 100s of charac
358:Core/Src/printf.c **** if ((value > PRINTF_MAX_FLOAT) || (value < -PRINTF_MAX_FLOAT)) {
359:Core/Src/printf.c **** #if defined(PRINTF_SUPPORT_EXPONENTIAL)
360:Core/Src/printf.c **** return _etoa(out, buffer, idx, maxlen, value, prec, width, flags);
361:Core/Src/printf.c **** #else
362:Core/Src/printf.c **** return 0U;
363:Core/Src/printf.c **** #endif
364:Core/Src/printf.c **** }
365:Core/Src/printf.c ****
366:Core/Src/printf.c **** // test for negative
367:Core/Src/printf.c **** bool negative = false;
368:Core/Src/printf.c **** if (value < 0) {
369:Core/Src/printf.c **** negative = true;
370:Core/Src/printf.c **** value = 0 - value;
371:Core/Src/printf.c **** }
372:Core/Src/printf.c ****
373:Core/Src/printf.c **** // set default precision, if not set explicitly
374:Core/Src/printf.c **** if (!(flags & FLAGS_PRECISION)) {
375:Core/Src/printf.c **** prec = PRINTF_DEFAULT_FLOAT_PRECISION;
376:Core/Src/printf.c **** }
377:Core/Src/printf.c **** // limit precision to 9, cause a prec >= 10 can lead to overflow errors
378:Core/Src/printf.c **** while ((len < PRINTF_FTOA_BUFFER_SIZE) && (prec > 9U)) {
379:Core/Src/printf.c **** buf[len++] = '0';
380:Core/Src/printf.c **** prec--;
381:Core/Src/printf.c **** }
382:Core/Src/printf.c ****
383:Core/Src/printf.c **** int whole = (int)value;
384:Core/Src/printf.c **** double tmp = (value - whole) * pow10[prec];
385:Core/Src/printf.c **** unsigned long frac = (unsigned long)tmp;
386:Core/Src/printf.c **** diff = tmp - frac;
387:Core/Src/printf.c ****
388:Core/Src/printf.c **** if (diff > 0.5) {
389:Core/Src/printf.c **** ++frac;
390:Core/Src/printf.c **** // handle rollover, e.g. case 0.99 with prec 1 is 1.0
391:Core/Src/printf.c **** if (frac >= pow10[prec]) {
392:Core/Src/printf.c **** frac = 0;
393:Core/Src/printf.c **** ++whole;
394:Core/Src/printf.c **** }
395:Core/Src/printf.c **** }
396:Core/Src/printf.c **** else if (diff < 0.5) {
ARM GAS /tmp/ccibzHy5.s page 26
397:Core/Src/printf.c **** }
398:Core/Src/printf.c **** else if ((frac == 0U) || (frac & 1U)) {
399:Core/Src/printf.c **** // if halfway, round up if odd OR if last digit is 0
400:Core/Src/printf.c **** ++frac;
401:Core/Src/printf.c **** }
402:Core/Src/printf.c ****
403:Core/Src/printf.c **** if (prec == 0U) {
404:Core/Src/printf.c **** diff = value - (double)whole;
405:Core/Src/printf.c **** if ((!(diff < 0.5) || (diff > 0.5)) && (whole & 1)) {
406:Core/Src/printf.c **** // exactly 0.5 and ODD, then round up
407:Core/Src/printf.c **** // 1.5 -> 2, but 2.5 -> 2
408:Core/Src/printf.c **** ++whole;
409:Core/Src/printf.c **** }
410:Core/Src/printf.c **** }
411:Core/Src/printf.c **** else {
412:Core/Src/printf.c **** unsigned int count = prec;
413:Core/Src/printf.c **** // now do fractional part, as an unsigned number
414:Core/Src/printf.c **** while (len < PRINTF_FTOA_BUFFER_SIZE) {
415:Core/Src/printf.c **** --count;
416:Core/Src/printf.c **** buf[len++] = (char)(48U + (frac % 10U));
417:Core/Src/printf.c **** if (!(frac /= 10U)) {
418:Core/Src/printf.c **** break;
419:Core/Src/printf.c **** }
420:Core/Src/printf.c **** }
421:Core/Src/printf.c **** // add extra 0s
422:Core/Src/printf.c **** while ((len < PRINTF_FTOA_BUFFER_SIZE) && (count-- > 0U)) {
423:Core/Src/printf.c **** buf[len++] = '0';
424:Core/Src/printf.c **** }
425:Core/Src/printf.c **** if (len < PRINTF_FTOA_BUFFER_SIZE) {
426:Core/Src/printf.c **** // add decimal
427:Core/Src/printf.c **** buf[len++] = '.';
428:Core/Src/printf.c **** }
429:Core/Src/printf.c **** }
430:Core/Src/printf.c ****
431:Core/Src/printf.c **** // do whole part, number is reversed
432:Core/Src/printf.c **** while (len < PRINTF_FTOA_BUFFER_SIZE) {
433:Core/Src/printf.c **** buf[len++] = (char)(48 + (whole % 10));
434:Core/Src/printf.c **** if (!(whole /= 10)) {
435:Core/Src/printf.c **** break;
436:Core/Src/printf.c **** }
437:Core/Src/printf.c **** }
438:Core/Src/printf.c ****
439:Core/Src/printf.c **** // pad leading zeros
440:Core/Src/printf.c **** if (!(flags & FLAGS_LEFT) && (flags & FLAGS_ZEROPAD)) {
441:Core/Src/printf.c **** if (width && (negative || (flags & (FLAGS_PLUS | FLAGS_SPACE)))) {
442:Core/Src/printf.c **** width--;
443:Core/Src/printf.c **** }
444:Core/Src/printf.c **** while ((len < width) && (len < PRINTF_FTOA_BUFFER_SIZE)) {
445:Core/Src/printf.c **** buf[len++] = '0';
446:Core/Src/printf.c **** }
447:Core/Src/printf.c **** }
448:Core/Src/printf.c ****
449:Core/Src/printf.c **** if (len < PRINTF_FTOA_BUFFER_SIZE) {
450:Core/Src/printf.c **** if (negative) {
451:Core/Src/printf.c **** buf[len++] = '-';
452:Core/Src/printf.c **** }
453:Core/Src/printf.c **** else if (flags & FLAGS_PLUS) {
ARM GAS /tmp/ccibzHy5.s page 27
454:Core/Src/printf.c **** buf[len++] = '+'; // ignore the space if the '+' exists
455:Core/Src/printf.c **** }
456:Core/Src/printf.c **** else if (flags & FLAGS_SPACE) {
457:Core/Src/printf.c **** buf[len++] = ' ';
458:Core/Src/printf.c **** }
459:Core/Src/printf.c **** }
460:Core/Src/printf.c ****
461:Core/Src/printf.c **** return _out_rev(out, buffer, idx, maxlen, buf, len, width, flags);
462:Core/Src/printf.c **** }
463:Core/Src/printf.c ****
464:Core/Src/printf.c ****
465:Core/Src/printf.c **** #if defined(PRINTF_SUPPORT_EXPONENTIAL)
466:Core/Src/printf.c **** // internal ftoa variant for exponential floating-point type, contributed by Martijn Jasperse <m.ja
467:Core/Src/printf.c **** static size_t _etoa(out_fct_type out, char* buffer, size_t idx, size_t maxlen, double value, unsign
468:Core/Src/printf.c **** {
969 .loc 1 468 1 is_stmt 1 view -0
970 .cfi_startproc
971 @ args = 12, pretend = 0, frame = 8
972 @ frame_needed = 0, uses_anonymous_args = 0
973 .loc 1 468 1 is_stmt 0 view .LVU250
974 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
975 .LCFI16:
976 .cfi_def_cfa_offset 36
977 .cfi_offset 4, -36
978 .cfi_offset 5, -32
979 .cfi_offset 6, -28
980 .cfi_offset 7, -24
981 .cfi_offset 8, -20
982 .cfi_offset 9, -16
983 .cfi_offset 10, -12
984 .cfi_offset 11, -8
985 .cfi_offset 14, -4
986 0004 89B0 sub sp, sp, #36
987 .LCFI17:
988 .cfi_def_cfa_offset 72
989 0006 0446 mov r4, r0
990 0008 0D46 mov r5, r1
991 000a 1746 mov r7, r2
992 000c 1E46 mov r6, r3
993 000e 1299 ldr r1, [sp, #72]
994 .LVL93:
995 .loc 1 468 1 view .LVU251
996 0010 DDF84CA0 ldr r10, [sp, #76]
997 0014 DDF85090 ldr r9, [sp, #80]
469:Core/Src/printf.c **** // check for NaN and special values
470:Core/Src/printf.c **** if ((value != value) || (value > DBL_MAX) || (value < -DBL_MAX)) {
998 .loc 1 470 3 is_stmt 1 view .LVU252
999 .loc 1 470 6 is_stmt 0 view .LVU253
1000 0018 B4EE400B vcmp.f64 d0, d0
1001 001c F1EE10FA vmrs APSR_nzcv, FPSCR
1002 0020 40F0AC80 bne .L75
1003 .loc 1 470 24 discriminator 1 view .LVU254
1004 0024 9FED967B vldr.64 d7, .L116
1005 0028 B4EEC70B vcmpe.f64 d0, d7
1006 002c F1EE10FA vmrs APSR_nzcv, FPSCR
1007 0030 00F3A480 bgt .L75
1008 .loc 1 470 45 discriminator 2 view .LVU255
ARM GAS /tmp/ccibzHy5.s page 28
1009 0034 9FED947B vldr.64 d7, .L116+8
1010 0038 B4EEC70B vcmpe.f64 d0, d7
1011 003c F1EE10FA vmrs APSR_nzcv, FPSCR
1012 0040 00F19C80 bmi .L75
471:Core/Src/printf.c **** return _ftoa(out, buffer, idx, maxlen, value, prec, width, flags);
472:Core/Src/printf.c **** }
473:Core/Src/printf.c ****
474:Core/Src/printf.c **** // determine the sign
475:Core/Src/printf.c **** const bool negative = value < 0;
1013 .loc 1 475 3 is_stmt 1 view .LVU256
1014 .LVL94:
476:Core/Src/printf.c **** if (negative) {
1015 .loc 1 476 3 view .LVU257
1016 .loc 1 476 6 is_stmt 0 view .LVU258
1017 0044 B5EEC00B vcmpe.f64 d0, #0
1018 0048 F1EE10FA vmrs APSR_nzcv, FPSCR
1019 004c 00F1A480 bmi .L114
1020 0050 B0EE405B vmov.f64 d5, d0
1021 .LVL95:
1022 .L79:
477:Core/Src/printf.c **** value = -value;
478:Core/Src/printf.c **** }
479:Core/Src/printf.c ****
480:Core/Src/printf.c **** // default precision
481:Core/Src/printf.c **** if (!(flags & FLAGS_PRECISION)) {
1023 .loc 1 481 3 is_stmt 1 view .LVU259
1024 .loc 1 481 6 is_stmt 0 view .LVU260
1025 0054 19F48060 ands r0, r9, #1024
1026 .LVL96:
1027 .loc 1 481 6 view .LVU261
1028 0058 00D1 bne .L81
482:Core/Src/printf.c **** prec = PRINTF_DEFAULT_FLOAT_PRECISION;
1029 .loc 1 482 10 view .LVU262
1030 005a 0621 movs r1, #6
1031 .L81:
1032 .LVL97:
483:Core/Src/printf.c **** }
484:Core/Src/printf.c ****
485:Core/Src/printf.c **** // determine the decimal exponent
486:Core/Src/printf.c **** // based on the algorithm by David Gay (https://www.ampl.com/netlib/fp/dtoa.c)
487:Core/Src/printf.c **** union {
1033 .loc 1 487 3 is_stmt 1 view .LVU263
488:Core/Src/printf.c **** uint64_t U;
489:Core/Src/printf.c **** double F;
490:Core/Src/printf.c **** } conv;
491:Core/Src/printf.c ****
492:Core/Src/printf.c **** conv.F = value;
1034 .loc 1 492 3 view .LVU264
493:Core/Src/printf.c **** int exp2 = (int)((conv.U >> 52U) & 0x07FFU) - 1023; // effectively log2
1035 .loc 1 493 3 view .LVU265
1036 005c 15EE902A vmov r2, s11 @ int
1037 .LVL98:
1038 .loc 1 493 14 is_stmt 0 view .LVU266
1039 0060 C2F30A53 ubfx r3, r2, #20, #11
1040 .LVL99:
1041 .loc 1 493 7 view .LVU267
1042 0064 A3F2FF33 subw r3, r3, #1023
ARM GAS /tmp/ccibzHy5.s page 29
1043 0068 07EE103A vmov s14, r3 @ int
1044 .LVL100:
494:Core/Src/printf.c **** conv.U = (conv.U & ((1ULL << 52U) - 1U)) | (1023ULL << 52U); // drop the exponent so conv.F is n
1045 .loc 1 494 3 is_stmt 1 view .LVU268
1046 .loc 1 494 20 is_stmt 0 view .LVU269
1047 006c C2F3130E ubfx lr, r2, #0, #20
1048 .loc 1 494 44 view .LVU270
1049 0070 15EE102A vmov r2, s10 @ int
1050 0074 4EF07F53 orr r3, lr, #1069547520
1051 .LVL101:
1052 .loc 1 494 44 view .LVU271
1053 0078 43F44013 orr r3, r3, #3145728
495:Core/Src/printf.c **** // now approximate log10 from the log2 integer part and an expansion of ln around 1.5
496:Core/Src/printf.c **** int expval = (int)(0.1760912590558 + exp2 * 0.301029995663981 + (conv.F - 1.5) * 0.28952965460216
1054 .loc 1 496 3 is_stmt 1 view .LVU272
1055 .loc 1 496 45 is_stmt 0 view .LVU273
1056 007c B8EEC77B vcvt.f64.s32 d7, s14
1057 .LVL102:
1058 .loc 1 496 38 view .LVU274
1059 0080 9FED834B vldr.64 d4, .L116+16
1060 0084 9FED846B vldr.64 d6, .L116+24
1061 0088 07EE046B vmla.f64 d6, d7, d4
1062 .loc 1 496 75 view .LVU275
1063 008c B7EE087B vmov.f64 d7, #1.5e+0
1064 0090 43EC142B vmov d4, r2, r3
1065 0094 34EE477B vsub.f64 d7, d4, d7
1066 .loc 1 496 65 view .LVU276
1067 0098 9FED814B vldr.64 d4, .L116+32
1068 009c 07EE046B vmla.f64 d6, d7, d4
1069 .loc 1 496 7 view .LVU277
1070 00a0 FDEEC67B vcvt.s32.f64 s15, d6
1071 00a4 17EE908A vmov r8, s15 @ int
1072 .LVL103:
497:Core/Src/printf.c **** // now we want to compute 10^expval but we want to be sure it won't overflow
498:Core/Src/printf.c **** exp2 = (int)(expval * 3.321928094887362 + 0.5);
1073 .loc 1 498 3 is_stmt 1 view .LVU278
1074 .loc 1 498 23 is_stmt 0 view .LVU279
1075 00a8 B8EEE74B vcvt.f64.s32 d4, s15
1076 .loc 1 498 43 view .LVU280
1077 00ac 9FED7E6B vldr.64 d6, .L116+40
1078 00b0 B6EE007B vmov.f64 d7, #5.0e-1
1079 00b4 04EE067B vmla.f64 d7, d4, d6
1080 .loc 1 498 8 view .LVU281
1081 00b8 FDEEC76B vcvt.s32.f64 s13, d7
1082 .LVL104:
499:Core/Src/printf.c **** const double z = expval * 2.302585092994046 - exp2 * 0.6931471805599453;
1083 .loc 1 499 3 is_stmt 1 view .LVU282
1084 .loc 1 499 55 is_stmt 0 view .LVU283
1085 00bc B8EEE67B vcvt.f64.s32 d7, s13
1086 00c0 9FED7B3B vldr.64 d3, .L116+48
1087 00c4 27EE037B vmul.f64 d7, d7, d3
1088 .loc 1 499 16 view .LVU284
1089 00c8 9FED7B3B vldr.64 d3, .L116+56
1090 00cc 14EE037B vnmls.f64 d7, d4, d3
1091 .LVL105:
500:Core/Src/printf.c **** const double z2 = z * z;
1092 .loc 1 500 3 is_stmt 1 view .LVU285
ARM GAS /tmp/ccibzHy5.s page 30
1093 .loc 1 500 16 is_stmt 0 view .LVU286
1094 00d0 27EE074B vmul.f64 d4, d7, d7
1095 .LVL106:
501:Core/Src/printf.c **** conv.U = (uint64_t)(exp2 + 1023) << 52U;
1096 .loc 1 501 3 is_stmt 1 view .LVU287
1097 .loc 1 501 28 is_stmt 0 view .LVU288
1098 00d4 16EE903A vmov r3, s13 @ int
1099 00d8 03F2FF33 addw r3, r3, #1023
1100 .loc 1 501 36 view .LVU289
1101 00dc 4FF0000B mov fp, #0
1102 00e0 4FEA035C lsl ip, r3, #20
502:Core/Src/printf.c **** // compute exp(z) using continued fractions, see https://en.wikipedia.org/wiki/Exponential_functi
503:Core/Src/printf.c **** conv.F *= 1 + 2 * z / (2 - z + (z2 / (6 + (z2 / (10 + z2 / 14)))));
1103 .loc 1 503 3 is_stmt 1 view .LVU290
1104 .loc 1 503 19 is_stmt 0 view .LVU291
1105 00e4 37EE073B vadd.f64 d3, d7, d7
1106 .loc 1 503 28 view .LVU292
1107 00e8 B0EE006B vmov.f64 d6, #2.0e+0
1108 00ec 36EE477B vsub.f64 d7, d6, d7
1109 .LVL107:
1110 .loc 1 503 60 view .LVU293
1111 00f0 B2EE0C6B vmov.f64 d6, #1.4e+1
1112 00f4 84EE062B vdiv.f64 d2, d4, d6
1113 .loc 1 503 55 view .LVU294
1114 00f8 B2EE046B vmov.f64 d6, #1.0e+1
1115 00fc 32EE062B vadd.f64 d2, d2, d6
1116 .loc 1 503 49 view .LVU295
1117 0100 84EE026B vdiv.f64 d6, d4, d2
1118 .loc 1 503 43 view .LVU296
1119 0104 B1EE082B vmov.f64 d2, #6.0e+0
1120 0108 36EE026B vadd.f64 d6, d6, d2
1121 .loc 1 503 38 view .LVU297
1122 010c 84EE062B vdiv.f64 d2, d4, d6
1123 .loc 1 503 32 view .LVU298
1124 0110 37EE027B vadd.f64 d7, d7, d2
1125 .loc 1 503 23 view .LVU299
1126 0114 83EE076B vdiv.f64 d6, d3, d7
1127 .loc 1 503 15 view .LVU300
1128 0118 B7EE007B vmov.f64 d7, #1.0e+0
1129 011c 36EE077B vadd.f64 d7, d6, d7
1130 .loc 1 503 10 view .LVU301
1131 0120 4CEC16BB vmov d6, fp, ip
1132 0124 27EE067B vmul.f64 d7, d7, d6
1133 0128 B0EE476B vmov.f64 d6, d7 @ int
1134 .LVL108:
504:Core/Src/printf.c **** // correct for rounding errors
505:Core/Src/printf.c **** if (value < conv.F) {
1135 .loc 1 505 3 is_stmt 1 view .LVU302
1136 .loc 1 505 6 is_stmt 0 view .LVU303
1137 012c B4EEC57B vcmpe.f64 d7, d5
1138 0130 F1EE10FA vmrs APSR_nzcv, FPSCR
1139 0134 05DD ble .L82
506:Core/Src/printf.c **** expval--;
1140 .loc 1 506 5 is_stmt 1 view .LVU304
1141 .loc 1 506 11 is_stmt 0 view .LVU305
1142 0136 08F1FF38 add r8, r8, #-1
1143 .LVL109:
ARM GAS /tmp/ccibzHy5.s page 31
507:Core/Src/printf.c **** conv.F /= 10;
1144 .loc 1 507 5 is_stmt 1 view .LVU306
1145 .loc 1 507 12 is_stmt 0 view .LVU307
1146 013a B2EE044B vmov.f64 d4, #1.0e+1
1147 .LVL110:
1148 .loc 1 507 12 view .LVU308
1149 013e 87EE046B vdiv.f64 d6, d7, d4
1150 .L82:
508:Core/Src/printf.c **** }
509:Core/Src/printf.c ****
510:Core/Src/printf.c **** // the exponent format is "%+03d" and largest value is "307", so set aside 4-5 characters
511:Core/Src/printf.c **** unsigned int minwidth = ((expval < 100) && (expval > -100)) ? 4U : 5U;
1151 .loc 1 511 3 is_stmt 1 view .LVU309
1152 .loc 1 511 43 is_stmt 0 view .LVU310
1153 0142 08F16303 add r3, r8, #99
1154 .loc 1 511 68 view .LVU311
1155 0146 C62B cmp r3, #198
1156 0148 29D8 bhi .L100
1157 .loc 1 511 68 view .LVU312
1158 014a 4FF0040B mov fp, #4
1159 .L84:
1160 .LVL111:
512:Core/Src/printf.c ****
513:Core/Src/printf.c **** // in "%g" mode, "prec" is the number of *significant figures* not decimals
514:Core/Src/printf.c **** if (flags & FLAGS_ADAPT_EXP) {
1161 .loc 1 514 3 is_stmt 1 discriminator 4 view .LVU313
1162 .loc 1 514 6 is_stmt 0 discriminator 4 view .LVU314
1163 014e 19F4006F tst r9, #2048
1164 0152 2DD0 beq .L85
515:Core/Src/printf.c **** // do we want to fall-back to "%f" mode?
516:Core/Src/printf.c **** if ((value >= 1e-4) && (value < 1e6)) {
1165 .loc 1 516 5 is_stmt 1 view .LVU315
1166 .loc 1 516 8 is_stmt 0 view .LVU316
1167 0154 9FED5A7B vldr.64 d7, .L116+64
1168 0158 B4EEC75B vcmpe.f64 d5, d7
1169 015c F1EE10FA vmrs APSR_nzcv, FPSCR
1170 0160 2BDB blt .L86
1171 .loc 1 516 25 discriminator 1 view .LVU317
1172 0162 9FED597B vldr.64 d7, .L116+72
1173 0166 B4EEC75B vcmpe.f64 d5, d7
1174 016a F1EE10FA vmrs APSR_nzcv, FPSCR
1175 016e 24D5 bpl .L86
517:Core/Src/printf.c **** if ((int)prec > expval) {
1176 .loc 1 517 7 is_stmt 1 view .LVU318
1177 .loc 1 517 10 is_stmt 0 view .LVU319
1178 0170 4145 cmp r1, r8
1179 0172 17DD ble .L101
518:Core/Src/printf.c **** prec = (unsigned)((int)prec - expval - 1);
1180 .loc 1 518 9 is_stmt 1 view .LVU320
1181 .loc 1 518 37 is_stmt 0 view .LVU321
1182 0174 A1EB0801 sub r1, r1, r8
1183 .LVL112:
1184 .loc 1 518 46 view .LVU322
1185 0178 0139 subs r1, r1, #1
1186 .LVL113:
1187 .loc 1 518 46 view .LVU323
1188 017a 14E0 b .L89
ARM GAS /tmp/ccibzHy5.s page 32
1189 .LVL114:
1190 .L75:
471:Core/Src/printf.c **** }
1191 .loc 1 471 5 is_stmt 1 view .LVU324
471:Core/Src/printf.c **** }
1192 .loc 1 471 12 is_stmt 0 view .LVU325
1193 017c CDF80890 str r9, [sp, #8]
1194 0180 CDF804A0 str r10, [sp, #4]
1195 0184 0091 str r1, [sp]
1196 0186 3346 mov r3, r6
1197 .LVL115:
471:Core/Src/printf.c **** }
1198 .loc 1 471 12 view .LVU326
1199 0188 3A46 mov r2, r7
1200 .LVL116:
471:Core/Src/printf.c **** }
1201 .loc 1 471 12 view .LVU327
1202 018a 2946 mov r1, r5
1203 018c 2046 mov r0, r4
1204 .LVL117:
471:Core/Src/printf.c **** }
1205 .loc 1 471 12 view .LVU328
1206 018e FFF7FEFF bl _ftoa
1207 .LVL118:
1208 .L78:
519:Core/Src/printf.c **** }
520:Core/Src/printf.c **** else {
521:Core/Src/printf.c **** prec = 0;
522:Core/Src/printf.c **** }
523:Core/Src/printf.c **** flags |= FLAGS_PRECISION; // make sure _ftoa respects precision
524:Core/Src/printf.c **** // no characters in exponent
525:Core/Src/printf.c **** minwidth = 0U;
526:Core/Src/printf.c **** expval = 0;
527:Core/Src/printf.c **** }
528:Core/Src/printf.c **** else {
529:Core/Src/printf.c **** // we use one sigfig for the whole part
530:Core/Src/printf.c **** if ((prec > 0) && (flags & FLAGS_PRECISION)) {
531:Core/Src/printf.c **** --prec;
532:Core/Src/printf.c **** }
533:Core/Src/printf.c **** }
534:Core/Src/printf.c **** }
535:Core/Src/printf.c ****
536:Core/Src/printf.c **** // will everything fit?
537:Core/Src/printf.c **** unsigned int fwidth = width;
538:Core/Src/printf.c **** if (width > minwidth) {
539:Core/Src/printf.c **** // we didn't fall-back so subtract the characters required for the exponent
540:Core/Src/printf.c **** fwidth -= minwidth;
541:Core/Src/printf.c **** } else {
542:Core/Src/printf.c **** // not enough characters, so go back to default sizing
543:Core/Src/printf.c **** fwidth = 0U;
544:Core/Src/printf.c **** }
545:Core/Src/printf.c **** if ((flags & FLAGS_LEFT) && minwidth) {
546:Core/Src/printf.c **** // if we're padding on the right, DON'T pad the floating part
547:Core/Src/printf.c **** fwidth = 0U;
548:Core/Src/printf.c **** }
549:Core/Src/printf.c ****
550:Core/Src/printf.c **** // rescale the float value
ARM GAS /tmp/ccibzHy5.s page 33
551:Core/Src/printf.c **** if (expval) {
552:Core/Src/printf.c **** value /= conv.F;
553:Core/Src/printf.c **** }
554:Core/Src/printf.c ****
555:Core/Src/printf.c **** // output the floating part
556:Core/Src/printf.c **** const size_t start_idx = idx;
557:Core/Src/printf.c **** idx = _ftoa(out, buffer, idx, maxlen, negative ? -value : value, prec, fwidth, flags & ~FLAGS_ADA
558:Core/Src/printf.c ****
559:Core/Src/printf.c **** // output the exponent part
560:Core/Src/printf.c **** if (minwidth) {
561:Core/Src/printf.c **** // output the exponential symbol
562:Core/Src/printf.c **** out((flags & FLAGS_UPPERCASE) ? 'E' : 'e', buffer, idx++, maxlen);
563:Core/Src/printf.c **** // output the exponent value
564:Core/Src/printf.c **** idx = _ntoa_long(out, buffer, idx, maxlen, (expval < 0) ? -expval : expval, expval < 0, 10, 0,
565:Core/Src/printf.c **** // might need to right-pad spaces
566:Core/Src/printf.c **** if (flags & FLAGS_LEFT) {
567:Core/Src/printf.c **** while (idx - start_idx < width) out(' ', buffer, idx++, maxlen);
568:Core/Src/printf.c **** }
569:Core/Src/printf.c **** }
570:Core/Src/printf.c **** return idx;
571:Core/Src/printf.c **** }
1209 .loc 1 571 1 view .LVU329
1210 0192 09B0 add sp, sp, #36
1211 .LCFI18:
1212 .cfi_remember_state
1213 .cfi_def_cfa_offset 36
1214 @ sp needed
1215 0194 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
1216 .LVL119:
1217 .L114:
1218 .LCFI19:
1219 .cfi_restore_state
477:Core/Src/printf.c **** }
1220 .loc 1 477 5 is_stmt 1 view .LVU330
477:Core/Src/printf.c **** }
1221 .loc 1 477 11 is_stmt 0 view .LVU331
1222 0198 B1EE405B vneg.f64 d5, d0
1223 .LVL120:
477:Core/Src/printf.c **** }
1224 .loc 1 477 11 view .LVU332
1225 019c 5AE7 b .L79
1226 .LVL121:
1227 .L100:
511:Core/Src/printf.c ****
1228 .loc 1 511 68 view .LVU333
1229 019e 4FF0050B mov fp, #5
1230 01a2 D4E7 b .L84
1231 .LVL122:
1232 .L101:
521:Core/Src/printf.c **** }
1233 .loc 1 521 14 view .LVU334
1234 01a4 0021 movs r1, #0
1235 .LVL123:
1236 .L89:
523:Core/Src/printf.c **** // no characters in exponent
1237 .loc 1 523 7 is_stmt 1 view .LVU335
523:Core/Src/printf.c **** // no characters in exponent
ARM GAS /tmp/ccibzHy5.s page 34
1238 .loc 1 523 13 is_stmt 0 view .LVU336
1239 01a6 49F48069 orr r9, r9, #1024
1240 .LVL124:
525:Core/Src/printf.c **** expval = 0;
1241 .loc 1 525 7 is_stmt 1 view .LVU337
526:Core/Src/printf.c **** }
1242 .loc 1 526 7 view .LVU338
525:Core/Src/printf.c **** expval = 0;
1243 .loc 1 525 16 is_stmt 0 view .LVU339
1244 01aa 4FF0000B mov fp, #0
526:Core/Src/printf.c **** }
1245 .loc 1 526 16 view .LVU340
1246 01ae D846 mov r8, fp
1247 .LVL125:
1248 .L85:
537:Core/Src/printf.c **** if (width > minwidth) {
1249 .loc 1 537 3 is_stmt 1 view .LVU341
538:Core/Src/printf.c **** // we didn't fall-back so subtract the characters required for the exponent
1250 .loc 1 538 3 view .LVU342
538:Core/Src/printf.c **** // we didn't fall-back so subtract the characters required for the exponent
1251 .loc 1 538 6 is_stmt 0 view .LVU343
1252 01b0 D345 cmp fp, r10
1253 01b2 08D2 bcs .L102
540:Core/Src/printf.c **** } else {
1254 .loc 1 540 5 is_stmt 1 view .LVU344
540:Core/Src/printf.c **** } else {
1255 .loc 1 540 12 is_stmt 0 view .LVU345
1256 01b4 AAEB0B03 sub r3, r10, fp
1257 .LVL126:
540:Core/Src/printf.c **** } else {
1258 .loc 1 540 12 view .LVU346
1259 01b8 06E0 b .L90
1260 .LVL127:
1261 .L86:
530:Core/Src/printf.c **** --prec;
1262 .loc 1 530 7 is_stmt 1 view .LVU347
530:Core/Src/printf.c **** --prec;
1263 .loc 1 530 10 is_stmt 0 view .LVU348
1264 01ba 0029 cmp r1, #0
1265 01bc F8D0 beq .L85
530:Core/Src/printf.c **** --prec;
1266 .loc 1 530 22 discriminator 1 view .LVU349
1267 01be 0028 cmp r0, #0
1268 01c0 F6D0 beq .L85
531:Core/Src/printf.c **** }
1269 .loc 1 531 9 is_stmt 1 view .LVU350
1270 01c2 0139 subs r1, r1, #1
1271 .LVL128:
531:Core/Src/printf.c **** }
1272 .loc 1 531 9 is_stmt 0 view .LVU351
1273 01c4 F4E7 b .L85
1274 .LVL129:
1275 .L102:
543:Core/Src/printf.c **** }
1276 .loc 1 543 12 view .LVU352
1277 01c6 0023 movs r3, #0
1278 .LVL130:
ARM GAS /tmp/ccibzHy5.s page 35
1279 .L90:
545:Core/Src/printf.c **** // if we're padding on the right, DON'T pad the floating part
1280 .loc 1 545 3 is_stmt 1 view .LVU353
545:Core/Src/printf.c **** // if we're padding on the right, DON'T pad the floating part
1281 .loc 1 545 6 is_stmt 0 view .LVU354
1282 01c8 19F00202 ands r2, r9, #2
1283 01cc 0792 str r2, [sp, #28]
1284 01ce 03D0 beq .L91
545:Core/Src/printf.c **** // if we're padding on the right, DON'T pad the floating part
1285 .loc 1 545 28 discriminator 1 view .LVU355
1286 01d0 BBF1000F cmp fp, #0
1287 01d4 00D0 beq .L91
547:Core/Src/printf.c **** }
1288 .loc 1 547 12 view .LVU356
1289 01d6 0023 movs r3, #0
1290 .LVL131:
1291 .L91:
551:Core/Src/printf.c **** value /= conv.F;
1292 .loc 1 551 3 is_stmt 1 view .LVU357
551:Core/Src/printf.c **** value /= conv.F;
1293 .loc 1 551 6 is_stmt 0 view .LVU358
1294 01d8 B8F1000F cmp r8, #0
1295 01dc 01D0 beq .L92
552:Core/Src/printf.c **** }
1296 .loc 1 552 5 is_stmt 1 view .LVU359
552:Core/Src/printf.c **** }
1297 .loc 1 552 11 is_stmt 0 view .LVU360
1298 01de 85EE065B vdiv.f64 d5, d5, d6
1299 .LVL132:
1300 .L92:
556:Core/Src/printf.c **** idx = _ftoa(out, buffer, idx, maxlen, negative ? -value : value, prec, fwidth, flags & ~FLAGS_ADA
1301 .loc 1 556 3 is_stmt 1 view .LVU361
557:Core/Src/printf.c ****
1302 .loc 1 557 3 view .LVU362
557:Core/Src/printf.c ****
1303 .loc 1 557 9 is_stmt 0 view .LVU363
1304 01e2 B5EEC00B vcmpe.f64 d0, #0
1305 01e6 F1EE10FA vmrs APSR_nzcv, FPSCR
1306 01ea 37D4 bmi .L115
1307 .LVL133:
1308 .L93:
557:Core/Src/printf.c ****
1309 .loc 1 557 9 discriminator 4 view .LVU364
1310 01ec 29F40062 bic r2, r9, #2048
1311 01f0 0292 str r2, [sp, #8]
1312 01f2 0193 str r3, [sp, #4]
1313 01f4 0091 str r1, [sp]
1314 01f6 B0EE450B vmov.f64 d0, d5
1315 .LVL134:
557:Core/Src/printf.c ****
1316 .loc 1 557 9 discriminator 4 view .LVU365
1317 01fa 3346 mov r3, r6
1318 .LVL135:
557:Core/Src/printf.c ****
1319 .loc 1 557 9 discriminator 4 view .LVU366
1320 01fc 3A46 mov r2, r7
1321 01fe 2946 mov r1, r5
ARM GAS /tmp/ccibzHy5.s page 36
1322 .LVL136:
557:Core/Src/printf.c ****
1323 .loc 1 557 9 discriminator 4 view .LVU367
1324 0200 2046 mov r0, r4
1325 0202 FFF7FEFF bl _ftoa
1326 .LVL137:
560:Core/Src/printf.c **** // output the exponential symbol
1327 .loc 1 560 3 is_stmt 1 discriminator 4 view .LVU368
560:Core/Src/printf.c **** // output the exponential symbol
1328 .loc 1 560 6 is_stmt 0 discriminator 4 view .LVU369
1329 0206 BBF1000F cmp fp, #0
1330 020a C2D0 beq .L78
562:Core/Src/printf.c **** // output the exponent value
1331 .loc 1 562 5 is_stmt 1 view .LVU370
1332 020c 19F0200F tst r9, #32
1333 0210 27D0 beq .L104
1334 0212 4FF0450C mov ip, #69
1335 .L95:
562:Core/Src/printf.c **** // output the exponent value
1336 .loc 1 562 5 is_stmt 0 discriminator 4 view .LVU371
1337 0216 00F10109 add r9, r0, #1
1338 .LVL138:
562:Core/Src/printf.c **** // output the exponent value
1339 .loc 1 562 5 discriminator 4 view .LVU372
1340 021a 3346 mov r3, r6
1341 021c 0246 mov r2, r0
1342 021e 2946 mov r1, r5
1343 0220 6046 mov r0, ip
1344 0222 A047 blx r4
1345 .LVL139:
564:Core/Src/printf.c **** // might need to right-pad spaces
1346 .loc 1 564 5 is_stmt 1 discriminator 4 view .LVU373
564:Core/Src/printf.c **** // might need to right-pad spaces
1347 .loc 1 564 71 is_stmt 0 discriminator 4 view .LVU374
1348 0224 88EAE872 eor r2, r8, r8, asr #31
1349 0228 A2EBE872 sub r2, r2, r8, asr #31
564:Core/Src/printf.c **** // might need to right-pad spaces
1350 .loc 1 564 11 discriminator 4 view .LVU375
1351 022c 0523 movs r3, #5
1352 022e 0593 str r3, [sp, #20]
1353 0230 0BF1FF33 add r3, fp, #-1
1354 0234 0493 str r3, [sp, #16]
1355 0236 0023 movs r3, #0
1356 0238 0393 str r3, [sp, #12]
1357 023a 0A23 movs r3, #10
1358 023c 0293 str r3, [sp, #8]
1359 023e 4FEAD873 lsr r3, r8, #31
1360 0242 0193 str r3, [sp, #4]
1361 0244 0092 str r2, [sp]
1362 0246 3346 mov r3, r6
1363 0248 4A46 mov r2, r9
1364 024a 2946 mov r1, r5
1365 024c 2046 mov r0, r4
1366 024e FFF7FEFF bl _ntoa_long
1367 .LVL140:
566:Core/Src/printf.c **** while (idx - start_idx < width) out(' ', buffer, idx++, maxlen);
1368 .loc 1 566 5 is_stmt 1 discriminator 4 view .LVU376
ARM GAS /tmp/ccibzHy5.s page 37
566:Core/Src/printf.c **** while (idx - start_idx < width) out(' ', buffer, idx++, maxlen);
1369 .loc 1 566 8 is_stmt 0 discriminator 4 view .LVU377
1370 0252 079B ldr r3, [sp, #28]
1371 0254 002B cmp r3, #0
1372 0256 9CD0 beq .L78
1373 0258 0246 mov r2, r0
1374 025a 0CE0 b .L96
1375 .LVL141:
1376 .L115:
557:Core/Src/printf.c ****
1377 .loc 1 557 9 discriminator 1 view .LVU378
1378 025c B1EE455B vneg.f64 d5, d5
1379 .LVL142:
557:Core/Src/printf.c ****
1380 .loc 1 557 9 discriminator 1 view .LVU379
1381 0260 C4E7 b .L93
1382 .LVL143:
1383 .L104:
562:Core/Src/printf.c **** // output the exponent value
1384 .loc 1 562 5 view .LVU380
1385 0262 4FF0650C mov ip, #101
1386 0266 D6E7 b .L95
1387 .LVL144:
1388 .L97:
567:Core/Src/printf.c **** }
1389 .loc 1 567 39 is_stmt 1 discriminator 2 view .LVU381
1390 0268 02F10108 add r8, r2, #1
1391 .LVL145:
567:Core/Src/printf.c **** }
1392 .loc 1 567 39 is_stmt 0 discriminator 2 view .LVU382
1393 026c 3346 mov r3, r6
1394 026e 2946 mov r1, r5
1395 0270 2020 movs r0, #32
1396 0272 A047 blx r4
1397 .LVL146:
1398 0274 4246 mov r2, r8
1399 .LVL147:
1400 .L96:
567:Core/Src/printf.c **** }
1401 .loc 1 567 13 is_stmt 1 discriminator 1 view .LVU383
567:Core/Src/printf.c **** }
1402 .loc 1 567 18 is_stmt 0 discriminator 1 view .LVU384
1403 0276 D31B subs r3, r2, r7
567:Core/Src/printf.c **** }
1404 .loc 1 567 13 discriminator 1 view .LVU385
1405 0278 5345 cmp r3, r10
1406 027a F5D3 bcc .L97
567:Core/Src/printf.c **** }
1407 .loc 1 567 13 discriminator 1 view .LVU386
1408 027c 1046 mov r0, r2
1409 027e 88E7 b .L78
1410 .L117:
1411 .align 3
1412 .L116:
1413 0280 FFFFFFFF .word -1
1414 0284 FFFFEF7F .word 2146435071
1415 0288 FFFFFFFF .word -1
ARM GAS /tmp/ccibzHy5.s page 38
1416 028c FFFFEFFF .word -1048577
1417 0290 FB799F50 .word 1352628731
1418 0294 1344D33F .word 1070810131
1419 0298 B3C8608B .word -1956591437
1420 029c 288AC63F .word 1069976104
1421 02a0 61436F63 .word 1668236129
1422 02a4 A787D23F .word 1070761895
1423 02a8 71A37909 .word 158966641
1424 02ac 4F930A40 .word 1074434895
1425 02b0 EF39FAFE .word -17155601
1426 02b4 422EE63F .word 1072049730
1427 02b8 1655B5BB .word -1145744106
1428 02bc B16B0240 .word 1073900465
1429 02c0 2D431CEB .word -350469331
1430 02c4 E2361A3F .word 1058682594
1431 02c8 00000000 .word 0
1432 02cc 80842E41 .word 1093567616
1433 .cfi_endproc
1434 .LFE12:
1436 .section .rodata._ftoa.str1.4,"aMS",%progbits,1
1437 .align 2
1438 .LC0:
1439 0000 666E6900 .ascii "fni\000"
1440 .align 2
1441 .LC1:
1442 0004 666E692B .ascii "fni+\000"
1442 00
1443 0009 000000 .align 2
1444 .LC2:
1445 000c 6E616E00 .ascii "nan\000"
1446 .align 2
1447 .LC3:
1448 0010 666E692D .ascii "fni-\000"
1448 00
1449 .section .text._ftoa,"ax",%progbits
1450 .align 1
1451 .syntax unified
1452 .thumb
1453 .thumb_func
1454 .fpu fpv5-d16
1456 _ftoa:
1457 .LVL148:
1458 .LFB11:
340:Core/Src/printf.c **** char buf[PRINTF_FTOA_BUFFER_SIZE];
1459 .loc 1 340 1 is_stmt 1 view -0
1460 .cfi_startproc
1461 @ args = 12, pretend = 0, frame = 40
1462 @ frame_needed = 0, uses_anonymous_args = 0
340:Core/Src/printf.c **** char buf[PRINTF_FTOA_BUFFER_SIZE];
1463 .loc 1 340 1 is_stmt 0 view .LVU388
1464 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1465 .LCFI20:
1466 .cfi_def_cfa_offset 36
1467 .cfi_offset 4, -36
1468 .cfi_offset 5, -32
1469 .cfi_offset 6, -28
1470 .cfi_offset 7, -24
ARM GAS /tmp/ccibzHy5.s page 39
1471 .cfi_offset 8, -20
1472 .cfi_offset 9, -16
1473 .cfi_offset 10, -12
1474 .cfi_offset 11, -8
1475 .cfi_offset 14, -4
1476 0004 8FB0 sub sp, sp, #60
1477 .LCFI21:
1478 .cfi_def_cfa_offset 96
1479 0006 189D ldr r5, [sp, #96]
1480 0008 199F ldr r7, [sp, #100]
1481 000a 1A9E ldr r6, [sp, #104]
341:Core/Src/printf.c **** size_t len = 0U;
1482 .loc 1 341 3 is_stmt 1 view .LVU389
342:Core/Src/printf.c **** double diff = 0.0;
1483 .loc 1 342 3 view .LVU390
1484 .LVL149:
343:Core/Src/printf.c ****
1485 .loc 1 343 3 view .LVU391
346:Core/Src/printf.c ****
1486 .loc 1 346 3 view .LVU392
349:Core/Src/printf.c **** return _out_rev(out, buffer, idx, maxlen, "nan", 3, width, flags);
1487 .loc 1 349 3 view .LVU393
349:Core/Src/printf.c **** return _out_rev(out, buffer, idx, maxlen, "nan", 3, width, flags);
1488 .loc 1 349 6 is_stmt 0 view .LVU394
1489 000c B4EE400B vcmp.f64 d0, d0
1490 0010 F1EE10FA vmrs APSR_nzcv, FPSCR
1491 0014 28D1 bne .L180
351:Core/Src/printf.c **** return _out_rev(out, buffer, idx, maxlen, "fni-", 4, width, flags);
1492 .loc 1 351 3 is_stmt 1 view .LVU395
351:Core/Src/printf.c **** return _out_rev(out, buffer, idx, maxlen, "fni-", 4, width, flags);
1493 .loc 1 351 6 is_stmt 0 view .LVU396
1494 0016 9FEDAC7B vldr.64 d7, .L185
1495 001a B4EEC70B vcmpe.f64 d0, d7
1496 001e F1EE10FA vmrs APSR_nzcv, FPSCR
1497 0022 2AD4 bmi .L181
353:Core/Src/printf.c **** return _out_rev(out, buffer, idx, maxlen, (flags & FLAGS_PLUS) ? "fni+" : "fni", (flags & FLAGS
1498 .loc 1 353 3 is_stmt 1 view .LVU397
353:Core/Src/printf.c **** return _out_rev(out, buffer, idx, maxlen, (flags & FLAGS_PLUS) ? "fni+" : "fni", (flags & FLAGS
1499 .loc 1 353 6 is_stmt 0 view .LVU398
1500 0024 9FEDAA7B vldr.64 d7, .L185+8
1501 0028 B4EEC70B vcmpe.f64 d0, d7
1502 002c F1EE10FA vmrs APSR_nzcv, FPSCR
1503 0030 2CDC bgt .L182
358:Core/Src/printf.c **** #if defined(PRINTF_SUPPORT_EXPONENTIAL)
1504 .loc 1 358 3 is_stmt 1 view .LVU399
358:Core/Src/printf.c **** #if defined(PRINTF_SUPPORT_EXPONENTIAL)
1505 .loc 1 358 6 is_stmt 0 view .LVU400
1506 0032 9FEDA97B vldr.64 d7, .L185+16
1507 0036 B4EEC70B vcmpe.f64 d0, d7
1508 003a F1EE10FA vmrs APSR_nzcv, FPSCR
1509 003e 36DC bgt .L127
358:Core/Src/printf.c **** #if defined(PRINTF_SUPPORT_EXPONENTIAL)
1510 .loc 1 358 34 discriminator 1 view .LVU401
1511 0040 9FEDA77B vldr.64 d7, .L185+24
1512 0044 B4EEC70B vcmpe.f64 d0, d7
1513 0048 F1EE10FA vmrs APSR_nzcv, FPSCR
1514 004c 2FD4 bmi .L127
ARM GAS /tmp/ccibzHy5.s page 40
367:Core/Src/printf.c **** if (value < 0) {
1515 .loc 1 367 3 is_stmt 1 view .LVU402
1516 .LVL150:
368:Core/Src/printf.c **** negative = true;
1517 .loc 1 368 3 view .LVU403
368:Core/Src/printf.c **** negative = true;
1518 .loc 1 368 6 is_stmt 0 view .LVU404
1519 004e B5EEC00B vcmpe.f64 d0, #0
1520 0052 F1EE10FA vmrs APSR_nzcv, FPSCR
1521 0056 30D4 bmi .L183
367:Core/Src/printf.c **** if (value < 0) {
1522 .loc 1 367 8 view .LVU405
1523 0058 0024 movs r4, #0
1524 005a 0594 str r4, [sp, #20]
1525 .LVL151:
1526 .L130:
374:Core/Src/printf.c **** prec = PRINTF_DEFAULT_FLOAT_PRECISION;
1527 .loc 1 374 3 is_stmt 1 view .LVU406
374:Core/Src/printf.c **** prec = PRINTF_DEFAULT_FLOAT_PRECISION;
1528 .loc 1 374 6 is_stmt 0 view .LVU407
1529 005c 16F4806F tst r6, #1024
1530 0060 00F08B80 beq .L165
1531 .L132:
1532 .LVL152:
375:Core/Src/printf.c **** }
1533 .loc 1 375 10 view .LVU408
1534 0064 0024 movs r4, #0
1535 0066 38E0 b .L134
1536 .LVL153:
1537 .L180:
350:Core/Src/printf.c **** if (value < -DBL_MAX)
1538 .loc 1 350 5 is_stmt 1 view .LVU409
350:Core/Src/printf.c **** if (value < -DBL_MAX)
1539 .loc 1 350 12 is_stmt 0 view .LVU410
1540 0068 0396 str r6, [sp, #12]
1541 006a 0297 str r7, [sp, #8]
1542 006c 0324 movs r4, #3
1543 006e 0194 str r4, [sp, #4]
1544 0070 9F4C ldr r4, .L185+40
1545 0072 0094 str r4, [sp]
1546 0074 FFF7FEFF bl _out_rev
1547 .LVL154:
350:Core/Src/printf.c **** if (value < -DBL_MAX)
1548 .loc 1 350 12 view .LVU411
1549 0078 F9E0 b .L118
1550 .LVL155:
1551 .L181:
352:Core/Src/printf.c **** if (value > DBL_MAX)
1552 .loc 1 352 5 is_stmt 1 view .LVU412
352:Core/Src/printf.c **** if (value > DBL_MAX)
1553 .loc 1 352 12 is_stmt 0 view .LVU413
1554 007a 0396 str r6, [sp, #12]
1555 007c 0297 str r7, [sp, #8]
1556 007e 0424 movs r4, #4
1557 0080 0194 str r4, [sp, #4]
1558 0082 9C4C ldr r4, .L185+44
1559 0084 0094 str r4, [sp]
ARM GAS /tmp/ccibzHy5.s page 41
1560 0086 FFF7FEFF bl _out_rev
1561 .LVL156:
352:Core/Src/printf.c **** if (value > DBL_MAX)
1562 .loc 1 352 12 view .LVU414
1563 008a F0E0 b .L118
1564 .LVL157:
1565 .L182:
354:Core/Src/printf.c ****
1566 .loc 1 354 5 is_stmt 1 view .LVU415
354:Core/Src/printf.c ****
1567 .loc 1 354 12 is_stmt 0 view .LVU416
1568 008c 16F00405 ands r5, r6, #4
1569 0090 09D0 beq .L162
1570 0092 994C ldr r4, .L185+48
1571 .L125:
354:Core/Src/printf.c ****
1572 .loc 1 354 12 discriminator 4 view .LVU417
1573 0094 4DB1 cbz r5, .L163
354:Core/Src/printf.c ****
1574 .loc 1 354 12 view .LVU418
1575 0096 0425 movs r5, #4
1576 .L126:
354:Core/Src/printf.c ****
1577 .loc 1 354 12 discriminator 8 view .LVU419
1578 0098 0396 str r6, [sp, #12]
1579 009a 0297 str r7, [sp, #8]
1580 009c 0195 str r5, [sp, #4]
1581 009e 0094 str r4, [sp]
1582 00a0 FFF7FEFF bl _out_rev
1583 .LVL158:
354:Core/Src/printf.c ****
1584 .loc 1 354 12 discriminator 8 view .LVU420
1585 00a4 E3E0 b .L118
1586 .LVL159:
1587 .L162:
354:Core/Src/printf.c ****
1588 .loc 1 354 12 view .LVU421
1589 00a6 954C ldr r4, .L185+52
1590 00a8 F4E7 b .L125
1591 .L163:
1592 00aa 0325 movs r5, #3
1593 00ac F4E7 b .L126
1594 .L127:
360:Core/Src/printf.c **** #else
1595 .loc 1 360 5 is_stmt 1 view .LVU422
360:Core/Src/printf.c **** #else
1596 .loc 1 360 12 is_stmt 0 view .LVU423
1597 00ae 0296 str r6, [sp, #8]
1598 00b0 0197 str r7, [sp, #4]
1599 00b2 0095 str r5, [sp]
1600 00b4 FFF7FEFF bl _etoa
1601 .LVL160:
360:Core/Src/printf.c **** #else
1602 .loc 1 360 12 view .LVU424
1603 00b8 D9E0 b .L118
1604 .LVL161:
1605 .L183:
ARM GAS /tmp/ccibzHy5.s page 42
369:Core/Src/printf.c **** value = 0 - value;
1606 .loc 1 369 5 is_stmt 1 view .LVU425
370:Core/Src/printf.c **** }
1607 .loc 1 370 5 view .LVU426
370:Core/Src/printf.c **** }
1608 .loc 1 370 11 is_stmt 0 view .LVU427
1609 00ba 9FED8B7B vldr.64 d7, .L185+32
1610 00be 37EE400B vsub.f64 d0, d7, d0
1611 .LVL162:
369:Core/Src/printf.c **** value = 0 - value;
1612 .loc 1 369 14 view .LVU428
1613 00c2 0124 movs r4, #1
1614 00c4 0594 str r4, [sp, #20]
1615 00c6 C9E7 b .L130
1616 .LVL163:
1617 .L135:
379:Core/Src/printf.c **** prec--;
1618 .loc 1 379 5 is_stmt 1 view .LVU429
379:Core/Src/printf.c **** prec--;
1619 .loc 1 379 16 is_stmt 0 view .LVU430
1620 00c8 0DF1380C add ip, sp, #56
1621 00cc A444 add ip, ip, r4
1622 00ce 4FF03008 mov r8, #48
1623 00d2 0CF8208C strb r8, [ip, #-32]
380:Core/Src/printf.c **** }
1624 .loc 1 380 5 is_stmt 1 view .LVU431
380:Core/Src/printf.c **** }
1625 .loc 1 380 9 is_stmt 0 view .LVU432
1626 00d6 013D subs r5, r5, #1
1627 .LVL164:
379:Core/Src/printf.c **** prec--;
1628 .loc 1 379 12 view .LVU433
1629 00d8 0134 adds r4, r4, #1
1630 .LVL165:
1631 .L134:
378:Core/Src/printf.c **** buf[len++] = '0';
1632 .loc 1 378 9 is_stmt 1 view .LVU434
378:Core/Src/printf.c **** buf[len++] = '0';
1633 .loc 1 378 42 is_stmt 0 view .LVU435
1634 00da 1F2C cmp r4, #31
1635 00dc 8CBF ite hi
1636 00de 4FF0000C movhi ip, #0
1637 00e2 4FF0010C movls ip, #1
1638 00e6 092D cmp r5, #9
1639 00e8 98BF it ls
1640 00ea 4FF0000C movls ip, #0
378:Core/Src/printf.c **** buf[len++] = '0';
1641 .loc 1 378 9 view .LVU436
1642 00ee BCF1000F cmp ip, #0
1643 00f2 E9D1 bne .L135
383:Core/Src/printf.c **** double tmp = (value - whole) * pow10[prec];
1644 .loc 1 383 3 is_stmt 1 view .LVU437
383:Core/Src/printf.c **** double tmp = (value - whole) * pow10[prec];
1645 .loc 1 383 7 is_stmt 0 view .LVU438
1646 00f4 FDEEC07B vcvt.s32.f64 s15, d0
1647 00f8 17EE908A vmov r8, s15 @ int
1648 .LVL166:
ARM GAS /tmp/ccibzHy5.s page 43
384:Core/Src/printf.c **** unsigned long frac = (unsigned long)tmp;
1649 .loc 1 384 3 is_stmt 1 view .LVU439
384:Core/Src/printf.c **** unsigned long frac = (unsigned long)tmp;
1650 .loc 1 384 23 is_stmt 0 view .LVU440
1651 00fc B8EEE77B vcvt.f64.s32 d7, s15
1652 0100 30EE477B vsub.f64 d7, d0, d7
384:Core/Src/printf.c **** unsigned long frac = (unsigned long)tmp;
1653 .loc 1 384 39 view .LVU441
1654 0104 DFF8FCC1 ldr ip, .L185+60
1655 0108 0CEBC50C add ip, ip, r5, lsl #3
1656 010c 9CED006B vldr.64 d6, [ip]
384:Core/Src/printf.c **** unsigned long frac = (unsigned long)tmp;
1657 .loc 1 384 10 view .LVU442
1658 0110 27EE067B vmul.f64 d7, d7, d6
1659 .LVL167:
385:Core/Src/printf.c **** diff = tmp - frac;
1660 .loc 1 385 3 is_stmt 1 view .LVU443
385:Core/Src/printf.c **** diff = tmp - frac;
1661 .loc 1 385 17 is_stmt 0 view .LVU444
1662 0114 FCEEC75B vcvt.u32.f64 s11, d7
1663 0118 15EE909A vmov r9, s11 @ int
1664 .LVL168:
386:Core/Src/printf.c ****
1665 .loc 1 386 3 is_stmt 1 view .LVU445
386:Core/Src/printf.c ****
1666 .loc 1 386 14 is_stmt 0 view .LVU446
1667 011c B8EE655B vcvt.f64.u32 d5, s11
386:Core/Src/printf.c ****
1668 .loc 1 386 8 view .LVU447
1669 0120 37EE457B vsub.f64 d7, d7, d5
1670 .LVL169:
388:Core/Src/printf.c **** ++frac;
1671 .loc 1 388 3 is_stmt 1 view .LVU448
388:Core/Src/printf.c **** ++frac;
1672 .loc 1 388 6 is_stmt 0 view .LVU449
1673 0124 B6EE005B vmov.f64 d5, #5.0e-1
1674 0128 B4EEC57B vcmpe.f64 d7, d5
1675 012c F1EE10FA vmrs APSR_nzcv, FPSCR
1676 0130 25DD ble .L178
389:Core/Src/printf.c **** // handle rollover, e.g. case 0.99 with prec 1 is 1.0
1677 .loc 1 389 5 is_stmt 1 view .LVU450
1678 0132 09F10109 add r9, r9, #1
1679 .LVL170:
391:Core/Src/printf.c **** frac = 0;
1680 .loc 1 391 5 view .LVU451
391:Core/Src/printf.c **** frac = 0;
1681 .loc 1 391 14 is_stmt 0 view .LVU452
1682 0136 07EE909A vmov s15, r9 @ int
1683 013a B8EE677B vcvt.f64.u32 d7, s15
1684 .LVL171:
391:Core/Src/printf.c **** frac = 0;
1685 .loc 1 391 8 view .LVU453
1686 013e B4EEC76B vcmpe.f64 d6, d7
1687 0142 F1EE10FA vmrs APSR_nzcv, FPSCR
1688 0146 03D8 bhi .L138
392:Core/Src/printf.c **** ++whole;
1689 .loc 1 392 7 is_stmt 1 view .LVU454
ARM GAS /tmp/ccibzHy5.s page 44
1690 .LVL172:
393:Core/Src/printf.c **** }
1691 .loc 1 393 7 view .LVU455
1692 0148 08F10108 add r8, r8, #1
1693 .LVL173:
392:Core/Src/printf.c **** ++whole;
1694 .loc 1 392 12 is_stmt 0 view .LVU456
1695 014c 4FF00009 mov r9, #0
1696 .LVL174:
1697 .L138:
403:Core/Src/printf.c **** diff = value - (double)whole;
1698 .loc 1 403 3 is_stmt 1 view .LVU457
403:Core/Src/printf.c **** diff = value - (double)whole;
1699 .loc 1 403 6 is_stmt 0 view .LVU458
1700 0150 2DBB cbnz r5, .L141
404:Core/Src/printf.c **** if ((!(diff < 0.5) || (diff > 0.5)) && (whole & 1)) {
1701 .loc 1 404 5 is_stmt 1 view .LVU459
404:Core/Src/printf.c **** if ((!(diff < 0.5) || (diff > 0.5)) && (whole & 1)) {
1702 .loc 1 404 20 is_stmt 0 view .LVU460
1703 0152 07EE908A vmov s15, r8 @ int
1704 0156 B8EEE77B vcvt.f64.s32 d7, s15
404:Core/Src/printf.c **** if ((!(diff < 0.5) || (diff > 0.5)) && (whole & 1)) {
1705 .loc 1 404 10 view .LVU461
1706 015a 30EE470B vsub.f64 d0, d0, d7
1707 .LVL175:
405:Core/Src/printf.c **** // exactly 0.5 and ODD, then round up
1708 .loc 1 405 5 is_stmt 1 view .LVU462
405:Core/Src/printf.c **** // exactly 0.5 and ODD, then round up
1709 .loc 1 405 8 is_stmt 0 view .LVU463
1710 015e B6EE007B vmov.f64 d7, #5.0e-1
1711 0162 B4EEC70B vcmpe.f64 d0, d7
1712 0166 F1EE10FA vmrs APSR_nzcv, FPSCR
1713 016a 00D5 bpl .L142
405:Core/Src/printf.c **** // exactly 0.5 and ODD, then round up
1714 .loc 1 405 24 discriminator 2 view .LVU464
1715 016c 4BDD ble .L152
1716 .L142:
405:Core/Src/printf.c **** // exactly 0.5 and ODD, then round up
1717 .loc 1 405 41 discriminator 3 view .LVU465
1718 016e 18F0010F tst r8, #1
1719 0172 48D0 beq .L152
408:Core/Src/printf.c **** }
1720 .loc 1 408 7 is_stmt 1 view .LVU466
1721 0174 08F10108 add r8, r8, #1
1722 .LVL176:
408:Core/Src/printf.c **** }
1723 .loc 1 408 7 is_stmt 0 view .LVU467
1724 0178 45E0 b .L152
1725 .LVL177:
1726 .L165:
375:Core/Src/printf.c **** }
1727 .loc 1 375 10 view .LVU468
1728 017a 0625 movs r5, #6
1729 017c 72E7 b .L132
1730 .LVL178:
1731 .L178:
396:Core/Src/printf.c **** }
ARM GAS /tmp/ccibzHy5.s page 45
1732 .loc 1 396 8 is_stmt 1 view .LVU469
396:Core/Src/printf.c **** }
1733 .loc 1 396 11 is_stmt 0 view .LVU470
1734 017e B6EE006B vmov.f64 d6, #5.0e-1
1735 .LVL179:
396:Core/Src/printf.c **** }
1736 .loc 1 396 11 view .LVU471
1737 0182 B4EEC67B vcmpe.f64 d7, d6
1738 0186 F1EE10FA vmrs APSR_nzcv, FPSCR
1739 018a E1D4 bmi .L138
398:Core/Src/printf.c **** // if halfway, round up if odd OR if last digit is 0
1740 .loc 1 398 8 is_stmt 1 view .LVU472
398:Core/Src/printf.c **** // if halfway, round up if odd OR if last digit is 0
1741 .loc 1 398 11 is_stmt 0 view .LVU473
1742 018c B9F1000F cmp r9, #0
1743 0190 02D0 beq .L140
398:Core/Src/printf.c **** // if halfway, round up if odd OR if last digit is 0
1744 .loc 1 398 25 discriminator 1 view .LVU474
1745 0192 19F0010F tst r9, #1
1746 0196 DBD0 beq .L138
1747 .L140:
400:Core/Src/printf.c **** }
1748 .loc 1 400 5 is_stmt 1 view .LVU475
1749 0198 09F10109 add r9, r9, #1
1750 .LVL180:
400:Core/Src/printf.c **** }
1751 .loc 1 400 5 is_stmt 0 view .LVU476
1752 019c D8E7 b .L138
1753 .LVL181:
1754 .L141:
1755 .LBB30:
414:Core/Src/printf.c **** --count;
1756 .loc 1 414 11 is_stmt 1 view .LVU477
1757 019e 1F2C cmp r4, #31
1758 01a0 22D8 bhi .L148
415:Core/Src/printf.c **** buf[len++] = (char)(48U + (frac % 10U));
1759 .loc 1 415 7 view .LVU478
1760 01a2 013D subs r5, r5, #1
1761 .LVL182:
416:Core/Src/printf.c **** if (!(frac /= 10U)) {
1762 .loc 1 416 7 view .LVU479
416:Core/Src/printf.c **** if (!(frac /= 10U)) {
1763 .loc 1 416 39 is_stmt 0 view .LVU480
1764 01a4 DFF860C1 ldr ip, .L185+64
1765 01a8 ACFB09EC umull lr, ip, ip, r9
1766 01ac 4FEADC0C lsr ip, ip, #3
1767 01b0 E346 mov fp, ip
1768 01b2 0CEB8C0C add ip, ip, ip, lsl #2
1769 01b6 A9EB4C0C sub ip, r9, ip, lsl #1
416:Core/Src/printf.c **** if (!(frac /= 10U)) {
1770 .loc 1 416 14 view .LVU481
1771 01ba 04F1010A add r10, r4, #1
1772 .LVL183:
416:Core/Src/printf.c **** if (!(frac /= 10U)) {
1773 .loc 1 416 20 view .LVU482
1774 01be 0CF1300C add ip, ip, #48
416:Core/Src/printf.c **** if (!(frac /= 10U)) {
ARM GAS /tmp/ccibzHy5.s page 46
1775 .loc 1 416 18 view .LVU483
1776 01c2 0DF1380E add lr, sp, #56
1777 01c6 7444 add r4, r4, lr
1778 01c8 04F820CC strb ip, [r4, #-32]
417:Core/Src/printf.c **** break;
1779 .loc 1 417 7 is_stmt 1 view .LVU484
1780 .LVL184:
417:Core/Src/printf.c **** break;
1781 .loc 1 417 10 is_stmt 0 view .LVU485
1782 01cc B9F1090F cmp r9, #9
1783 01d0 34D9 bls .L166
417:Core/Src/printf.c **** break;
1784 .loc 1 417 18 view .LVU486
1785 01d2 D946 mov r9, fp
416:Core/Src/printf.c **** if (!(frac /= 10U)) {
1786 .loc 1 416 14 view .LVU487
1787 01d4 5446 mov r4, r10
1788 01d6 E2E7 b .L141
1789 .LVL185:
1790 .L150:
423:Core/Src/printf.c **** }
1791 .loc 1 423 7 is_stmt 1 view .LVU488
423:Core/Src/printf.c **** }
1792 .loc 1 423 18 is_stmt 0 view .LVU489
1793 01d8 0EAD add r5, sp, #56
1794 01da 2544 add r5, r5, r4
1795 01dc 4FF03009 mov r9, #48
1796 01e0 05F8209C strb r9, [r5, #-32]
422:Core/Src/printf.c **** buf[len++] = '0';
1797 .loc 1 422 53 view .LVU490
1798 01e4 6546 mov r5, ip
423:Core/Src/printf.c **** }
1799 .loc 1 423 14 view .LVU491
1800 01e6 0134 adds r4, r4, #1
1801 .LVL186:
1802 .L148:
422:Core/Src/printf.c **** buf[len++] = '0';
1803 .loc 1 422 11 is_stmt 1 view .LVU492
1804 01e8 1F2C cmp r4, #31
1805 01ea 03D8 bhi .L149
422:Core/Src/printf.c **** buf[len++] = '0';
1806 .loc 1 422 53 is_stmt 0 discriminator 1 view .LVU493
1807 01ec 05F1FF3C add ip, r5, #-1
1808 .LVL187:
422:Core/Src/printf.c **** buf[len++] = '0';
1809 .loc 1 422 44 discriminator 1 view .LVU494
1810 01f0 002D cmp r5, #0
1811 01f2 F1D1 bne .L150
1812 .LVL188:
1813 .L149:
425:Core/Src/printf.c **** // add decimal
1814 .loc 1 425 5 is_stmt 1 view .LVU495
425:Core/Src/printf.c **** // add decimal
1815 .loc 1 425 8 is_stmt 0 view .LVU496
1816 01f4 1F2C cmp r4, #31
1817 01f6 06D8 bhi .L152
427:Core/Src/printf.c **** }
ARM GAS /tmp/ccibzHy5.s page 47
1818 .loc 1 427 7 is_stmt 1 view .LVU497
1819 .LVL189:
427:Core/Src/printf.c **** }
1820 .loc 1 427 18 is_stmt 0 view .LVU498
1821 01f8 0EAD add r5, sp, #56
1822 01fa 2544 add r5, r5, r4
1823 01fc 4FF02E0C mov ip, #46
1824 0200 05F820CC strb ip, [r5, #-32]
427:Core/Src/printf.c **** }
1825 .loc 1 427 14 view .LVU499
1826 0204 0134 adds r4, r4, #1
1827 .LVL190:
1828 .L152:
427:Core/Src/printf.c **** }
1829 .loc 1 427 14 view .LVU500
1830 .LBE30:
432:Core/Src/printf.c **** buf[len++] = (char)(48 + (whole % 10));
1831 .loc 1 432 9 is_stmt 1 view .LVU501
1832 0206 1F2C cmp r4, #31
1833 0208 1BD8 bhi .L151
433:Core/Src/printf.c **** if (!(whole /= 10)) {
1834 .loc 1 433 5 view .LVU502
433:Core/Src/printf.c **** if (!(whole /= 10)) {
1835 .loc 1 433 37 is_stmt 0 view .LVU503
1836 020a 3D4D ldr r5, .L185+56
1837 020c 85FB08C5 smull ip, r5, r5, r8
1838 0210 4FEAE87C asr ip, r8, #31
1839 0214 CCEBA50C rsb ip, ip, r5, asr #2
1840 0218 6546 mov r5, ip
1841 021a 0CEB8C0C add ip, ip, ip, lsl #2
1842 021e A8EB4C0C sub ip, r8, ip, lsl #1
433:Core/Src/printf.c **** if (!(whole /= 10)) {
1843 .loc 1 433 12 view .LVU504
1844 0222 04F10109 add r9, r4, #1
1845 .LVL191:
433:Core/Src/printf.c **** if (!(whole /= 10)) {
1846 .loc 1 433 18 view .LVU505
1847 0226 0CF1300C add ip, ip, #48
433:Core/Src/printf.c **** if (!(whole /= 10)) {
1848 .loc 1 433 16 view .LVU506
1849 022a 0DF13808 add r8, sp, #56
1850 .LVL192:
433:Core/Src/printf.c **** if (!(whole /= 10)) {
1851 .loc 1 433 16 view .LVU507
1852 022e 4444 add r4, r4, r8
1853 0230 04F820CC strb ip, [r4, #-32]
434:Core/Src/printf.c **** break;
1854 .loc 1 434 5 is_stmt 1 view .LVU508
434:Core/Src/printf.c **** break;
1855 .loc 1 434 17 is_stmt 0 view .LVU509
1856 0234 A846 mov r8, r5
1857 .LVL193:
434:Core/Src/printf.c **** break;
1858 .loc 1 434 8 view .LVU510
1859 0236 1DB1 cbz r5, .L167
433:Core/Src/printf.c **** if (!(whole /= 10)) {
1860 .loc 1 433 12 view .LVU511
ARM GAS /tmp/ccibzHy5.s page 48
1861 0238 4C46 mov r4, r9
1862 023a E4E7 b .L152
1863 .LVL194:
1864 .L166:
1865 .LBB31:
416:Core/Src/printf.c **** if (!(frac /= 10U)) {
1866 .loc 1 416 14 view .LVU512
1867 023c 5446 mov r4, r10
1868 023e D3E7 b .L148
1869 .LVL195:
1870 .L167:
416:Core/Src/printf.c **** if (!(frac /= 10U)) {
1871 .loc 1 416 14 view .LVU513
1872 .LBE31:
433:Core/Src/printf.c **** if (!(whole /= 10)) {
1873 .loc 1 433 12 view .LVU514
1874 0240 4C46 mov r4, r9
1875 .LVL196:
1876 .L151:
440:Core/Src/printf.c **** if (width && (negative || (flags & (FLAGS_PLUS | FLAGS_SPACE)))) {
1877 .loc 1 440 3 is_stmt 1 view .LVU515
440:Core/Src/printf.c **** if (width && (negative || (flags & (FLAGS_PLUS | FLAGS_SPACE)))) {
1878 .loc 1 440 29 is_stmt 0 view .LVU516
1879 0242 06F00305 and r5, r6, #3
440:Core/Src/printf.c **** if (width && (negative || (flags & (FLAGS_PLUS | FLAGS_SPACE)))) {
1880 .loc 1 440 6 view .LVU517
1881 0246 012D cmp r5, #1
1882 0248 14D0 beq .L184
1883 .LVL197:
1884 .L154:
449:Core/Src/printf.c **** if (negative) {
1885 .loc 1 449 3 is_stmt 1 view .LVU518
449:Core/Src/printf.c **** if (negative) {
1886 .loc 1 449 6 is_stmt 0 view .LVU519
1887 024a 1F2C cmp r4, #31
1888 024c 08D8 bhi .L159
450:Core/Src/printf.c **** buf[len++] = '-';
1889 .loc 1 450 5 is_stmt 1 view .LVU520
450:Core/Src/printf.c **** buf[len++] = '-';
1890 .loc 1 450 8 is_stmt 0 view .LVU521
1891 024e 059D ldr r5, [sp, #20]
1892 0250 25B3 cbz r5, .L160
451:Core/Src/printf.c **** }
1893 .loc 1 451 7 is_stmt 1 view .LVU522
1894 .LVL198:
451:Core/Src/printf.c **** }
1895 .loc 1 451 18 is_stmt 0 view .LVU523
1896 0252 0EAD add r5, sp, #56
1897 0254 2544 add r5, r5, r4
1898 0256 4FF02D0C mov ip, #45
1899 025a 05F820CC strb ip, [r5, #-32]
451:Core/Src/printf.c **** }
1900 .loc 1 451 14 view .LVU524
1901 025e 0134 adds r4, r4, #1
1902 .LVL199:
1903 .L159:
461:Core/Src/printf.c **** }
ARM GAS /tmp/ccibzHy5.s page 49
1904 .loc 1 461 3 is_stmt 1 view .LVU525
461:Core/Src/printf.c **** }
1905 .loc 1 461 10 is_stmt 0 view .LVU526
1906 0260 0396 str r6, [sp, #12]
1907 0262 0297 str r7, [sp, #8]
1908 0264 0194 str r4, [sp, #4]
1909 0266 06AC add r4, sp, #24
1910 .LVL200:
461:Core/Src/printf.c **** }
1911 .loc 1 461 10 view .LVU527
1912 0268 0094 str r4, [sp]
1913 026a FFF7FEFF bl _out_rev
1914 .LVL201:
1915 .L118:
462:Core/Src/printf.c ****
1916 .loc 1 462 1 view .LVU528
1917 026e 0FB0 add sp, sp, #60
1918 .LCFI22:
1919 .cfi_remember_state
1920 .cfi_def_cfa_offset 36
1921 @ sp needed
1922 0270 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
1923 .LVL202:
1924 .L184:
1925 .LCFI23:
1926 .cfi_restore_state
441:Core/Src/printf.c **** width--;
1927 .loc 1 441 5 is_stmt 1 view .LVU529
441:Core/Src/printf.c **** width--;
1928 .loc 1 441 8 is_stmt 0 view .LVU530
1929 0274 6FB1 cbz r7, .L157
441:Core/Src/printf.c **** width--;
1930 .loc 1 441 15 discriminator 1 view .LVU531
1931 0276 059D ldr r5, [sp, #20]
1932 0278 15B9 cbnz r5, .L156
441:Core/Src/printf.c **** width--;
1933 .loc 1 441 28 discriminator 2 view .LVU532
1934 027a 16F00C0F tst r6, #12
1935 027e 08D0 beq .L157
1936 .L156:
442:Core/Src/printf.c **** }
1937 .loc 1 442 7 is_stmt 1 view .LVU533
442:Core/Src/printf.c **** }
1938 .loc 1 442 12 is_stmt 0 view .LVU534
1939 0280 013F subs r7, r7, #1
1940 .LVL203:
442:Core/Src/printf.c **** }
1941 .loc 1 442 12 view .LVU535
1942 0282 06E0 b .L157
1943 .L158:
445:Core/Src/printf.c **** }
1944 .loc 1 445 7 is_stmt 1 view .LVU536
1945 .LVL204:
445:Core/Src/printf.c **** }
1946 .loc 1 445 18 is_stmt 0 view .LVU537
1947 0284 0EAD add r5, sp, #56
1948 0286 2544 add r5, r5, r4
ARM GAS /tmp/ccibzHy5.s page 50
1949 0288 4FF0300C mov ip, #48
1950 028c 05F820CC strb ip, [r5, #-32]
445:Core/Src/printf.c **** }
1951 .loc 1 445 14 view .LVU538
1952 0290 0134 adds r4, r4, #1
1953 .LVL205:
1954 .L157:
444:Core/Src/printf.c **** buf[len++] = '0';
1955 .loc 1 444 11 is_stmt 1 view .LVU539
1956 0292 1F2C cmp r4, #31
1957 0294 98BF it ls
1958 0296 BC42 cmpls r4, r7
1959 0298 F4D3 bcc .L158
444:Core/Src/printf.c **** buf[len++] = '0';
1960 .loc 1 444 11 is_stmt 0 view .LVU540
1961 029a D6E7 b .L154
1962 .L160:
453:Core/Src/printf.c **** buf[len++] = '+'; // ignore the space if the '+' exists
1963 .loc 1 453 10 is_stmt 1 view .LVU541
453:Core/Src/printf.c **** buf[len++] = '+'; // ignore the space if the '+' exists
1964 .loc 1 453 13 is_stmt 0 view .LVU542
1965 029c 16F0040F tst r6, #4
1966 02a0 07D0 beq .L161
454:Core/Src/printf.c **** }
1967 .loc 1 454 7 is_stmt 1 view .LVU543
1968 .LVL206:
454:Core/Src/printf.c **** }
1969 .loc 1 454 18 is_stmt 0 view .LVU544
1970 02a2 0EAD add r5, sp, #56
1971 02a4 2544 add r5, r5, r4
1972 02a6 4FF02B0C mov ip, #43
1973 02aa 05F820CC strb ip, [r5, #-32]
454:Core/Src/printf.c **** }
1974 .loc 1 454 14 view .LVU545
1975 02ae 0134 adds r4, r4, #1
1976 .LVL207:
454:Core/Src/printf.c **** }
1977 .loc 1 454 14 view .LVU546
1978 02b0 D6E7 b .L159
1979 .L161:
456:Core/Src/printf.c **** buf[len++] = ' ';
1980 .loc 1 456 10 is_stmt 1 view .LVU547
456:Core/Src/printf.c **** buf[len++] = ' ';
1981 .loc 1 456 13 is_stmt 0 view .LVU548
1982 02b2 16F0080F tst r6, #8
1983 02b6 D3D0 beq .L159
457:Core/Src/printf.c **** }
1984 .loc 1 457 7 is_stmt 1 view .LVU549
1985 .LVL208:
457:Core/Src/printf.c **** }
1986 .loc 1 457 18 is_stmt 0 view .LVU550
1987 02b8 0EAD add r5, sp, #56
1988 02ba 2544 add r5, r5, r4
1989 02bc 4FF0200C mov ip, #32
1990 02c0 05F820CC strb ip, [r5, #-32]
457:Core/Src/printf.c **** }
1991 .loc 1 457 14 view .LVU551
ARM GAS /tmp/ccibzHy5.s page 51
1992 02c4 0134 adds r4, r4, #1
1993 .LVL209:
457:Core/Src/printf.c **** }
1994 .loc 1 457 14 view .LVU552
1995 02c6 CBE7 b .L159
1996 .L186:
1997 .align 3
1998 .L185:
1999 02c8 FFFFFFFF .word -1
2000 02cc FFFFEFFF .word -1048577
2001 02d0 FFFFFFFF .word -1
2002 02d4 FFFFEF7F .word 2146435071
2003 02d8 00000000 .word 0
2004 02dc 65CDCD41 .word 1104006501
2005 02e0 00000000 .word 0
2006 02e4 65CDCDC1 .word -1043477147
2007 02e8 00000000 .word 0
2008 02ec 00000000 .word 0
2009 02f0 0C000000 .word .LC2
2010 02f4 10000000 .word .LC3
2011 02f8 04000000 .word .LC1
2012 02fc 00000000 .word .LC0
2013 0300 67666666 .word 1717986919
2014 0304 00000000 .word .LANCHOR0
2015 0308 CDCCCCCC .word -858993459
2016 .cfi_endproc
2017 .LFE11:
2019 .section .text._vsnprintf,"ax",%progbits
2020 .align 1
2021 .syntax unified
2022 .thumb
2023 .thumb_func
2024 .fpu fpv5-d16
2026 _vsnprintf:
2027 .LVL210:
2028 .LFB13:
572:Core/Src/printf.c **** #endif // PRINTF_SUPPORT_EXPONENTIAL
573:Core/Src/printf.c **** #endif // PRINTF_SUPPORT_FLOAT
574:Core/Src/printf.c ****
575:Core/Src/printf.c ****
576:Core/Src/printf.c **** // internal vsnprintf
577:Core/Src/printf.c **** static int _vsnprintf(out_fct_type out, char* buffer, const size_t maxlen, const char* format, va_l
578:Core/Src/printf.c **** {
2029 .loc 1 578 1 is_stmt 1 view -0
2030 .cfi_startproc
2031 @ args = 4, pretend = 0, frame = 16
2032 @ frame_needed = 0, uses_anonymous_args = 0
2033 .loc 1 578 1 is_stmt 0 view .LVU554
2034 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
2035 .LCFI24:
2036 .cfi_def_cfa_offset 36
2037 .cfi_offset 4, -36
2038 .cfi_offset 5, -32
2039 .cfi_offset 6, -28
2040 .cfi_offset 7, -24
2041 .cfi_offset 8, -20
2042 .cfi_offset 9, -16
ARM GAS /tmp/ccibzHy5.s page 52
2043 .cfi_offset 10, -12
2044 .cfi_offset 11, -8
2045 .cfi_offset 14, -4
2046 0004 8FB0 sub sp, sp, #60
2047 .LCFI25:
2048 .cfi_def_cfa_offset 96
2049 0006 0746 mov r7, r0
2050 0008 1646 mov r6, r2
2051 000a 0D93 str r3, [sp, #52]
579:Core/Src/printf.c **** unsigned int flags, width, precision, n;
2052 .loc 1 579 3 is_stmt 1 view .LVU555
580:Core/Src/printf.c **** size_t idx = 0U;
2053 .loc 1 580 3 view .LVU556
2054 .LVL211:
581:Core/Src/printf.c ****
582:Core/Src/printf.c **** if (!buffer) {
2055 .loc 1 582 3 view .LVU557
2056 .loc 1 582 6 is_stmt 0 view .LVU558
2057 000c 8846 mov r8, r1
2058 000e 0029 cmp r1, #0
2059 0010 00F02283 beq .L283
2060 .L188:
2061 .LVL212:
2062 .LBB32:
583:Core/Src/printf.c **** // use null output function
584:Core/Src/printf.c **** out = _out_null;
585:Core/Src/printf.c **** }
586:Core/Src/printf.c ****
587:Core/Src/printf.c **** while (*format)
588:Core/Src/printf.c **** {
589:Core/Src/printf.c **** // format specifier? %[flags][width][.precision][length]
590:Core/Src/printf.c **** if (*format != '%') {
591:Core/Src/printf.c **** // no
592:Core/Src/printf.c **** out(*format, buffer, idx++, maxlen);
593:Core/Src/printf.c **** format++;
594:Core/Src/printf.c **** continue;
595:Core/Src/printf.c **** }
596:Core/Src/printf.c **** else {
597:Core/Src/printf.c **** // yes, evaluate it
598:Core/Src/printf.c **** format++;
599:Core/Src/printf.c **** }
600:Core/Src/printf.c ****
601:Core/Src/printf.c **** // evaluate flags
602:Core/Src/printf.c **** flags = 0U;
603:Core/Src/printf.c **** do {
604:Core/Src/printf.c **** switch (*format) {
605:Core/Src/printf.c **** case '0': flags |= FLAGS_ZEROPAD; format++; n = 1U; break;
606:Core/Src/printf.c **** case '-': flags |= FLAGS_LEFT; format++; n = 1U; break;
607:Core/Src/printf.c **** case '+': flags |= FLAGS_PLUS; format++; n = 1U; break;
608:Core/Src/printf.c **** case ' ': flags |= FLAGS_SPACE; format++; n = 1U; break;
609:Core/Src/printf.c **** case '#': flags |= FLAGS_HASH; format++; n = 1U; break;
610:Core/Src/printf.c **** default : n = 0U; break;
611:Core/Src/printf.c **** }
612:Core/Src/printf.c **** } while (n);
613:Core/Src/printf.c ****
614:Core/Src/printf.c **** // evaluate width field
615:Core/Src/printf.c **** width = 0U;
ARM GAS /tmp/ccibzHy5.s page 53
616:Core/Src/printf.c **** if (_is_digit(*format)) {
617:Core/Src/printf.c **** width = _atoi(&format);
618:Core/Src/printf.c **** }
619:Core/Src/printf.c **** else if (*format == '*') {
620:Core/Src/printf.c **** const int w = va_arg(va, int);
621:Core/Src/printf.c **** if (w < 0) {
622:Core/Src/printf.c **** flags |= FLAGS_LEFT; // reverse padding
623:Core/Src/printf.c **** width = (unsigned int)-w;
624:Core/Src/printf.c **** }
625:Core/Src/printf.c **** else {
626:Core/Src/printf.c **** width = (unsigned int)w;
627:Core/Src/printf.c **** }
628:Core/Src/printf.c **** format++;
629:Core/Src/printf.c **** }
630:Core/Src/printf.c ****
631:Core/Src/printf.c **** // evaluate precision field
632:Core/Src/printf.c **** precision = 0U;
633:Core/Src/printf.c **** if (*format == '.') {
634:Core/Src/printf.c **** flags |= FLAGS_PRECISION;
635:Core/Src/printf.c **** format++;
636:Core/Src/printf.c **** if (_is_digit(*format)) {
637:Core/Src/printf.c **** precision = _atoi(&format);
638:Core/Src/printf.c **** }
639:Core/Src/printf.c **** else if (*format == '*') {
640:Core/Src/printf.c **** const int prec = (int)va_arg(va, int);
641:Core/Src/printf.c **** precision = prec > 0 ? (unsigned int)prec : 0U;
642:Core/Src/printf.c **** format++;
643:Core/Src/printf.c **** }
644:Core/Src/printf.c **** }
645:Core/Src/printf.c ****
646:Core/Src/printf.c **** // evaluate length field
647:Core/Src/printf.c **** switch (*format) {
648:Core/Src/printf.c **** case 'l' :
649:Core/Src/printf.c **** flags |= FLAGS_LONG;
650:Core/Src/printf.c **** format++;
651:Core/Src/printf.c **** if (*format == 'l') {
652:Core/Src/printf.c **** flags |= FLAGS_LONG_LONG;
653:Core/Src/printf.c **** format++;
654:Core/Src/printf.c **** }
655:Core/Src/printf.c **** break;
656:Core/Src/printf.c **** case 'h' :
657:Core/Src/printf.c **** flags |= FLAGS_SHORT;
658:Core/Src/printf.c **** format++;
659:Core/Src/printf.c **** if (*format == 'h') {
660:Core/Src/printf.c **** flags |= FLAGS_CHAR;
661:Core/Src/printf.c **** format++;
662:Core/Src/printf.c **** }
663:Core/Src/printf.c **** break;
664:Core/Src/printf.c **** #if defined(PRINTF_SUPPORT_PTRDIFF_T)
665:Core/Src/printf.c **** case 't' :
666:Core/Src/printf.c **** flags |= (sizeof(ptrdiff_t) == sizeof(long) ? FLAGS_LONG : FLAGS_LONG_LONG);
667:Core/Src/printf.c **** format++;
668:Core/Src/printf.c **** break;
669:Core/Src/printf.c **** #endif
670:Core/Src/printf.c **** case 'j' :
671:Core/Src/printf.c **** flags |= (sizeof(intmax_t) == sizeof(long) ? FLAGS_LONG : FLAGS_LONG_LONG);
672:Core/Src/printf.c **** format++;
ARM GAS /tmp/ccibzHy5.s page 54
673:Core/Src/printf.c **** break;
674:Core/Src/printf.c **** case 'z' :
675:Core/Src/printf.c **** flags |= (sizeof(size_t) == sizeof(long) ? FLAGS_LONG : FLAGS_LONG_LONG);
676:Core/Src/printf.c **** format++;
677:Core/Src/printf.c **** break;
678:Core/Src/printf.c **** default :
679:Core/Src/printf.c **** break;
680:Core/Src/printf.c **** }
681:Core/Src/printf.c ****
682:Core/Src/printf.c **** // evaluate specifier
683:Core/Src/printf.c **** switch (*format) {
684:Core/Src/printf.c **** case 'd' :
685:Core/Src/printf.c **** case 'i' :
686:Core/Src/printf.c **** case 'u' :
687:Core/Src/printf.c **** case 'x' :
688:Core/Src/printf.c **** case 'X' :
689:Core/Src/printf.c **** case 'o' :
690:Core/Src/printf.c **** case 'b' : {
691:Core/Src/printf.c **** // set the base
692:Core/Src/printf.c **** unsigned int base;
693:Core/Src/printf.c **** if (*format == 'x' || *format == 'X') {
694:Core/Src/printf.c **** base = 16U;
695:Core/Src/printf.c **** }
696:Core/Src/printf.c **** else if (*format == 'o') {
697:Core/Src/printf.c **** base = 8U;
698:Core/Src/printf.c **** }
699:Core/Src/printf.c **** else if (*format == 'b') {
700:Core/Src/printf.c **** base = 2U;
701:Core/Src/printf.c **** }
702:Core/Src/printf.c **** else {
703:Core/Src/printf.c **** base = 10U;
704:Core/Src/printf.c **** flags &= ~FLAGS_HASH; // no hash for dec format
705:Core/Src/printf.c **** }
706:Core/Src/printf.c **** // uppercase
707:Core/Src/printf.c **** if (*format == 'X') {
708:Core/Src/printf.c **** flags |= FLAGS_UPPERCASE;
709:Core/Src/printf.c **** }
710:Core/Src/printf.c ****
711:Core/Src/printf.c **** // no plus or space flag for u, x, X, o, b
712:Core/Src/printf.c **** if ((*format != 'i') && (*format != 'd')) {
713:Core/Src/printf.c **** flags &= ~(FLAGS_PLUS | FLAGS_SPACE);
714:Core/Src/printf.c **** }
715:Core/Src/printf.c ****
716:Core/Src/printf.c **** // ignore '0' flag when precision is given
717:Core/Src/printf.c **** if (flags & FLAGS_PRECISION) {
718:Core/Src/printf.c **** flags &= ~FLAGS_ZEROPAD;
719:Core/Src/printf.c **** }
720:Core/Src/printf.c ****
721:Core/Src/printf.c **** // convert the integer
722:Core/Src/printf.c **** if ((*format == 'i') || (*format == 'd')) {
723:Core/Src/printf.c **** // signed
724:Core/Src/printf.c **** if (flags & FLAGS_LONG_LONG) {
725:Core/Src/printf.c **** #if defined(PRINTF_SUPPORT_LONG_LONG)
726:Core/Src/printf.c **** const long long value = va_arg(va, long long);
727:Core/Src/printf.c **** idx = _ntoa_long_long(out, buffer, idx, maxlen, (unsigned long long)(value > 0 ? value
728:Core/Src/printf.c **** #endif
729:Core/Src/printf.c **** }
ARM GAS /tmp/ccibzHy5.s page 55
730:Core/Src/printf.c **** else if (flags & FLAGS_LONG) {
731:Core/Src/printf.c **** const long value = va_arg(va, long);
732:Core/Src/printf.c **** idx = _ntoa_long(out, buffer, idx, maxlen, (unsigned long)(value > 0 ? value : 0 - valu
733:Core/Src/printf.c **** }
734:Core/Src/printf.c **** else {
735:Core/Src/printf.c **** const int value = (flags & FLAGS_CHAR) ? (char)va_arg(va, int) : (flags & FLAGS_SHORT)
736:Core/Src/printf.c **** idx = _ntoa_long(out, buffer, idx, maxlen, (unsigned int)(value > 0 ? value : 0 - value
737:Core/Src/printf.c **** }
738:Core/Src/printf.c **** }
739:Core/Src/printf.c **** else {
740:Core/Src/printf.c **** // unsigned
741:Core/Src/printf.c **** if (flags & FLAGS_LONG_LONG) {
742:Core/Src/printf.c **** #if defined(PRINTF_SUPPORT_LONG_LONG)
743:Core/Src/printf.c **** idx = _ntoa_long_long(out, buffer, idx, maxlen, va_arg(va, unsigned long long), false,
744:Core/Src/printf.c **** #endif
745:Core/Src/printf.c **** }
746:Core/Src/printf.c **** else if (flags & FLAGS_LONG) {
747:Core/Src/printf.c **** idx = _ntoa_long(out, buffer, idx, maxlen, va_arg(va, unsigned long), false, base, prec
748:Core/Src/printf.c **** }
749:Core/Src/printf.c **** else {
750:Core/Src/printf.c **** const unsigned int value = (flags & FLAGS_CHAR) ? (unsigned char)va_arg(va, unsigned in
751:Core/Src/printf.c **** idx = _ntoa_long(out, buffer, idx, maxlen, value, false, base, precision, width, flags)
752:Core/Src/printf.c **** }
753:Core/Src/printf.c **** }
754:Core/Src/printf.c **** format++;
755:Core/Src/printf.c **** break;
756:Core/Src/printf.c **** }
757:Core/Src/printf.c **** #if defined(PRINTF_SUPPORT_FLOAT)
758:Core/Src/printf.c **** case 'f' :
759:Core/Src/printf.c **** case 'F' :
760:Core/Src/printf.c **** if (*format == 'F') flags |= FLAGS_UPPERCASE;
761:Core/Src/printf.c **** idx = _ftoa(out, buffer, idx, maxlen, va_arg(va, double), precision, width, flags);
762:Core/Src/printf.c **** format++;
763:Core/Src/printf.c **** break;
764:Core/Src/printf.c **** #if defined(PRINTF_SUPPORT_EXPONENTIAL)
765:Core/Src/printf.c **** case 'e':
766:Core/Src/printf.c **** case 'E':
767:Core/Src/printf.c **** case 'g':
768:Core/Src/printf.c **** case 'G':
769:Core/Src/printf.c **** if ((*format == 'g')||(*format == 'G')) flags |= FLAGS_ADAPT_EXP;
770:Core/Src/printf.c **** if ((*format == 'E')||(*format == 'G')) flags |= FLAGS_UPPERCASE;
771:Core/Src/printf.c **** idx = _etoa(out, buffer, idx, maxlen, va_arg(va, double), precision, width, flags);
772:Core/Src/printf.c **** format++;
773:Core/Src/printf.c **** break;
774:Core/Src/printf.c **** #endif // PRINTF_SUPPORT_EXPONENTIAL
775:Core/Src/printf.c **** #endif // PRINTF_SUPPORT_FLOAT
776:Core/Src/printf.c **** case 'c' : {
777:Core/Src/printf.c **** unsigned int l = 1U;
778:Core/Src/printf.c **** // pre padding
779:Core/Src/printf.c **** if (!(flags & FLAGS_LEFT)) {
780:Core/Src/printf.c **** while (l++ < width) {
781:Core/Src/printf.c **** out(' ', buffer, idx++, maxlen);
782:Core/Src/printf.c **** }
783:Core/Src/printf.c **** }
784:Core/Src/printf.c **** // char output
785:Core/Src/printf.c **** out((char)va_arg(va, int), buffer, idx++, maxlen);
786:Core/Src/printf.c **** // post padding
ARM GAS /tmp/ccibzHy5.s page 56
787:Core/Src/printf.c **** if (flags & FLAGS_LEFT) {
788:Core/Src/printf.c **** while (l++ < width) {
789:Core/Src/printf.c **** out(' ', buffer, idx++, maxlen);
790:Core/Src/printf.c **** }
791:Core/Src/printf.c **** }
792:Core/Src/printf.c **** format++;
793:Core/Src/printf.c **** break;
2063 .loc 1 793 9 view .LVU559
2064 0014 0024 movs r4, #0
2065 .LVL213:
2066 .L265:
2067 .loc 1 793 9 view .LVU560
2068 .LBE32:
587:Core/Src/printf.c **** {
2069 .loc 1 587 9 is_stmt 1 view .LVU561
587:Core/Src/printf.c **** {
2070 .loc 1 587 10 is_stmt 0 view .LVU562
2071 0016 0D9B ldr r3, [sp, #52]
2072 0018 1878 ldrb r0, [r3] @ zero_extendqisi2
587:Core/Src/printf.c **** {
2073 .loc 1 587 9 view .LVU563
2074 001a 0028 cmp r0, #0
2075 001c 00F01E83 beq .L284
590:Core/Src/printf.c **** // no
2076 .loc 1 590 5 is_stmt 1 view .LVU564
590:Core/Src/printf.c **** // no
2077 .loc 1 590 8 is_stmt 0 view .LVU565
2078 0020 2528 cmp r0, #37
2079 0022 09D0 beq .L190
592:Core/Src/printf.c **** format++;
2080 .loc 1 592 7 is_stmt 1 view .LVU566
2081 0024 651C adds r5, r4, #1
2082 .LVL214:
592:Core/Src/printf.c **** format++;
2083 .loc 1 592 7 is_stmt 0 view .LVU567
2084 0026 3346 mov r3, r6
2085 0028 2246 mov r2, r4
2086 002a 4146 mov r1, r8
2087 002c B847 blx r7
2088 .LVL215:
593:Core/Src/printf.c **** continue;
2089 .loc 1 593 7 is_stmt 1 view .LVU568
593:Core/Src/printf.c **** continue;
2090 .loc 1 593 13 is_stmt 0 view .LVU569
2091 002e 0D9B ldr r3, [sp, #52]
2092 0030 0133 adds r3, r3, #1
2093 0032 0D93 str r3, [sp, #52]
594:Core/Src/printf.c **** }
2094 .loc 1 594 7 is_stmt 1 view .LVU570
592:Core/Src/printf.c **** format++;
2095 .loc 1 592 7 is_stmt 0 view .LVU571
2096 0034 2C46 mov r4, r5
594:Core/Src/printf.c **** }
2097 .loc 1 594 7 view .LVU572
2098 0036 EEE7 b .L265
2099 .LVL216:
2100 .L190:
ARM GAS /tmp/ccibzHy5.s page 57
598:Core/Src/printf.c **** }
2101 .loc 1 598 7 is_stmt 1 view .LVU573
598:Core/Src/printf.c **** }
2102 .loc 1 598 13 is_stmt 0 view .LVU574
2103 0038 0133 adds r3, r3, #1
2104 003a 0D93 str r3, [sp, #52]
602:Core/Src/printf.c **** do {
2105 .loc 1 602 5 is_stmt 1 view .LVU575
2106 .LVL217:
602:Core/Src/printf.c **** do {
2107 .loc 1 602 11 is_stmt 0 view .LVU576
2108 003c 0025 movs r5, #0
2109 .LVL218:
2110 .L192:
603:Core/Src/printf.c **** switch (*format) {
2111 .loc 1 603 5 is_stmt 1 view .LVU577
604:Core/Src/printf.c **** case '0': flags |= FLAGS_ZEROPAD; format++; n = 1U; break;
2112 .loc 1 604 7 view .LVU578
604:Core/Src/printf.c **** case '0': flags |= FLAGS_ZEROPAD; format++; n = 1U; break;
2113 .loc 1 604 15 is_stmt 0 view .LVU579
2114 003e 0D9B ldr r3, [sp, #52]
2115 0040 1978 ldrb r1, [r3] @ zero_extendqisi2
2116 0042 A1F12002 sub r2, r1, #32
2117 0046 102A cmp r2, #16
2118 0048 0AD8 bhi .L193
2119 004a DFE802F0 tbb [pc, r2]
2120 .L195:
2121 004e 38 .byte (.L199-.L195)/2
2122 004f 09 .byte (.L193-.L195)/2
2123 0050 09 .byte (.L193-.L195)/2
2124 0051 3D .byte (.L198-.L195)/2
2125 0052 09 .byte (.L193-.L195)/2
2126 0053 09 .byte (.L193-.L195)/2
2127 0054 09 .byte (.L193-.L195)/2
2128 0055 09 .byte (.L193-.L195)/2
2129 0056 09 .byte (.L193-.L195)/2
2130 0057 09 .byte (.L193-.L195)/2
2131 0058 09 .byte (.L193-.L195)/2
2132 0059 33 .byte (.L197-.L195)/2
2133 005a 09 .byte (.L193-.L195)/2
2134 005b 2E .byte (.L196-.L195)/2
2135 005c 09 .byte (.L193-.L195)/2
2136 005d 09 .byte (.L193-.L195)/2
2137 005e 29 .byte (.L194-.L195)/2
2138 005f 00 .p2align 1
2139 .L193:
2140 .LVL219:
612:Core/Src/printf.c ****
2141 .loc 1 612 13 is_stmt 1 view .LVU580
615:Core/Src/printf.c **** if (_is_digit(*format)) {
2142 .loc 1 615 5 view .LVU581
616:Core/Src/printf.c **** width = _atoi(&format);
2143 .loc 1 616 5 view .LVU582
2144 .LBB33:
2145 .LBI33:
181:Core/Src/printf.c **** {
2146 .loc 1 181 20 view .LVU583
ARM GAS /tmp/ccibzHy5.s page 58
2147 .LBB34:
183:Core/Src/printf.c **** }
2148 .loc 1 183 3 view .LVU584
183:Core/Src/printf.c **** }
2149 .loc 1 183 22 is_stmt 0 view .LVU585
2150 0060 A1F13003 sub r3, r1, #48
2151 0064 DBB2 uxtb r3, r3
2152 .LVL220:
183:Core/Src/printf.c **** }
2153 .loc 1 183 22 view .LVU586
2154 .LBE34:
2155 .LBE33:
616:Core/Src/printf.c **** width = _atoi(&format);
2156 .loc 1 616 8 view .LVU587
2157 0066 092B cmp r3, #9
2158 0068 33D9 bls .L285
619:Core/Src/printf.c **** const int w = va_arg(va, int);
2159 .loc 1 619 10 is_stmt 1 view .LVU588
619:Core/Src/printf.c **** const int w = va_arg(va, int);
2160 .loc 1 619 13 is_stmt 0 view .LVU589
2161 006a 2A29 cmp r1, #42
2162 006c 36D0 beq .L286
615:Core/Src/printf.c **** if (_is_digit(*format)) {
2163 .loc 1 615 11 view .LVU590
2164 006e 0023 movs r3, #0
2165 0070 0A93 str r3, [sp, #40]
2166 .LVL221:
2167 .L203:
632:Core/Src/printf.c **** if (*format == '.') {
2168 .loc 1 632 5 is_stmt 1 view .LVU591
633:Core/Src/printf.c **** flags |= FLAGS_PRECISION;
2169 .loc 1 633 5 view .LVU592
633:Core/Src/printf.c **** flags |= FLAGS_PRECISION;
2170 .loc 1 633 9 is_stmt 0 view .LVU593
2171 0072 0D9B ldr r3, [sp, #52]
2172 0074 1A78 ldrb r2, [r3] @ zero_extendqisi2
633:Core/Src/printf.c **** flags |= FLAGS_PRECISION;
2173 .loc 1 633 8 view .LVU594
2174 0076 2E2A cmp r2, #46
2175 0078 40D0 beq .L287
632:Core/Src/printf.c **** if (*format == '.') {
2176 .loc 1 632 15 view .LVU595
2177 007a 4FF0000B mov fp, #0
2178 .LVL222:
2179 .L206:
647:Core/Src/printf.c **** case 'l' :
2180 .loc 1 647 5 is_stmt 1 view .LVU596
647:Core/Src/printf.c **** case 'l' :
2181 .loc 1 647 13 is_stmt 0 view .LVU597
2182 007e 0D9A ldr r2, [sp, #52]
2183 0080 1378 ldrb r3, [r2] @ zero_extendqisi2
2184 0082 683B subs r3, r3, #104
2185 0084 122B cmp r3, #18
2186 0086 77D8 bhi .L208
2187 0088 DFE803F0 tbb [pc, r3]
2188 .L210:
2189 008c 64 .byte (.L214-.L210)/2
ARM GAS /tmp/ccibzHy5.s page 59
2190 008d 76 .byte (.L208-.L210)/2
2191 008e D3 .byte (.L213-.L210)/2
2192 008f 76 .byte (.L208-.L210)/2
2193 0090 56 .byte (.L212-.L210)/2
2194 0091 76 .byte (.L208-.L210)/2
2195 0092 76 .byte (.L208-.L210)/2
2196 0093 76 .byte (.L208-.L210)/2
2197 0094 76 .byte (.L208-.L210)/2
2198 0095 76 .byte (.L208-.L210)/2
2199 0096 76 .byte (.L208-.L210)/2
2200 0097 76 .byte (.L208-.L210)/2
2201 0098 72 .byte (.L211-.L210)/2
2202 0099 76 .byte (.L208-.L210)/2
2203 009a 76 .byte (.L208-.L210)/2
2204 009b 76 .byte (.L208-.L210)/2
2205 009c 76 .byte (.L208-.L210)/2
2206 009d 76 .byte (.L208-.L210)/2
2207 009e D8 .byte (.L209-.L210)/2
2208 .LVL223:
2209 009f 00 .p2align 1
2210 .L194:
605:Core/Src/printf.c **** case '-': flags |= FLAGS_LEFT; format++; n = 1U; break;
2211 .loc 1 605 19 is_stmt 1 view .LVU598
605:Core/Src/printf.c **** case '-': flags |= FLAGS_LEFT; format++; n = 1U; break;
2212 .loc 1 605 25 is_stmt 0 view .LVU599
2213 00a0 45F00105 orr r5, r5, #1
2214 .LVL224:
605:Core/Src/printf.c **** case '-': flags |= FLAGS_LEFT; format++; n = 1U; break;
2215 .loc 1 605 43 is_stmt 1 view .LVU600
605:Core/Src/printf.c **** case '-': flags |= FLAGS_LEFT; format++; n = 1U; break;
2216 .loc 1 605 49 is_stmt 0 view .LVU601
2217 00a4 0133 adds r3, r3, #1
2218 00a6 0D93 str r3, [sp, #52]
605:Core/Src/printf.c **** case '-': flags |= FLAGS_LEFT; format++; n = 1U; break;
2219 .loc 1 605 53 is_stmt 1 view .LVU602
2220 .LVL225:
605:Core/Src/printf.c **** case '-': flags |= FLAGS_LEFT; format++; n = 1U; break;
2221 .loc 1 605 61 view .LVU603
612:Core/Src/printf.c ****
2222 .loc 1 612 13 view .LVU604
2223 00a8 C9E7 b .L192
2224 .LVL226:
2225 .L196:
606:Core/Src/printf.c **** case '+': flags |= FLAGS_PLUS; format++; n = 1U; break;
2226 .loc 1 606 19 view .LVU605
606:Core/Src/printf.c **** case '+': flags |= FLAGS_PLUS; format++; n = 1U; break;
2227 .loc 1 606 25 is_stmt 0 view .LVU606
2228 00aa 45F00205 orr r5, r5, #2
2229 .LVL227:
606:Core/Src/printf.c **** case '+': flags |= FLAGS_PLUS; format++; n = 1U; break;
2230 .loc 1 606 43 is_stmt 1 view .LVU607
606:Core/Src/printf.c **** case '+': flags |= FLAGS_PLUS; format++; n = 1U; break;
2231 .loc 1 606 49 is_stmt 0 view .LVU608
2232 00ae 0133 adds r3, r3, #1
2233 00b0 0D93 str r3, [sp, #52]
606:Core/Src/printf.c **** case '+': flags |= FLAGS_PLUS; format++; n = 1U; break;
2234 .loc 1 606 53 is_stmt 1 view .LVU609
ARM GAS /tmp/ccibzHy5.s page 60
2235 .LVL228:
606:Core/Src/printf.c **** case '+': flags |= FLAGS_PLUS; format++; n = 1U; break;
2236 .loc 1 606 61 view .LVU610
612:Core/Src/printf.c ****
2237 .loc 1 612 13 view .LVU611
2238 00b2 C4E7 b .L192
2239 .LVL229:
2240 .L197:
607:Core/Src/printf.c **** case ' ': flags |= FLAGS_SPACE; format++; n = 1U; break;
2241 .loc 1 607 19 view .LVU612
607:Core/Src/printf.c **** case ' ': flags |= FLAGS_SPACE; format++; n = 1U; break;
2242 .loc 1 607 25 is_stmt 0 view .LVU613
2243 00b4 45F00405 orr r5, r5, #4
2244 .LVL230:
607:Core/Src/printf.c **** case ' ': flags |= FLAGS_SPACE; format++; n = 1U; break;
2245 .loc 1 607 43 is_stmt 1 view .LVU614
607:Core/Src/printf.c **** case ' ': flags |= FLAGS_SPACE; format++; n = 1U; break;
2246 .loc 1 607 49 is_stmt 0 view .LVU615
2247 00b8 0133 adds r3, r3, #1
2248 00ba 0D93 str r3, [sp, #52]
607:Core/Src/printf.c **** case ' ': flags |= FLAGS_SPACE; format++; n = 1U; break;
2249 .loc 1 607 53 is_stmt 1 view .LVU616
2250 .LVL231:
607:Core/Src/printf.c **** case ' ': flags |= FLAGS_SPACE; format++; n = 1U; break;
2251 .loc 1 607 61 view .LVU617
612:Core/Src/printf.c ****
2252 .loc 1 612 13 view .LVU618
2253 00bc BFE7 b .L192
2254 .LVL232:
2255 .L199:
608:Core/Src/printf.c **** case '#': flags |= FLAGS_HASH; format++; n = 1U; break;
2256 .loc 1 608 19 view .LVU619
608:Core/Src/printf.c **** case '#': flags |= FLAGS_HASH; format++; n = 1U; break;
2257 .loc 1 608 25 is_stmt 0 view .LVU620
2258 00be 45F00805 orr r5, r5, #8
2259 .LVL233:
608:Core/Src/printf.c **** case '#': flags |= FLAGS_HASH; format++; n = 1U; break;
2260 .loc 1 608 43 is_stmt 1 view .LVU621
608:Core/Src/printf.c **** case '#': flags |= FLAGS_HASH; format++; n = 1U; break;
2261 .loc 1 608 49 is_stmt 0 view .LVU622
2262 00c2 0133 adds r3, r3, #1
2263 00c4 0D93 str r3, [sp, #52]
608:Core/Src/printf.c **** case '#': flags |= FLAGS_HASH; format++; n = 1U; break;
2264 .loc 1 608 53 is_stmt 1 view .LVU623
2265 .LVL234:
608:Core/Src/printf.c **** case '#': flags |= FLAGS_HASH; format++; n = 1U; break;
2266 .loc 1 608 61 view .LVU624
612:Core/Src/printf.c ****
2267 .loc 1 612 13 view .LVU625
2268 00c6 BAE7 b .L192
2269 .LVL235:
2270 .L198:
609:Core/Src/printf.c **** default : n = 0U; break;
2271 .loc 1 609 19 view .LVU626
609:Core/Src/printf.c **** default : n = 0U; break;
2272 .loc 1 609 25 is_stmt 0 view .LVU627
2273 00c8 45F01005 orr r5, r5, #16
ARM GAS /tmp/ccibzHy5.s page 61
2274 .LVL236:
609:Core/Src/printf.c **** default : n = 0U; break;
2275 .loc 1 609 43 is_stmt 1 view .LVU628
609:Core/Src/printf.c **** default : n = 0U; break;
2276 .loc 1 609 49 is_stmt 0 view .LVU629
2277 00cc 0133 adds r3, r3, #1
2278 00ce 0D93 str r3, [sp, #52]
609:Core/Src/printf.c **** default : n = 0U; break;
2279 .loc 1 609 53 is_stmt 1 view .LVU630
2280 .LVL237:
609:Core/Src/printf.c **** default : n = 0U; break;
2281 .loc 1 609 61 view .LVU631
612:Core/Src/printf.c ****
2282 .loc 1 612 13 view .LVU632
2283 00d0 B5E7 b .L192
2284 .LVL238:
2285 .L285:
617:Core/Src/printf.c **** }
2286 .loc 1 617 7 view .LVU633
617:Core/Src/printf.c **** }
2287 .loc 1 617 15 is_stmt 0 view .LVU634
2288 00d2 0DA8 add r0, sp, #52
2289 00d4 FFF7FEFF bl _atoi
2290 .LVL239:
2291 00d8 0A90 str r0, [sp, #40]
2292 .LVL240:
617:Core/Src/printf.c **** }
2293 .loc 1 617 15 view .LVU635
2294 00da CAE7 b .L203
2295 .LVL241:
2296 .L286:
2297 .LBB35:
620:Core/Src/printf.c **** if (w < 0) {
2298 .loc 1 620 7 is_stmt 1 view .LVU636
620:Core/Src/printf.c **** if (w < 0) {
2299 .loc 1 620 17 is_stmt 0 view .LVU637
2300 00dc 189B ldr r3, [sp, #96]
2301 00de 1A1D adds r2, r3, #4
2302 00e0 1892 str r2, [sp, #96]
2303 00e2 1868 ldr r0, [r3]
621:Core/Src/printf.c **** flags |= FLAGS_LEFT; // reverse padding
2304 .loc 1 621 7 is_stmt 1 view .LVU638
621:Core/Src/printf.c **** flags |= FLAGS_LEFT; // reverse padding
2305 .loc 1 621 10 is_stmt 0 view .LVU639
2306 00e4 0028 cmp r0, #0
2307 00e6 04DB blt .L288
626:Core/Src/printf.c **** }
2308 .loc 1 626 9 is_stmt 1 view .LVU640
626:Core/Src/printf.c **** }
2309 .loc 1 626 15 is_stmt 0 view .LVU641
2310 00e8 0A90 str r0, [sp, #40]
2311 .LVL242:
2312 .L205:
628:Core/Src/printf.c **** }
2313 .loc 1 628 7 is_stmt 1 view .LVU642
628:Core/Src/printf.c **** }
2314 .loc 1 628 13 is_stmt 0 view .LVU643
ARM GAS /tmp/ccibzHy5.s page 62
2315 00ea 0D9B ldr r3, [sp, #52]
2316 00ec 0133 adds r3, r3, #1
2317 00ee 0D93 str r3, [sp, #52]
2318 00f0 BFE7 b .L203
2319 .LVL243:
2320 .L288:
622:Core/Src/printf.c **** width = (unsigned int)-w;
2321 .loc 1 622 9 is_stmt 1 view .LVU644
622:Core/Src/printf.c **** width = (unsigned int)-w;
2322 .loc 1 622 15 is_stmt 0 view .LVU645
2323 00f2 45F00205 orr r5, r5, #2
2324 .LVL244:
623:Core/Src/printf.c **** }
2325 .loc 1 623 9 is_stmt 1 view .LVU646
623:Core/Src/printf.c **** }
2326 .loc 1 623 31 is_stmt 0 view .LVU647
2327 00f6 4342 rsbs r3, r0, #0
2328 00f8 0A93 str r3, [sp, #40]
2329 .LVL245:
623:Core/Src/printf.c **** }
2330 .loc 1 623 31 view .LVU648
2331 00fa F6E7 b .L205
2332 .LVL246:
2333 .L287:
623:Core/Src/printf.c **** }
2334 .loc 1 623 31 view .LVU649
2335 .LBE35:
634:Core/Src/printf.c **** format++;
2336 .loc 1 634 7 is_stmt 1 view .LVU650
634:Core/Src/printf.c **** format++;
2337 .loc 1 634 13 is_stmt 0 view .LVU651
2338 00fc 45F48065 orr r5, r5, #1024
2339 .LVL247:
635:Core/Src/printf.c **** if (_is_digit(*format)) {
2340 .loc 1 635 7 is_stmt 1 view .LVU652
635:Core/Src/printf.c **** if (_is_digit(*format)) {
2341 .loc 1 635 13 is_stmt 0 view .LVU653
2342 0100 5A1C adds r2, r3, #1
2343 0102 0D92 str r2, [sp, #52]
636:Core/Src/printf.c **** precision = _atoi(&format);
2344 .loc 1 636 7 is_stmt 1 view .LVU654
636:Core/Src/printf.c **** precision = _atoi(&format);
2345 .loc 1 636 11 is_stmt 0 view .LVU655
2346 0104 5A78 ldrb r2, [r3, #1] @ zero_extendqisi2
2347 .LVL248:
2348 .LBB36:
2349 .LBI36:
181:Core/Src/printf.c **** {
2350 .loc 1 181 20 is_stmt 1 view .LVU656
2351 .LBB37:
183:Core/Src/printf.c **** }
2352 .loc 1 183 3 view .LVU657
183:Core/Src/printf.c **** }
2353 .loc 1 183 22 is_stmt 0 view .LVU658
2354 0106 A2F13003 sub r3, r2, #48
2355 010a DBB2 uxtb r3, r3
2356 .LVL249:
ARM GAS /tmp/ccibzHy5.s page 63
183:Core/Src/printf.c **** }
2357 .loc 1 183 22 view .LVU659
2358 .LBE37:
2359 .LBE36:
636:Core/Src/printf.c **** precision = _atoi(&format);
2360 .loc 1 636 10 view .LVU660
2361 010c 092B cmp r3, #9
2362 010e 04D9 bls .L289
639:Core/Src/printf.c **** const int prec = (int)va_arg(va, int);
2363 .loc 1 639 12 is_stmt 1 view .LVU661
639:Core/Src/printf.c **** const int prec = (int)va_arg(va, int);
2364 .loc 1 639 15 is_stmt 0 view .LVU662
2365 0110 2A2A cmp r2, #42
2366 0112 07D0 beq .L290
632:Core/Src/printf.c **** if (*format == '.') {
2367 .loc 1 632 15 view .LVU663
2368 0114 4FF0000B mov fp, #0
2369 0118 B1E7 b .L206
2370 .L289:
637:Core/Src/printf.c **** }
2371 .loc 1 637 9 is_stmt 1 view .LVU664
637:Core/Src/printf.c **** }
2372 .loc 1 637 21 is_stmt 0 view .LVU665
2373 011a 0DA8 add r0, sp, #52
2374 011c FFF7FEFF bl _atoi
2375 .LVL250:
2376 0120 8346 mov fp, r0
2377 .LVL251:
637:Core/Src/printf.c **** }
2378 .loc 1 637 21 view .LVU666
2379 0122 ACE7 b .L206
2380 .LVL252:
2381 .L290:
2382 .LBB38:
640:Core/Src/printf.c **** precision = prec > 0 ? (unsigned int)prec : 0U;
2383 .loc 1 640 9 is_stmt 1 view .LVU667
640:Core/Src/printf.c **** precision = prec > 0 ? (unsigned int)prec : 0U;
2384 .loc 1 640 19 is_stmt 0 view .LVU668
2385 0124 189B ldr r3, [sp, #96]
2386 0126 1A1D adds r2, r3, #4
2387 0128 1892 str r2, [sp, #96]
2388 012a 1B68 ldr r3, [r3]
641:Core/Src/printf.c **** format++;
2389 .loc 1 641 9 is_stmt 1 view .LVU669
641:Core/Src/printf.c **** format++;
2390 .loc 1 641 51 is_stmt 0 view .LVU670
2391 012c 23EAE37B bic fp, r3, r3, asr #31
2392 .LVL253:
642:Core/Src/printf.c **** }
2393 .loc 1 642 9 is_stmt 1 view .LVU671
642:Core/Src/printf.c **** }
2394 .loc 1 642 15 is_stmt 0 view .LVU672
2395 0130 0D9B ldr r3, [sp, #52]
2396 0132 0133 adds r3, r3, #1
2397 0134 0D93 str r3, [sp, #52]
2398 0136 A2E7 b .L206
2399 .L212:
ARM GAS /tmp/ccibzHy5.s page 64
642:Core/Src/printf.c **** }
2400 .loc 1 642 15 view .LVU673
2401 .LBE38:
649:Core/Src/printf.c **** format++;
2402 .loc 1 649 9 is_stmt 1 view .LVU674
649:Core/Src/printf.c **** format++;
2403 .loc 1 649 15 is_stmt 0 view .LVU675
2404 0138 45F48071 orr r1, r5, #256
2405 .LVL254:
650:Core/Src/printf.c **** if (*format == 'l') {
2406 .loc 1 650 9 is_stmt 1 view .LVU676
650:Core/Src/printf.c **** if (*format == 'l') {
2407 .loc 1 650 15 is_stmt 0 view .LVU677
2408 013c 531C adds r3, r2, #1
2409 013e 0D93 str r3, [sp, #52]
651:Core/Src/printf.c **** flags |= FLAGS_LONG_LONG;
2410 .loc 1 651 9 is_stmt 1 view .LVU678
651:Core/Src/printf.c **** flags |= FLAGS_LONG_LONG;
2411 .loc 1 651 13 is_stmt 0 view .LVU679
2412 0140 5278 ldrb r2, [r2, #1] @ zero_extendqisi2
651:Core/Src/printf.c **** flags |= FLAGS_LONG_LONG;
2413 .loc 1 651 12 view .LVU680
2414 0142 6C2A cmp r2, #108
2415 0144 01D0 beq .L291
649:Core/Src/printf.c **** format++;
2416 .loc 1 649 15 view .LVU681
2417 0146 0D46 mov r5, r1
2418 0148 16E0 b .L208
2419 .L291:
652:Core/Src/printf.c **** format++;
2420 .loc 1 652 11 is_stmt 1 view .LVU682
652:Core/Src/printf.c **** format++;
2421 .loc 1 652 17 is_stmt 0 view .LVU683
2422 014a 45F44075 orr r5, r5, #768
2423 .LVL255:
653:Core/Src/printf.c **** }
2424 .loc 1 653 11 is_stmt 1 view .LVU684
653:Core/Src/printf.c **** }
2425 .loc 1 653 17 is_stmt 0 view .LVU685
2426 014e 0133 adds r3, r3, #1
2427 0150 0D93 str r3, [sp, #52]
2428 0152 11E0 b .L208
2429 .L214:
657:Core/Src/printf.c **** format++;
2430 .loc 1 657 9 is_stmt 1 view .LVU686
657:Core/Src/printf.c **** format++;
2431 .loc 1 657 15 is_stmt 0 view .LVU687
2432 0154 45F08001 orr r1, r5, #128
2433 .LVL256:
658:Core/Src/printf.c **** if (*format == 'h') {
2434 .loc 1 658 9 is_stmt 1 view .LVU688
658:Core/Src/printf.c **** if (*format == 'h') {
2435 .loc 1 658 15 is_stmt 0 view .LVU689
2436 0158 531C adds r3, r2, #1
2437 015a 0D93 str r3, [sp, #52]
659:Core/Src/printf.c **** flags |= FLAGS_CHAR;
2438 .loc 1 659 9 is_stmt 1 view .LVU690
ARM GAS /tmp/ccibzHy5.s page 65
659:Core/Src/printf.c **** flags |= FLAGS_CHAR;
2439 .loc 1 659 13 is_stmt 0 view .LVU691
2440 015c 5278 ldrb r2, [r2, #1] @ zero_extendqisi2
659:Core/Src/printf.c **** flags |= FLAGS_CHAR;
2441 .loc 1 659 12 view .LVU692
2442 015e 682A cmp r2, #104
2443 0160 01D0 beq .L292
657:Core/Src/printf.c **** format++;
2444 .loc 1 657 15 view .LVU693
2445 0162 0D46 mov r5, r1
2446 0164 08E0 b .L208
2447 .L292:
660:Core/Src/printf.c **** format++;
2448 .loc 1 660 11 is_stmt 1 view .LVU694
660:Core/Src/printf.c **** format++;
2449 .loc 1 660 17 is_stmt 0 view .LVU695
2450 0166 45F0C005 orr r5, r5, #192
2451 .LVL257:
661:Core/Src/printf.c **** }
2452 .loc 1 661 11 is_stmt 1 view .LVU696
661:Core/Src/printf.c **** }
2453 .loc 1 661 17 is_stmt 0 view .LVU697
2454 016a 0133 adds r3, r3, #1
2455 016c 0D93 str r3, [sp, #52]
2456 016e 03E0 b .L208
2457 .L211:
666:Core/Src/printf.c **** format++;
2458 .loc 1 666 9 is_stmt 1 view .LVU698
666:Core/Src/printf.c **** format++;
2459 .loc 1 666 15 is_stmt 0 view .LVU699
2460 0170 45F48075 orr r5, r5, #256
2461 .LVL258:
667:Core/Src/printf.c **** break;
2462 .loc 1 667 9 is_stmt 1 view .LVU700
667:Core/Src/printf.c **** break;
2463 .loc 1 667 15 is_stmt 0 view .LVU701
2464 0174 0132 adds r2, r2, #1
2465 0176 0D92 str r2, [sp, #52]
668:Core/Src/printf.c **** #endif
2466 .loc 1 668 9 is_stmt 1 view .LVU702
2467 .L208:
683:Core/Src/printf.c **** case 'd' :
2468 .loc 1 683 5 view .LVU703
683:Core/Src/printf.c **** case 'd' :
2469 .loc 1 683 13 is_stmt 0 view .LVU704
2470 0178 0D9B ldr r3, [sp, #52]
2471 017a 1878 ldrb r0, [r3] @ zero_extendqisi2
2472 017c A0F12503 sub r3, r0, #37
2473 0180 532B cmp r3, #83
2474 0182 00F25F82 bhi .L215
2475 0186 DFE813F0 tbh [pc, r3, lsl #1]
2476 .L217:
2477 018a 5202 .2byte (.L223-.L217)/2
2478 018c 5D02 .2byte (.L215-.L217)/2
2479 018e 5D02 .2byte (.L215-.L217)/2
2480 0190 5D02 .2byte (.L215-.L217)/2
2481 0192 5D02 .2byte (.L215-.L217)/2
ARM GAS /tmp/ccibzHy5.s page 66
2482 0194 5D02 .2byte (.L215-.L217)/2
2483 0196 5D02 .2byte (.L215-.L217)/2
2484 0198 5D02 .2byte (.L215-.L217)/2
2485 019a 5D02 .2byte (.L215-.L217)/2
2486 019c 5D02 .2byte (.L215-.L217)/2
2487 019e 5D02 .2byte (.L215-.L217)/2
2488 01a0 5D02 .2byte (.L215-.L217)/2
2489 01a2 5D02 .2byte (.L215-.L217)/2
2490 01a4 5D02 .2byte (.L215-.L217)/2
2491 01a6 5D02 .2byte (.L215-.L217)/2
2492 01a8 5D02 .2byte (.L215-.L217)/2
2493 01aa 5D02 .2byte (.L215-.L217)/2
2494 01ac 5D02 .2byte (.L215-.L217)/2
2495 01ae 5D02 .2byte (.L215-.L217)/2
2496 01b0 5D02 .2byte (.L215-.L217)/2
2497 01b2 5D02 .2byte (.L215-.L217)/2
2498 01b4 5D02 .2byte (.L215-.L217)/2
2499 01b6 5D02 .2byte (.L215-.L217)/2
2500 01b8 5D02 .2byte (.L215-.L217)/2
2501 01ba 5D02 .2byte (.L215-.L217)/2
2502 01bc 5D02 .2byte (.L215-.L217)/2
2503 01be 5D02 .2byte (.L215-.L217)/2
2504 01c0 5D02 .2byte (.L215-.L217)/2
2505 01c2 5D02 .2byte (.L215-.L217)/2
2506 01c4 5D02 .2byte (.L215-.L217)/2
2507 01c6 5D02 .2byte (.L215-.L217)/2
2508 01c8 5D02 .2byte (.L215-.L217)/2
2509 01ca 6D01 .2byte (.L220-.L217)/2
2510 01cc 4F01 .2byte (.L221-.L217)/2
2511 01ce 6D01 .2byte (.L220-.L217)/2
2512 01d0 5D02 .2byte (.L215-.L217)/2
2513 01d2 5D02 .2byte (.L215-.L217)/2
2514 01d4 5D02 .2byte (.L215-.L217)/2
2515 01d6 5D02 .2byte (.L215-.L217)/2
2516 01d8 5D02 .2byte (.L215-.L217)/2
2517 01da 5D02 .2byte (.L215-.L217)/2
2518 01dc 5D02 .2byte (.L215-.L217)/2
2519 01de 5D02 .2byte (.L215-.L217)/2
2520 01e0 5D02 .2byte (.L215-.L217)/2
2521 01e2 5D02 .2byte (.L215-.L217)/2
2522 01e4 5D02 .2byte (.L215-.L217)/2
2523 01e6 5D02 .2byte (.L215-.L217)/2
2524 01e8 5D02 .2byte (.L215-.L217)/2
2525 01ea 5D02 .2byte (.L215-.L217)/2
2526 01ec 5D02 .2byte (.L215-.L217)/2
2527 01ee 5D02 .2byte (.L215-.L217)/2
2528 01f0 5E00 .2byte (.L216-.L217)/2
2529 01f2 5D02 .2byte (.L215-.L217)/2
2530 01f4 5D02 .2byte (.L215-.L217)/2
2531 01f6 5D02 .2byte (.L215-.L217)/2
2532 01f8 5D02 .2byte (.L215-.L217)/2
2533 01fa 5D02 .2byte (.L215-.L217)/2
2534 01fc 5D02 .2byte (.L215-.L217)/2
2535 01fe 5D02 .2byte (.L215-.L217)/2
2536 0200 5D02 .2byte (.L215-.L217)/2
2537 0202 5D02 .2byte (.L215-.L217)/2
2538 0204 5E00 .2byte (.L216-.L217)/2
ARM GAS /tmp/ccibzHy5.s page 67
2539 0206 9901 .2byte (.L222-.L217)/2
2540 0208 5E00 .2byte (.L216-.L217)/2
2541 020a 6D01 .2byte (.L220-.L217)/2
2542 020c 4F01 .2byte (.L221-.L217)/2
2543 020e 6D01 .2byte (.L220-.L217)/2
2544 0210 5D02 .2byte (.L215-.L217)/2
2545 0212 5E00 .2byte (.L216-.L217)/2
2546 0214 5D02 .2byte (.L215-.L217)/2
2547 0216 5D02 .2byte (.L215-.L217)/2
2548 0218 5D02 .2byte (.L215-.L217)/2
2549 021a 5D02 .2byte (.L215-.L217)/2
2550 021c 5D02 .2byte (.L215-.L217)/2
2551 021e 5E00 .2byte (.L216-.L217)/2
2552 0220 3702 .2byte (.L219-.L217)/2
2553 0222 5D02 .2byte (.L215-.L217)/2
2554 0224 5D02 .2byte (.L215-.L217)/2
2555 0226 D201 .2byte (.L218-.L217)/2
2556 0228 5D02 .2byte (.L215-.L217)/2
2557 022a 5E00 .2byte (.L216-.L217)/2
2558 022c 5D02 .2byte (.L215-.L217)/2
2559 022e 5D02 .2byte (.L215-.L217)/2
2560 0230 5E00 .2byte (.L216-.L217)/2
2561 .p2align 1
2562 .L213:
671:Core/Src/printf.c **** format++;
2563 .loc 1 671 9 is_stmt 1 view .LVU705
671:Core/Src/printf.c **** format++;
2564 .loc 1 671 15 is_stmt 0 view .LVU706
2565 0232 45F40075 orr r5, r5, #512
2566 .LVL259:
672:Core/Src/printf.c **** break;
2567 .loc 1 672 9 is_stmt 1 view .LVU707
672:Core/Src/printf.c **** break;
2568 .loc 1 672 15 is_stmt 0 view .LVU708
2569 0236 0132 adds r2, r2, #1
2570 0238 0D92 str r2, [sp, #52]
673:Core/Src/printf.c **** case 'z' :
2571 .loc 1 673 9 is_stmt 1 view .LVU709
2572 023a 9DE7 b .L208
2573 .L209:
675:Core/Src/printf.c **** format++;
2574 .loc 1 675 9 view .LVU710
675:Core/Src/printf.c **** format++;
2575 .loc 1 675 15 is_stmt 0 view .LVU711
2576 023c 45F48075 orr r5, r5, #256
2577 .LVL260:
676:Core/Src/printf.c **** break;
2578 .loc 1 676 9 is_stmt 1 view .LVU712
676:Core/Src/printf.c **** break;
2579 .loc 1 676 15 is_stmt 0 view .LVU713
2580 0240 0132 adds r2, r2, #1
2581 0242 0D92 str r2, [sp, #52]
677:Core/Src/printf.c **** default :
2582 .loc 1 677 9 is_stmt 1 view .LVU714
2583 0244 98E7 b .L208
2584 .L216:
2585 .LBB39:
ARM GAS /tmp/ccibzHy5.s page 68
692:Core/Src/printf.c **** if (*format == 'x' || *format == 'X') {
2586 .loc 1 692 9 view .LVU715
693:Core/Src/printf.c **** base = 16U;
2587 .loc 1 693 9 view .LVU716
693:Core/Src/printf.c **** base = 16U;
2588 .loc 1 693 12 is_stmt 0 view .LVU717
2589 0246 5828 cmp r0, #88
2590 0248 18BF it ne
2591 024a 7828 cmpne r0, #120
2592 024c 07D0 beq .L274
696:Core/Src/printf.c **** base = 8U;
2593 .loc 1 696 14 is_stmt 1 view .LVU718
696:Core/Src/printf.c **** base = 8U;
2594 .loc 1 696 17 is_stmt 0 view .LVU719
2595 024e 6F28 cmp r0, #111
2596 0250 3CD0 beq .L275
699:Core/Src/printf.c **** base = 2U;
2597 .loc 1 699 14 is_stmt 1 view .LVU720
699:Core/Src/printf.c **** base = 2U;
2598 .loc 1 699 17 is_stmt 0 view .LVU721
2599 0252 6228 cmp r0, #98
2600 0254 3CD0 beq .L276
703:Core/Src/printf.c **** flags &= ~FLAGS_HASH; // no hash for dec format
2601 .loc 1 703 11 is_stmt 1 view .LVU722
2602 .LVL261:
704:Core/Src/printf.c **** }
2603 .loc 1 704 11 view .LVU723
704:Core/Src/printf.c **** }
2604 .loc 1 704 17 is_stmt 0 view .LVU724
2605 0256 25F01005 bic r5, r5, #16
2606 .LVL262:
703:Core/Src/printf.c **** flags &= ~FLAGS_HASH; // no hash for dec format
2607 .loc 1 703 16 view .LVU725
2608 025a 0A23 movs r3, #10
2609 025c 00E0 b .L224
2610 .LVL263:
2611 .L274:
694:Core/Src/printf.c **** }
2612 .loc 1 694 16 view .LVU726
2613 025e 1023 movs r3, #16
2614 .L224:
2615 .LVL264:
707:Core/Src/printf.c **** flags |= FLAGS_UPPERCASE;
2616 .loc 1 707 9 is_stmt 1 view .LVU727
707:Core/Src/printf.c **** flags |= FLAGS_UPPERCASE;
2617 .loc 1 707 12 is_stmt 0 view .LVU728
2618 0260 5828 cmp r0, #88
2619 0262 37D0 beq .L293
2620 .L225:
712:Core/Src/printf.c **** flags &= ~(FLAGS_PLUS | FLAGS_SPACE);
2621 .loc 1 712 9 is_stmt 1 view .LVU729
712:Core/Src/printf.c **** flags &= ~(FLAGS_PLUS | FLAGS_SPACE);
2622 .loc 1 712 12 is_stmt 0 view .LVU730
2623 0264 6928 cmp r0, #105
2624 0266 18BF it ne
2625 0268 6428 cmpne r0, #100
2626 026a 01D0 beq .L226
ARM GAS /tmp/ccibzHy5.s page 69
713:Core/Src/printf.c **** }
2627 .loc 1 713 11 is_stmt 1 view .LVU731
713:Core/Src/printf.c **** }
2628 .loc 1 713 17 is_stmt 0 view .LVU732
2629 026c 25F00C05 bic r5, r5, #12
2630 .LVL265:
2631 .L226:
717:Core/Src/printf.c **** flags &= ~FLAGS_ZEROPAD;
2632 .loc 1 717 9 is_stmt 1 view .LVU733
717:Core/Src/printf.c **** flags &= ~FLAGS_ZEROPAD;
2633 .loc 1 717 12 is_stmt 0 view .LVU734
2634 0270 15F4806F tst r5, #1024
2635 0274 01D0 beq .L227
718:Core/Src/printf.c **** }
2636 .loc 1 718 11 is_stmt 1 view .LVU735
718:Core/Src/printf.c **** }
2637 .loc 1 718 17 is_stmt 0 view .LVU736
2638 0276 25F00105 bic r5, r5, #1
2639 .LVL266:
2640 .L227:
722:Core/Src/printf.c **** // signed
2641 .loc 1 722 9 is_stmt 1 view .LVU737
722:Core/Src/printf.c **** // signed
2642 .loc 1 722 12 is_stmt 0 view .LVU738
2643 027a 6428 cmp r0, #100
2644 027c 18BF it ne
2645 027e 6928 cmpne r0, #105
2646 0280 76D1 bne .L228
724:Core/Src/printf.c **** #if defined(PRINTF_SUPPORT_LONG_LONG)
2647 .loc 1 724 11 is_stmt 1 view .LVU739
724:Core/Src/printf.c **** #if defined(PRINTF_SUPPORT_LONG_LONG)
2648 .loc 1 724 14 is_stmt 0 view .LVU740
2649 0282 15F4007F tst r5, #512
2650 0286 28D1 bne .L294
730:Core/Src/printf.c **** const long value = va_arg(va, long);
2651 .loc 1 730 16 is_stmt 1 view .LVU741
730:Core/Src/printf.c **** const long value = va_arg(va, long);
2652 .loc 1 730 19 is_stmt 0 view .LVU742
2653 0288 15F4807F tst r5, #256
2654 028c 49D1 bne .L295
2655 .LBB40:
735:Core/Src/printf.c **** idx = _ntoa_long(out, buffer, idx, maxlen, (unsigned int)(value > 0 ? value : 0 - value
2656 .loc 1 735 13 is_stmt 1 view .LVU743
735:Core/Src/printf.c **** idx = _ntoa_long(out, buffer, idx, maxlen, (unsigned int)(value > 0 ? value : 0 - value
2657 .loc 1 735 76 is_stmt 0 view .LVU744
2658 028e 15F0400F tst r5, #64
2659 0292 5FD0 beq .L233
735:Core/Src/printf.c **** idx = _ntoa_long(out, buffer, idx, maxlen, (unsigned int)(value > 0 ? value : 0 - value
2660 .loc 1 735 60 view .LVU745
2661 0294 189A ldr r2, [sp, #96]
2662 0296 111D adds r1, r2, #4
2663 0298 1891 str r1, [sp, #96]
2664 029a 1278 ldrb r2, [r2] @ zero_extendqisi2
2665 .L234:
2666 .LVL267:
736:Core/Src/printf.c **** }
2667 .loc 1 736 13 is_stmt 1 discriminator 8 view .LVU746
ARM GAS /tmp/ccibzHy5.s page 70
736:Core/Src/printf.c **** }
2668 .loc 1 736 56 is_stmt 0 discriminator 8 view .LVU747
2669 029c 82EAE271 eor r1, r2, r2, asr #31
2670 02a0 A1EBE271 sub r1, r1, r2, asr #31
736:Core/Src/printf.c **** }
2671 .loc 1 736 19 discriminator 8 view .LVU748
2672 02a4 0595 str r5, [sp, #20]
2673 02a6 0A98 ldr r0, [sp, #40]
2674 02a8 0490 str r0, [sp, #16]
2675 02aa CDF80CB0 str fp, [sp, #12]
2676 02ae 0293 str r3, [sp, #8]
2677 02b0 D20F lsrs r2, r2, #31
2678 .LVL268:
736:Core/Src/printf.c **** }
2679 .loc 1 736 19 discriminator 8 view .LVU749
2680 02b2 0192 str r2, [sp, #4]
2681 02b4 0091 str r1, [sp]
2682 02b6 3346 mov r3, r6
2683 .LVL269:
736:Core/Src/printf.c **** }
2684 .loc 1 736 19 discriminator 8 view .LVU750
2685 02b8 2246 mov r2, r4
2686 02ba 4146 mov r1, r8
2687 02bc 3846 mov r0, r7
2688 02be FFF7FEFF bl _ntoa_long
2689 .LVL270:
736:Core/Src/printf.c **** }
2690 .loc 1 736 19 discriminator 8 view .LVU751
2691 02c2 0446 mov r4, r0
2692 .LVL271:
2693 .L231:
736:Core/Src/printf.c **** }
2694 .loc 1 736 19 discriminator 8 view .LVU752
2695 .LBE40:
754:Core/Src/printf.c **** break;
2696 .loc 1 754 9 is_stmt 1 view .LVU753
754:Core/Src/printf.c **** break;
2697 .loc 1 754 15 is_stmt 0 view .LVU754
2698 02c4 0D9B ldr r3, [sp, #52]
2699 02c6 0133 adds r3, r3, #1
2700 02c8 0D93 str r3, [sp, #52]
755:Core/Src/printf.c **** }
2701 .loc 1 755 9 is_stmt 1 view .LVU755
2702 02ca A4E6 b .L265
2703 .LVL272:
2704 .L275:
697:Core/Src/printf.c **** }
2705 .loc 1 697 16 is_stmt 0 view .LVU756
2706 02cc 0823 movs r3, #8
2707 02ce C7E7 b .L224
2708 .L276:
700:Core/Src/printf.c **** }
2709 .loc 1 700 16 view .LVU757
2710 02d0 0223 movs r3, #2
2711 02d2 C5E7 b .L224
2712 .LVL273:
2713 .L293:
ARM GAS /tmp/ccibzHy5.s page 71
708:Core/Src/printf.c **** }
2714 .loc 1 708 11 is_stmt 1 view .LVU758
708:Core/Src/printf.c **** }
2715 .loc 1 708 17 is_stmt 0 view .LVU759
2716 02d4 45F02005 orr r5, r5, #32
2717 .LVL274:
708:Core/Src/printf.c **** }
2718 .loc 1 708 17 view .LVU760
2719 02d8 C4E7 b .L225
2720 .L294:
2721 .LBB41:
726:Core/Src/printf.c **** idx = _ntoa_long_long(out, buffer, idx, maxlen, (unsigned long long)(value > 0 ? value
2722 .loc 1 726 13 is_stmt 1 view .LVU761
726:Core/Src/printf.c **** idx = _ntoa_long_long(out, buffer, idx, maxlen, (unsigned long long)(value > 0 ? value
2723 .loc 1 726 29 is_stmt 0 view .LVU762
2724 02da 189A ldr r2, [sp, #96]
2725 02dc 0732 adds r2, r2, #7
2726 02de 22F00702 bic r2, r2, #7
2727 02e2 02F10801 add r1, r2, #8
2728 02e6 1891 str r1, [sp, #96]
2729 02e8 5168 ldr r1, [r2, #4]
727:Core/Src/printf.c **** #endif
2730 .loc 1 727 13 is_stmt 1 view .LVU763
727:Core/Src/printf.c **** #endif
2731 .loc 1 727 61 is_stmt 0 view .LVU764
2732 02ea 1268 ldr r2, [r2]
2733 02ec 0846 mov r0, r1
2734 02ee 0029 cmp r1, #0
2735 02f0 13DB blt .L296
2736 .L230:
727:Core/Src/printf.c **** #endif
2737 .loc 1 727 19 view .LVU765
2738 02f2 0895 str r5, [sp, #32]
2739 02f4 0A9D ldr r5, [sp, #40]
2740 .LVL275:
727:Core/Src/printf.c **** #endif
2741 .loc 1 727 19 view .LVU766
2742 02f6 0795 str r5, [sp, #28]
2743 02f8 CDF818B0 str fp, [sp, #24]
2744 02fc 0493 str r3, [sp, #16]
2745 02fe 0023 movs r3, #0
2746 .LVL276:
727:Core/Src/printf.c **** #endif
2747 .loc 1 727 19 view .LVU767
2748 0300 0593 str r3, [sp, #20]
2749 0302 C90F lsrs r1, r1, #31
2750 0304 0291 str r1, [sp, #8]
2751 0306 0092 str r2, [sp]
2752 0308 0190 str r0, [sp, #4]
2753 030a 3346 mov r3, r6
2754 030c 2246 mov r2, r4
2755 030e 4146 mov r1, r8
2756 0310 3846 mov r0, r7
2757 0312 FFF7FEFF bl _ntoa_long_long
2758 .LVL277:
727:Core/Src/printf.c **** #endif
2759 .loc 1 727 19 view .LVU768
ARM GAS /tmp/ccibzHy5.s page 72
2760 0316 0446 mov r4, r0
2761 .LVL278:
727:Core/Src/printf.c **** #endif
2762 .loc 1 727 19 view .LVU769
2763 .LBE41:
2764 0318 D4E7 b .L231
2765 .LVL279:
2766 .L296:
2767 .LBB42:
727:Core/Src/printf.c **** #endif
2768 .loc 1 727 61 view .LVU770
2769 031a 5242 negs r2, r2
2770 031c 61EB4100 sbc r0, r1, r1, lsl #1
2771 0320 E7E7 b .L230
2772 .L295:
2773 .LBE42:
2774 .LBB43:
731:Core/Src/printf.c **** idx = _ntoa_long(out, buffer, idx, maxlen, (unsigned long)(value > 0 ? value : 0 - valu
2775 .loc 1 731 13 is_stmt 1 view .LVU771
731:Core/Src/printf.c **** idx = _ntoa_long(out, buffer, idx, maxlen, (unsigned long)(value > 0 ? value : 0 - valu
2776 .loc 1 731 24 is_stmt 0 view .LVU772
2777 0322 189A ldr r2, [sp, #96]
2778 0324 111D adds r1, r2, #4
2779 0326 1891 str r1, [sp, #96]
2780 0328 1268 ldr r2, [r2]
732:Core/Src/printf.c **** }
2781 .loc 1 732 13 is_stmt 1 view .LVU773
732:Core/Src/printf.c **** }
2782 .loc 1 732 56 is_stmt 0 view .LVU774
2783 032a 82EAE271 eor r1, r2, r2, asr #31
2784 032e A1EBE271 sub r1, r1, r2, asr #31
732:Core/Src/printf.c **** }
2785 .loc 1 732 19 view .LVU775
2786 0332 0595 str r5, [sp, #20]
2787 0334 0A98 ldr r0, [sp, #40]
2788 0336 0490 str r0, [sp, #16]
2789 0338 CDF80CB0 str fp, [sp, #12]
2790 033c 0293 str r3, [sp, #8]
2791 033e D20F lsrs r2, r2, #31
2792 0340 0192 str r2, [sp, #4]
2793 0342 0091 str r1, [sp]
2794 0344 3346 mov r3, r6
2795 .LVL280:
732:Core/Src/printf.c **** }
2796 .loc 1 732 19 view .LVU776
2797 0346 2246 mov r2, r4
2798 0348 4146 mov r1, r8
2799 034a 3846 mov r0, r7
2800 034c FFF7FEFF bl _ntoa_long
2801 .LVL281:
732:Core/Src/printf.c **** }
2802 .loc 1 732 19 view .LVU777
2803 0350 0446 mov r4, r0
2804 .LVL282:
732:Core/Src/printf.c **** }
2805 .loc 1 732 19 view .LVU778
2806 .LBE43:
ARM GAS /tmp/ccibzHy5.s page 73
2807 0352 B7E7 b .L231
2808 .LVL283:
2809 .L233:
2810 .LBB44:
735:Core/Src/printf.c **** idx = _ntoa_long(out, buffer, idx, maxlen, (unsigned int)(value > 0 ? value : 0 - value
2811 .loc 1 735 129 discriminator 2 view .LVU779
2812 0354 15F0800F tst r5, #128
2813 0358 05D0 beq .L235
735:Core/Src/printf.c **** idx = _ntoa_long(out, buffer, idx, maxlen, (unsigned int)(value > 0 ? value : 0 - value
2814 .loc 1 735 113 view .LVU780
2815 035a 189A ldr r2, [sp, #96]
2816 035c 111D adds r1, r2, #4
2817 035e 1891 str r1, [sp, #96]
735:Core/Src/printf.c **** idx = _ntoa_long(out, buffer, idx, maxlen, (unsigned int)(value > 0 ? value : 0 - value
2818 .loc 1 735 102 view .LVU781
2819 0360 B2F90020 ldrsh r2, [r2]
2820 0364 9AE7 b .L234
2821 .L235:
735:Core/Src/printf.c **** idx = _ntoa_long(out, buffer, idx, maxlen, (unsigned int)(value > 0 ? value : 0 - value
2822 .loc 1 735 129 view .LVU782
2823 0366 189A ldr r2, [sp, #96]
2824 0368 111D adds r1, r2, #4
2825 036a 1891 str r1, [sp, #96]
2826 036c 1268 ldr r2, [r2]
2827 036e 95E7 b .L234
2828 .L228:
735:Core/Src/printf.c **** idx = _ntoa_long(out, buffer, idx, maxlen, (unsigned int)(value > 0 ? value : 0 - value
2829 .loc 1 735 129 view .LVU783
2830 .LBE44:
741:Core/Src/printf.c **** #if defined(PRINTF_SUPPORT_LONG_LONG)
2831 .loc 1 741 11 is_stmt 1 view .LVU784
741:Core/Src/printf.c **** #if defined(PRINTF_SUPPORT_LONG_LONG)
2832 .loc 1 741 14 is_stmt 0 view .LVU785
2833 0370 15F4007F tst r5, #512
2834 0374 1AD1 bne .L297
746:Core/Src/printf.c **** idx = _ntoa_long(out, buffer, idx, maxlen, va_arg(va, unsigned long), false, base, prec
2835 .loc 1 746 16 is_stmt 1 view .LVU786
746:Core/Src/printf.c **** idx = _ntoa_long(out, buffer, idx, maxlen, va_arg(va, unsigned long), false, base, prec
2836 .loc 1 746 19 is_stmt 0 view .LVU787
2837 0376 15F4807F tst r5, #256
2838 037a 33D1 bne .L298
2839 .LBB45:
750:Core/Src/printf.c **** idx = _ntoa_long(out, buffer, idx, maxlen, value, false, base, precision, width, flags)
2840 .loc 1 750 13 is_stmt 1 view .LVU788
750:Core/Src/printf.c **** idx = _ntoa_long(out, buffer, idx, maxlen, value, false, base, precision, width, flags)
2841 .loc 1 750 103 is_stmt 0 view .LVU789
2842 037c 15F0400F tst r5, #64
2843 0380 45D0 beq .L238
750:Core/Src/printf.c **** idx = _ntoa_long(out, buffer, idx, maxlen, value, false, base, precision, width, flags)
2844 .loc 1 750 78 view .LVU790
2845 0382 189A ldr r2, [sp, #96]
2846 0384 111D adds r1, r2, #4
2847 0386 1891 str r1, [sp, #96]
2848 0388 1278 ldrb r2, [r2] @ zero_extendqisi2
2849 .L239:
2850 .LVL284:
751:Core/Src/printf.c **** }
ARM GAS /tmp/ccibzHy5.s page 74
2851 .loc 1 751 13 is_stmt 1 discriminator 8 view .LVU791
751:Core/Src/printf.c **** }
2852 .loc 1 751 19 is_stmt 0 discriminator 8 view .LVU792
2853 038a 0595 str r5, [sp, #20]
2854 038c 0A99 ldr r1, [sp, #40]
2855 038e 0491 str r1, [sp, #16]
2856 0390 CDF80CB0 str fp, [sp, #12]
2857 0394 0293 str r3, [sp, #8]
2858 0396 0023 movs r3, #0
2859 .LVL285:
751:Core/Src/printf.c **** }
2860 .loc 1 751 19 discriminator 8 view .LVU793
2861 0398 0193 str r3, [sp, #4]
2862 039a 0092 str r2, [sp]
2863 039c 3346 mov r3, r6
2864 039e 2246 mov r2, r4
2865 .LVL286:
751:Core/Src/printf.c **** }
2866 .loc 1 751 19 discriminator 8 view .LVU794
2867 03a0 4146 mov r1, r8
2868 03a2 3846 mov r0, r7
2869 03a4 FFF7FEFF bl _ntoa_long
2870 .LVL287:
751:Core/Src/printf.c **** }
2871 .loc 1 751 19 discriminator 8 view .LVU795
2872 03a8 0446 mov r4, r0
2873 .LVL288:
751:Core/Src/printf.c **** }
2874 .loc 1 751 19 discriminator 8 view .LVU796
2875 03aa 8BE7 b .L231
2876 .LVL289:
2877 .L297:
751:Core/Src/printf.c **** }
2878 .loc 1 751 19 discriminator 8 view .LVU797
2879 .LBE45:
743:Core/Src/printf.c **** #endif
2880 .loc 1 743 13 is_stmt 1 view .LVU798
743:Core/Src/printf.c **** #endif
2881 .loc 1 743 19 is_stmt 0 view .LVU799
2882 03ac 189A ldr r2, [sp, #96]
2883 03ae 0732 adds r2, r2, #7
2884 03b0 22F00702 bic r2, r2, #7
2885 03b4 02F10801 add r1, r2, #8
2886 03b8 1891 str r1, [sp, #96]
2887 03ba 0895 str r5, [sp, #32]
2888 03bc 0A99 ldr r1, [sp, #40]
2889 03be 0791 str r1, [sp, #28]
2890 03c0 CDF818B0 str fp, [sp, #24]
2891 03c4 0021 movs r1, #0
2892 03c6 0493 str r3, [sp, #16]
2893 03c8 0591 str r1, [sp, #20]
2894 03ca 0291 str r1, [sp, #8]
2895 03cc D2E90023 ldrd r2, [r2]
2896 03d0 CDE90023 strd r2, [sp]
2897 03d4 3346 mov r3, r6
2898 .LVL290:
743:Core/Src/printf.c **** #endif
ARM GAS /tmp/ccibzHy5.s page 75
2899 .loc 1 743 19 view .LVU800
2900 03d6 2246 mov r2, r4
2901 03d8 4146 mov r1, r8
2902 03da 3846 mov r0, r7
2903 03dc FFF7FEFF bl _ntoa_long_long
2904 .LVL291:
743:Core/Src/printf.c **** #endif
2905 .loc 1 743 19 view .LVU801
2906 03e0 0446 mov r4, r0
2907 .LVL292:
743:Core/Src/printf.c **** #endif
2908 .loc 1 743 19 view .LVU802
2909 03e2 6FE7 b .L231
2910 .LVL293:
2911 .L298:
747:Core/Src/printf.c **** }
2912 .loc 1 747 13 is_stmt 1 view .LVU803
747:Core/Src/printf.c **** }
2913 .loc 1 747 19 is_stmt 0 view .LVU804
2914 03e4 189A ldr r2, [sp, #96]
2915 03e6 111D adds r1, r2, #4
2916 03e8 1891 str r1, [sp, #96]
2917 03ea 0595 str r5, [sp, #20]
2918 03ec 0A99 ldr r1, [sp, #40]
2919 03ee 0491 str r1, [sp, #16]
2920 03f0 CDF80CB0 str fp, [sp, #12]
2921 03f4 0293 str r3, [sp, #8]
2922 03f6 0023 movs r3, #0
2923 .LVL294:
747:Core/Src/printf.c **** }
2924 .loc 1 747 19 view .LVU805
2925 03f8 0193 str r3, [sp, #4]
2926 03fa 1368 ldr r3, [r2]
2927 03fc 0093 str r3, [sp]
2928 03fe 3346 mov r3, r6
2929 0400 2246 mov r2, r4
2930 0402 4146 mov r1, r8
2931 0404 3846 mov r0, r7
2932 0406 FFF7FEFF bl _ntoa_long
2933 .LVL295:
747:Core/Src/printf.c **** }
2934 .loc 1 747 19 view .LVU806
2935 040a 0446 mov r4, r0
2936 .LVL296:
747:Core/Src/printf.c **** }
2937 .loc 1 747 19 view .LVU807
2938 040c 5AE7 b .L231
2939 .LVL297:
2940 .L238:
2941 .LBB46:
750:Core/Src/printf.c **** idx = _ntoa_long(out, buffer, idx, maxlen, value, false, base, precision, width, flags)
2942 .loc 1 750 174 discriminator 2 view .LVU808
2943 040e 15F0800F tst r5, #128
2944 0412 04D0 beq .L240
750:Core/Src/printf.c **** idx = _ntoa_long(out, buffer, idx, maxlen, value, false, base, precision, width, flags)
2945 .loc 1 750 149 view .LVU809
2946 0414 189A ldr r2, [sp, #96]
ARM GAS /tmp/ccibzHy5.s page 76
2947 0416 111D adds r1, r2, #4
2948 0418 1891 str r1, [sp, #96]
2949 041a 1288 ldrh r2, [r2]
2950 041c B5E7 b .L239
2951 .L240:
750:Core/Src/printf.c **** idx = _ntoa_long(out, buffer, idx, maxlen, value, false, base, precision, width, flags)
2952 .loc 1 750 174 view .LVU810
2953 041e 189A ldr r2, [sp, #96]
2954 0420 111D adds r1, r2, #4
2955 0422 1891 str r1, [sp, #96]
2956 0424 1268 ldr r2, [r2]
2957 0426 B0E7 b .L239
2958 .LVL298:
2959 .L221:
750:Core/Src/printf.c **** idx = _ntoa_long(out, buffer, idx, maxlen, value, false, base, precision, width, flags)
2960 .loc 1 750 174 view .LVU811
2961 .LBE46:
2962 .LBE39:
760:Core/Src/printf.c **** idx = _ftoa(out, buffer, idx, maxlen, va_arg(va, double), precision, width, flags);
2963 .loc 1 760 9 is_stmt 1 view .LVU812
760:Core/Src/printf.c **** idx = _ftoa(out, buffer, idx, maxlen, va_arg(va, double), precision, width, flags);
2964 .loc 1 760 12 is_stmt 0 view .LVU813
2965 0428 4628 cmp r0, #70
2966 042a 18D0 beq .L299
2967 .L241:
761:Core/Src/printf.c **** format++;
2968 .loc 1 761 9 is_stmt 1 view .LVU814
761:Core/Src/printf.c **** format++;
2969 .loc 1 761 15 is_stmt 0 view .LVU815
2970 042c 189B ldr r3, [sp, #96]
2971 042e 0733 adds r3, r3, #7
2972 0430 23F00703 bic r3, r3, #7
2973 0434 03F10802 add r2, r3, #8
2974 0438 1892 str r2, [sp, #96]
2975 043a 93ED000B vldr.64 d0, [r3]
2976 043e 0295 str r5, [sp, #8]
2977 0440 0A9B ldr r3, [sp, #40]
2978 0442 0193 str r3, [sp, #4]
2979 0444 CDF800B0 str fp, [sp]
2980 0448 3346 mov r3, r6
2981 044a 2246 mov r2, r4
2982 044c 4146 mov r1, r8
2983 044e 3846 mov r0, r7
2984 0450 FFF7FEFF bl _ftoa
2985 .LVL299:
2986 0454 0446 mov r4, r0
2987 .LVL300:
762:Core/Src/printf.c **** break;
2988 .loc 1 762 9 is_stmt 1 view .LVU816
762:Core/Src/printf.c **** break;
2989 .loc 1 762 15 is_stmt 0 view .LVU817
2990 0456 0D9B ldr r3, [sp, #52]
2991 0458 0133 adds r3, r3, #1
2992 045a 0D93 str r3, [sp, #52]
763:Core/Src/printf.c **** #if defined(PRINTF_SUPPORT_EXPONENTIAL)
2993 .loc 1 763 9 is_stmt 1 view .LVU818
2994 045c DBE5 b .L265
ARM GAS /tmp/ccibzHy5.s page 77
2995 .LVL301:
2996 .L299:
760:Core/Src/printf.c **** idx = _ftoa(out, buffer, idx, maxlen, va_arg(va, double), precision, width, flags);
2997 .loc 1 760 29 discriminator 1 view .LVU819
760:Core/Src/printf.c **** idx = _ftoa(out, buffer, idx, maxlen, va_arg(va, double), precision, width, flags);
2998 .loc 1 760 35 is_stmt 0 discriminator 1 view .LVU820
2999 045e 45F02005 orr r5, r5, #32
3000 .LVL302:
760:Core/Src/printf.c **** idx = _ftoa(out, buffer, idx, maxlen, va_arg(va, double), precision, width, flags);
3001 .loc 1 760 35 discriminator 1 view .LVU821
3002 0462 E3E7 b .L241
3003 .L220:
769:Core/Src/printf.c **** if ((*format == 'E')||(*format == 'G')) flags |= FLAGS_UPPERCASE;
3004 .loc 1 769 9 is_stmt 1 view .LVU822
769:Core/Src/printf.c **** if ((*format == 'E')||(*format == 'G')) flags |= FLAGS_UPPERCASE;
3005 .loc 1 769 29 is_stmt 0 view .LVU823
3006 0464 4728 cmp r0, #71
3007 0466 14BF ite ne
3008 0468 0023 movne r3, #0
3009 046a 0123 moveq r3, #1
3010 046c 6728 cmp r0, #103
3011 046e 14BF ite ne
3012 0470 1A46 movne r2, r3
3013 0472 43F00102 orreq r2, r3, #1
769:Core/Src/printf.c **** if ((*format == 'E')||(*format == 'G')) flags |= FLAGS_UPPERCASE;
3014 .loc 1 769 12 view .LVU824
3015 0476 0AB1 cbz r2, .L242
769:Core/Src/printf.c **** if ((*format == 'E')||(*format == 'G')) flags |= FLAGS_UPPERCASE;
3016 .loc 1 769 49 is_stmt 1 discriminator 1 view .LVU825
769:Core/Src/printf.c **** if ((*format == 'E')||(*format == 'G')) flags |= FLAGS_UPPERCASE;
3017 .loc 1 769 55 is_stmt 0 discriminator 1 view .LVU826
3018 0478 45F40065 orr r5, r5, #2048
3019 .LVL303:
3020 .L242:
770:Core/Src/printf.c **** idx = _etoa(out, buffer, idx, maxlen, va_arg(va, double), precision, width, flags);
3021 .loc 1 770 9 is_stmt 1 view .LVU827
770:Core/Src/printf.c **** idx = _etoa(out, buffer, idx, maxlen, va_arg(va, double), precision, width, flags);
3022 .loc 1 770 29 is_stmt 0 view .LVU828
3023 047c 4528 cmp r0, #69
3024 047e 08BF it eq
3025 0480 43F00103 orreq r3, r3, #1
770:Core/Src/printf.c **** idx = _etoa(out, buffer, idx, maxlen, va_arg(va, double), precision, width, flags);
3026 .loc 1 770 12 view .LVU829
3027 0484 0BB1 cbz r3, .L243
770:Core/Src/printf.c **** idx = _etoa(out, buffer, idx, maxlen, va_arg(va, double), precision, width, flags);
3028 .loc 1 770 49 is_stmt 1 discriminator 1 view .LVU830
770:Core/Src/printf.c **** idx = _etoa(out, buffer, idx, maxlen, va_arg(va, double), precision, width, flags);
3029 .loc 1 770 55 is_stmt 0 discriminator 1 view .LVU831
3030 0486 45F02005 orr r5, r5, #32
3031 .LVL304:
3032 .L243:
771:Core/Src/printf.c **** format++;
3033 .loc 1 771 9 is_stmt 1 view .LVU832
771:Core/Src/printf.c **** format++;
3034 .loc 1 771 15 is_stmt 0 view .LVU833
3035 048a 189B ldr r3, [sp, #96]
3036 048c 0733 adds r3, r3, #7
ARM GAS /tmp/ccibzHy5.s page 78
3037 048e 23F00703 bic r3, r3, #7
3038 0492 03F10802 add r2, r3, #8
3039 0496 1892 str r2, [sp, #96]
3040 0498 93ED000B vldr.64 d0, [r3]
3041 049c 0295 str r5, [sp, #8]
3042 049e 0A9B ldr r3, [sp, #40]
3043 04a0 0193 str r3, [sp, #4]
3044 04a2 CDF800B0 str fp, [sp]
3045 04a6 3346 mov r3, r6
3046 04a8 2246 mov r2, r4
3047 04aa 4146 mov r1, r8
3048 04ac 3846 mov r0, r7
3049 04ae FFF7FEFF bl _etoa
3050 .LVL305:
3051 04b2 0446 mov r4, r0
3052 .LVL306:
772:Core/Src/printf.c **** break;
3053 .loc 1 772 9 is_stmt 1 view .LVU834
772:Core/Src/printf.c **** break;
3054 .loc 1 772 15 is_stmt 0 view .LVU835
3055 04b4 0D9B ldr r3, [sp, #52]
3056 04b6 0133 adds r3, r3, #1
3057 04b8 0D93 str r3, [sp, #52]
773:Core/Src/printf.c **** #endif // PRINTF_SUPPORT_EXPONENTIAL
3058 .loc 1 773 9 is_stmt 1 view .LVU836
3059 04ba ACE5 b .L265
3060 .LVL307:
3061 .L222:
3062 .LBB47:
777:Core/Src/printf.c **** // pre padding
3063 .loc 1 777 9 view .LVU837
779:Core/Src/printf.c **** while (l++ < width) {
3064 .loc 1 779 9 view .LVU838
779:Core/Src/printf.c **** while (l++ < width) {
3065 .loc 1 779 12 is_stmt 0 view .LVU839
3066 04bc 15F00205 ands r5, r5, #2
3067 .LVL308:
779:Core/Src/printf.c **** while (l++ < width) {
3068 .loc 1 779 12 view .LVU840
3069 04c0 1FD0 beq .L277
777:Core/Src/printf.c **** // pre padding
3070 .loc 1 777 22 view .LVU841
3071 04c2 4FF00109 mov r9, #1
3072 .LVL309:
3073 .L245:
785:Core/Src/printf.c **** // post padding
3074 .loc 1 785 9 is_stmt 1 view .LVU842
785:Core/Src/printf.c **** // post padding
3075 .loc 1 785 19 is_stmt 0 view .LVU843
3076 04c6 1898 ldr r0, [sp, #96]
3077 04c8 031D adds r3, r0, #4
3078 04ca 1893 str r3, [sp, #96]
785:Core/Src/printf.c **** // post padding
3079 .loc 1 785 9 view .LVU844
3080 04cc 04F1010A add r10, r4, #1
3081 .LVL310:
785:Core/Src/printf.c **** // post padding
ARM GAS /tmp/ccibzHy5.s page 79
3082 .loc 1 785 9 view .LVU845
3083 04d0 3346 mov r3, r6
3084 04d2 2246 mov r2, r4
3085 04d4 4146 mov r1, r8
3086 04d6 0078 ldrb r0, [r0] @ zero_extendqisi2
3087 04d8 B847 blx r7
3088 .LVL311:
787:Core/Src/printf.c **** while (l++ < width) {
3089 .loc 1 787 9 is_stmt 1 view .LVU846
787:Core/Src/printf.c **** while (l++ < width) {
3090 .loc 1 787 12 is_stmt 0 view .LVU847
3091 04da BDB9 cbnz r5, .L300
3092 .LVL312:
3093 .L248:
792:Core/Src/printf.c **** break;
3094 .loc 1 792 9 is_stmt 1 view .LVU848
792:Core/Src/printf.c **** break;
3095 .loc 1 792 15 is_stmt 0 view .LVU849
3096 04dc 0D9B ldr r3, [sp, #52]
3097 04de 0133 adds r3, r3, #1
3098 04e0 0D93 str r3, [sp, #52]
3099 .loc 1 793 9 is_stmt 1 view .LVU850
3100 04e2 5446 mov r4, r10
3101 04e4 97E5 b .L265
3102 .LVL313:
3103 .L246:
781:Core/Src/printf.c **** }
3104 .loc 1 781 13 view .LVU851
3105 04e6 02F1010A add r10, r2, #1
3106 .LVL314:
781:Core/Src/printf.c **** }
3107 .loc 1 781 13 is_stmt 0 view .LVU852
3108 04ea 3346 mov r3, r6
3109 04ec 4146 mov r1, r8
3110 04ee 2020 movs r0, #32
3111 04f0 B847 blx r7
3112 .LVL315:
780:Core/Src/printf.c **** out(' ', buffer, idx++, maxlen);
3113 .loc 1 780 19 view .LVU853
3114 04f2 4B46 mov r3, r9
781:Core/Src/printf.c **** }
3115 .loc 1 781 13 view .LVU854
3116 04f4 5246 mov r2, r10
3117 .LVL316:
3118 .L244:
780:Core/Src/printf.c **** out(' ', buffer, idx++, maxlen);
3119 .loc 1 780 17 is_stmt 1 view .LVU855
780:Core/Src/printf.c **** out(' ', buffer, idx++, maxlen);
3120 .loc 1 780 19 is_stmt 0 view .LVU856
3121 04f6 03F10109 add r9, r3, #1
3122 .LVL317:
780:Core/Src/printf.c **** out(' ', buffer, idx++, maxlen);
3123 .loc 1 780 17 view .LVU857
3124 04fa 9B45 cmp fp, r3
3125 04fc F3D8 bhi .L246
780:Core/Src/printf.c **** out(' ', buffer, idx++, maxlen);
3126 .loc 1 780 17 view .LVU858
ARM GAS /tmp/ccibzHy5.s page 80
3127 04fe 1446 mov r4, r2
3128 0500 E1E7 b .L245
3129 .LVL318:
3130 .L277:
777:Core/Src/printf.c **** // pre padding
3131 .loc 1 777 22 view .LVU859
3132 0502 0123 movs r3, #1
3133 0504 DDF828B0 ldr fp, [sp, #40]
3134 .LVL319:
777:Core/Src/printf.c **** // pre padding
3135 .loc 1 777 22 view .LVU860
3136 0508 2246 mov r2, r4
3137 050a F4E7 b .L244
3138 .LVL320:
3139 .L300:
777:Core/Src/printf.c **** // pre padding
3140 .loc 1 777 22 view .LVU861
3141 050c 5246 mov r2, r10
3142 050e DDF828A0 ldr r10, [sp, #40]
3143 .LVL321:
777:Core/Src/printf.c **** // pre padding
3144 .loc 1 777 22 view .LVU862
3145 0512 06E0 b .L247
3146 .LVL322:
3147 .L249:
789:Core/Src/printf.c **** }
3148 .loc 1 789 13 is_stmt 1 view .LVU863
3149 0514 551C adds r5, r2, #1
3150 .LVL323:
789:Core/Src/printf.c **** }
3151 .loc 1 789 13 is_stmt 0 view .LVU864
3152 0516 3346 mov r3, r6
3153 0518 4146 mov r1, r8
3154 051a 2020 movs r0, #32
3155 051c B847 blx r7
3156 .LVL324:
788:Core/Src/printf.c **** out(' ', buffer, idx++, maxlen);
3157 .loc 1 788 19 view .LVU865
3158 051e A146 mov r9, r4
789:Core/Src/printf.c **** }
3159 .loc 1 789 13 view .LVU866
3160 0520 2A46 mov r2, r5
3161 .LVL325:
3162 .L247:
788:Core/Src/printf.c **** out(' ', buffer, idx++, maxlen);
3163 .loc 1 788 17 is_stmt 1 view .LVU867
788:Core/Src/printf.c **** out(' ', buffer, idx++, maxlen);
3164 .loc 1 788 19 is_stmt 0 view .LVU868
3165 0522 09F10104 add r4, r9, #1
3166 .LVL326:
788:Core/Src/printf.c **** out(' ', buffer, idx++, maxlen);
3167 .loc 1 788 17 view .LVU869
3168 0526 CA45 cmp r10, r9
3169 0528 F4D8 bhi .L249
788:Core/Src/printf.c **** out(' ', buffer, idx++, maxlen);
3170 .loc 1 788 17 view .LVU870
3171 052a 9246 mov r10, r2
ARM GAS /tmp/ccibzHy5.s page 81
3172 052c D6E7 b .L248
3173 .LVL327:
3174 .L218:
788:Core/Src/printf.c **** out(' ', buffer, idx++, maxlen);
3175 .loc 1 788 17 view .LVU871
3176 .LBE47:
3177 .LBB48:
794:Core/Src/printf.c **** }
795:Core/Src/printf.c ****
796:Core/Src/printf.c **** case 's' : {
797:Core/Src/printf.c **** const char* p = va_arg(va, char*);
3178 .loc 1 797 9 is_stmt 1 view .LVU872
3179 .loc 1 797 21 is_stmt 0 view .LVU873
3180 052e 189B ldr r3, [sp, #96]
3181 0530 1A1D adds r2, r3, #4
3182 0532 1892 str r2, [sp, #96]
3183 0534 D3F800A0 ldr r10, [r3]
798:Core/Src/printf.c **** unsigned int l = _strnlen_s(p, precision ? precision : (size_t)-1);
3184 .loc 1 798 9 is_stmt 1 view .LVU874
3185 .loc 1 798 26 is_stmt 0 view .LVU875
3186 0538 BBF1000F cmp fp, #0
3187 053c 1ED1 bne .L250
3188 053e 4FF0FF33 mov r3, #-1
3189 .L251:
3190 0542 D146 mov r9, r10
3191 0544 02E0 b .L252
3192 .LVL328:
3193 .L254:
3194 .LBB49:
3195 .LBB50:
174:Core/Src/printf.c **** return (unsigned int)(s - str);
3196 .loc 1 174 38 is_stmt 1 view .LVU876
174:Core/Src/printf.c **** return (unsigned int)(s - str);
3197 .loc 1 174 34 view .LVU877
3198 0546 09F10109 add r9, r9, #1
3199 .LVL329:
174:Core/Src/printf.c **** return (unsigned int)(s - str);
3200 .loc 1 174 30 is_stmt 0 view .LVU878
3201 054a 1346 mov r3, r2
3202 .LVL330:
3203 .L252:
174:Core/Src/printf.c **** return (unsigned int)(s - str);
3204 .loc 1 174 17 is_stmt 1 view .LVU879
3205 054c 99F80020 ldrb r2, [r9] @ zero_extendqisi2
174:Core/Src/printf.c **** return (unsigned int)(s - str);
3206 .loc 1 174 3 is_stmt 0 view .LVU880
3207 0550 12B1 cbz r2, .L253
174:Core/Src/printf.c **** return (unsigned int)(s - str);
3208 .loc 1 174 30 view .LVU881
3209 0552 5A1E subs r2, r3, #1
3210 .LVL331:
174:Core/Src/printf.c **** return (unsigned int)(s - str);
3211 .loc 1 174 20 view .LVU882
3212 0554 002B cmp r3, #0
3213 0556 F6D1 bne .L254
3214 .LVL332:
3215 .L253:
ARM GAS /tmp/ccibzHy5.s page 82
175:Core/Src/printf.c **** }
3216 .loc 1 175 3 is_stmt 1 view .LVU883
175:Core/Src/printf.c **** }
3217 .loc 1 175 27 is_stmt 0 view .LVU884
3218 0558 A9EB0A09 sub r9, r9, r10
3219 .LVL333:
175:Core/Src/printf.c **** }
3220 .loc 1 175 27 view .LVU885
3221 .LBE50:
3222 .LBE49:
799:Core/Src/printf.c **** // pre padding
800:Core/Src/printf.c **** if (flags & FLAGS_PRECISION) {
3223 .loc 1 800 9 is_stmt 1 view .LVU886
3224 .loc 1 800 12 is_stmt 0 view .LVU887
3225 055c 15F48063 ands r3, r5, #1024
3226 0560 0B93 str r3, [sp, #44]
3227 0562 02D0 beq .L255
801:Core/Src/printf.c **** l = (l < precision ? l : precision);
3228 .loc 1 801 11 is_stmt 1 view .LVU888
3229 .loc 1 801 13 is_stmt 0 view .LVU889
3230 0564 D945 cmp r9, fp
3231 0566 28BF it cs
3232 0568 D946 movcs r9, fp
3233 .LVL334:
3234 .L255:
802:Core/Src/printf.c **** }
803:Core/Src/printf.c **** if (!(flags & FLAGS_LEFT)) {
3235 .loc 1 803 9 is_stmt 1 view .LVU890
3236 .loc 1 803 12 is_stmt 0 view .LVU891
3237 056a 15F00203 ands r3, r5, #2
3238 056e 0C93 str r3, [sp, #48]
3239 0570 06D0 beq .L301
3240 .loc 1 803 12 view .LVU892
3241 0572 2246 mov r2, r4
3242 0574 5C46 mov r4, fp
3243 .LVL335:
3244 .loc 1 803 12 view .LVU893
3245 0576 B346 mov fp, r6
3246 .LVL336:
3247 .loc 1 803 12 view .LVU894
3248 0578 0B9E ldr r6, [sp, #44]
3249 .LVL337:
3250 .loc 1 803 12 view .LVU895
3251 057a 1DE0 b .L259
3252 .LVL338:
3253 .L250:
798:Core/Src/printf.c **** // pre padding
3254 .loc 1 798 26 view .LVU896
3255 057c 5B46 mov r3, fp
3256 057e E0E7 b .L251
3257 .LVL339:
3258 .L301:
798:Core/Src/printf.c **** // pre padding
3259 .loc 1 798 26 view .LVU897
3260 0580 2246 mov r2, r4
3261 0582 0A9C ldr r4, [sp, #40]
3262 .LVL340:
ARM GAS /tmp/ccibzHy5.s page 83
798:Core/Src/printf.c **** // pre padding
3263 .loc 1 798 26 view .LVU898
3264 0584 4B46 mov r3, r9
3265 0586 07E0 b .L256
3266 .LVL341:
3267 .L258:
804:Core/Src/printf.c **** while (l++ < width) {
805:Core/Src/printf.c **** out(' ', buffer, idx++, maxlen);
3268 .loc 1 805 13 is_stmt 1 view .LVU899
3269 0588 02F10109 add r9, r2, #1
3270 .LVL342:
3271 .loc 1 805 13 is_stmt 0 view .LVU900
3272 058c 3346 mov r3, r6
3273 058e 4146 mov r1, r8
3274 0590 2020 movs r0, #32
3275 0592 B847 blx r7
3276 .LVL343:
804:Core/Src/printf.c **** while (l++ < width) {
3277 .loc 1 804 19 view .LVU901
3278 0594 2B46 mov r3, r5
3279 .loc 1 805 13 view .LVU902
3280 0596 4A46 mov r2, r9
3281 .LVL344:
3282 .L256:
804:Core/Src/printf.c **** while (l++ < width) {
3283 .loc 1 804 17 is_stmt 1 view .LVU903
804:Core/Src/printf.c **** while (l++ < width) {
3284 .loc 1 804 19 is_stmt 0 view .LVU904
3285 0598 5D1C adds r5, r3, #1
3286 .LVL345:
804:Core/Src/printf.c **** while (l++ < width) {
3287 .loc 1 804 17 view .LVU905
3288 059a 9C42 cmp r4, r3
3289 059c F4D8 bhi .L258
804:Core/Src/printf.c **** while (l++ < width) {
3290 .loc 1 804 19 view .LVU906
3291 059e A946 mov r9, r5
3292 05a0 5C46 mov r4, fp
3293 05a2 B346 mov fp, r6
3294 .LVL346:
804:Core/Src/printf.c **** while (l++ < width) {
3295 .loc 1 804 19 view .LVU907
3296 05a4 0B9E ldr r6, [sp, #44]
3297 .LVL347:
804:Core/Src/printf.c **** while (l++ < width) {
3298 .loc 1 804 19 view .LVU908
3299 05a6 07E0 b .L259
3300 .LVL348:
3301 .L278:
806:Core/Src/printf.c **** }
807:Core/Src/printf.c **** }
808:Core/Src/printf.c **** // string output
809:Core/Src/printf.c **** while ((*p != 0) && (!(flags & FLAGS_PRECISION) || precision--)) {
3302 .loc 1 809 69 view .LVU909
3303 05a8 1C46 mov r4, r3
3304 .LVL349:
3305 .L261:
ARM GAS /tmp/ccibzHy5.s page 84
810:Core/Src/printf.c **** out(*(p++), buffer, idx++, maxlen);
3306 .loc 1 810 11 is_stmt 1 view .LVU910
3307 .loc 1 810 18 is_stmt 0 view .LVU911
3308 05aa 0AF1010A add r10, r10, #1
3309 .LVL350:
3310 .loc 1 810 11 view .LVU912
3311 05ae 551C adds r5, r2, #1
3312 .LVL351:
3313 .loc 1 810 11 view .LVU913
3314 05b0 5B46 mov r3, fp
3315 05b2 4146 mov r1, r8
3316 05b4 B847 blx r7
3317 .LVL352:
3318 05b6 2A46 mov r2, r5
3319 .LVL353:
3320 .L259:
809:Core/Src/printf.c **** out(*(p++), buffer, idx++, maxlen);
3321 .loc 1 809 15 is_stmt 1 view .LVU914
809:Core/Src/printf.c **** out(*(p++), buffer, idx++, maxlen);
3322 .loc 1 809 17 is_stmt 0 view .LVU915
3323 05b8 9AF80000 ldrb r0, [r10] @ zero_extendqisi2
809:Core/Src/printf.c **** out(*(p++), buffer, idx++, maxlen);
3324 .loc 1 809 15 view .LVU916
3325 05bc 20B1 cbz r0, .L260
809:Core/Src/printf.c **** out(*(p++), buffer, idx++, maxlen);
3326 .loc 1 809 26 discriminator 1 view .LVU917
3327 05be 002E cmp r6, #0
3328 05c0 F3D0 beq .L261
809:Core/Src/printf.c **** out(*(p++), buffer, idx++, maxlen);
3329 .loc 1 809 69 discriminator 2 view .LVU918
3330 05c2 631E subs r3, r4, #1
3331 .LVL354:
809:Core/Src/printf.c **** out(*(p++), buffer, idx++, maxlen);
3332 .loc 1 809 57 discriminator 2 view .LVU919
3333 05c4 002C cmp r4, #0
3334 05c6 EFD1 bne .L278
3335 .LVL355:
3336 .L260:
811:Core/Src/printf.c **** }
812:Core/Src/printf.c **** // post padding
813:Core/Src/printf.c **** if (flags & FLAGS_LEFT) {
3337 .loc 1 813 12 view .LVU920
3338 05c8 1446 mov r4, r2
3339 05ca 5E46 mov r6, fp
3340 .loc 1 813 9 is_stmt 1 view .LVU921
3341 .loc 1 813 12 is_stmt 0 view .LVU922
3342 05cc 0C9B ldr r3, [sp, #48]
3343 05ce 1BB9 cbnz r3, .L302
3344 .LVL356:
3345 .L263:
814:Core/Src/printf.c **** while (l++ < width) {
815:Core/Src/printf.c **** out(' ', buffer, idx++, maxlen);
816:Core/Src/printf.c **** }
817:Core/Src/printf.c **** }
818:Core/Src/printf.c **** format++;
3346 .loc 1 818 9 is_stmt 1 view .LVU923
3347 .loc 1 818 15 is_stmt 0 view .LVU924
ARM GAS /tmp/ccibzHy5.s page 85
3348 05d0 0D9B ldr r3, [sp, #52]
3349 05d2 0133 adds r3, r3, #1
3350 05d4 0D93 str r3, [sp, #52]
819:Core/Src/printf.c **** break;
3351 .loc 1 819 9 is_stmt 1 view .LVU925
3352 05d6 1EE5 b .L265
3353 .LVL357:
3354 .L302:
3355 .loc 1 819 9 is_stmt 0 view .LVU926
3356 05d8 DDF828A0 ldr r10, [sp, #40]
3357 .LVL358:
3358 .loc 1 819 9 view .LVU927
3359 05dc 06E0 b .L262
3360 .LVL359:
3361 .L264:
815:Core/Src/printf.c **** }
3362 .loc 1 815 13 is_stmt 1 view .LVU928
3363 05de 551C adds r5, r2, #1
3364 .LVL360:
815:Core/Src/printf.c **** }
3365 .loc 1 815 13 is_stmt 0 view .LVU929
3366 05e0 3346 mov r3, r6
3367 05e2 4146 mov r1, r8
3368 05e4 2020 movs r0, #32
3369 05e6 B847 blx r7
3370 .LVL361:
814:Core/Src/printf.c **** while (l++ < width) {
3371 .loc 1 814 19 view .LVU930
3372 05e8 A146 mov r9, r4
815:Core/Src/printf.c **** }
3373 .loc 1 815 13 view .LVU931
3374 05ea 2A46 mov r2, r5
3375 .LVL362:
3376 .L262:
814:Core/Src/printf.c **** while (l++ < width) {
3377 .loc 1 814 17 is_stmt 1 view .LVU932
814:Core/Src/printf.c **** while (l++ < width) {
3378 .loc 1 814 19 is_stmt 0 view .LVU933
3379 05ec 09F10104 add r4, r9, #1
3380 .LVL363:
814:Core/Src/printf.c **** while (l++ < width) {
3381 .loc 1 814 17 view .LVU934
3382 05f0 CA45 cmp r10, r9
3383 05f2 F4D8 bhi .L264
814:Core/Src/printf.c **** while (l++ < width) {
3384 .loc 1 814 17 view .LVU935
3385 05f4 1446 mov r4, r2
3386 .LVL364:
814:Core/Src/printf.c **** while (l++ < width) {
3387 .loc 1 814 17 view .LVU936
3388 05f6 EBE7 b .L263
3389 .LVL365:
3390 .L219:
814:Core/Src/printf.c **** while (l++ < width) {
3391 .loc 1 814 17 view .LVU937
3392 .LBE48:
3393 .LBB51:
ARM GAS /tmp/ccibzHy5.s page 86
820:Core/Src/printf.c **** }
821:Core/Src/printf.c ****
822:Core/Src/printf.c **** case 'p' : {
823:Core/Src/printf.c **** width = sizeof(void*) * 2U;
3394 .loc 1 823 9 is_stmt 1 view .LVU938
824:Core/Src/printf.c **** flags |= FLAGS_ZEROPAD | FLAGS_UPPERCASE;
3395 .loc 1 824 9 view .LVU939
3396 .loc 1 824 15 is_stmt 0 view .LVU940
3397 05f8 45F02105 orr r5, r5, #33
3398 .LVL366:
825:Core/Src/printf.c **** #if defined(PRINTF_SUPPORT_LONG_LONG)
826:Core/Src/printf.c **** const bool is_ll = sizeof(uintptr_t) == sizeof(long long);
3399 .loc 1 826 9 is_stmt 1 view .LVU941
827:Core/Src/printf.c **** if (is_ll) {
3400 .loc 1 827 9 view .LVU942
828:Core/Src/printf.c **** idx = _ntoa_long_long(out, buffer, idx, maxlen, (uintptr_t)va_arg(va, void*), false, 16U,
829:Core/Src/printf.c **** }
830:Core/Src/printf.c **** else {
831:Core/Src/printf.c **** #endif
832:Core/Src/printf.c **** idx = _ntoa_long(out, buffer, idx, maxlen, (unsigned long)((uintptr_t)va_arg(va, void*)),
3401 .loc 1 832 11 view .LVU943
3402 .loc 1 832 81 is_stmt 0 view .LVU944
3403 05fc 189B ldr r3, [sp, #96]
3404 05fe 1A1D adds r2, r3, #4
3405 0600 1892 str r2, [sp, #96]
3406 0602 1B68 ldr r3, [r3]
3407 .loc 1 832 17 view .LVU945
3408 0604 0595 str r5, [sp, #20]
3409 0606 0822 movs r2, #8
3410 0608 0492 str r2, [sp, #16]
3411 060a CDF80CB0 str fp, [sp, #12]
3412 060e 1022 movs r2, #16
3413 0610 0292 str r2, [sp, #8]
3414 0612 0022 movs r2, #0
3415 0614 0192 str r2, [sp, #4]
3416 0616 0093 str r3, [sp]
3417 0618 3346 mov r3, r6
3418 061a 2246 mov r2, r4
3419 061c 4146 mov r1, r8
3420 061e 3846 mov r0, r7
3421 0620 FFF7FEFF bl _ntoa_long
3422 .LVL367:
3423 0624 0446 mov r4, r0
3424 .LVL368:
833:Core/Src/printf.c **** #if defined(PRINTF_SUPPORT_LONG_LONG)
834:Core/Src/printf.c **** }
835:Core/Src/printf.c **** #endif
836:Core/Src/printf.c **** format++;
3425 .loc 1 836 9 is_stmt 1 view .LVU946
3426 .loc 1 836 15 is_stmt 0 view .LVU947
3427 0626 0D9B ldr r3, [sp, #52]
3428 0628 0133 adds r3, r3, #1
3429 062a 0D93 str r3, [sp, #52]
837:Core/Src/printf.c **** break;
3430 .loc 1 837 9 is_stmt 1 view .LVU948
3431 062c F3E4 b .L265
3432 .LVL369:
ARM GAS /tmp/ccibzHy5.s page 87
3433 .L223:
3434 .loc 1 837 9 is_stmt 0 view .LVU949
3435 .LBE51:
838:Core/Src/printf.c **** }
839:Core/Src/printf.c ****
840:Core/Src/printf.c **** case '%' :
841:Core/Src/printf.c **** out('%', buffer, idx++, maxlen);
3436 .loc 1 841 9 is_stmt 1 view .LVU950
3437 062e 651C adds r5, r4, #1
3438 .LVL370:
3439 .loc 1 841 9 is_stmt 0 view .LVU951
3440 0630 3346 mov r3, r6
3441 0632 2246 mov r2, r4
3442 0634 4146 mov r1, r8
3443 0636 2520 movs r0, #37
3444 0638 B847 blx r7
3445 .LVL371:
842:Core/Src/printf.c **** format++;
3446 .loc 1 842 9 is_stmt 1 view .LVU952
3447 .loc 1 842 15 is_stmt 0 view .LVU953
3448 063a 0D9B ldr r3, [sp, #52]
3449 063c 0133 adds r3, r3, #1
3450 063e 0D93 str r3, [sp, #52]
843:Core/Src/printf.c **** break;
3451 .loc 1 843 9 is_stmt 1 view .LVU954
841:Core/Src/printf.c **** format++;
3452 .loc 1 841 9 is_stmt 0 view .LVU955
3453 0640 2C46 mov r4, r5
3454 .loc 1 843 9 view .LVU956
3455 0642 E8E4 b .L265
3456 .LVL372:
3457 .L215:
844:Core/Src/printf.c ****
845:Core/Src/printf.c **** default :
846:Core/Src/printf.c **** out(*format, buffer, idx++, maxlen);
3458 .loc 1 846 9 is_stmt 1 view .LVU957
3459 0644 651C adds r5, r4, #1
3460 .LVL373:
3461 .loc 1 846 9 is_stmt 0 view .LVU958
3462 0646 3346 mov r3, r6
3463 0648 2246 mov r2, r4
3464 064a 4146 mov r1, r8
3465 064c B847 blx r7
3466 .LVL374:
847:Core/Src/printf.c **** format++;
3467 .loc 1 847 9 is_stmt 1 view .LVU959
3468 .loc 1 847 15 is_stmt 0 view .LVU960
3469 064e 0D9B ldr r3, [sp, #52]
3470 0650 0133 adds r3, r3, #1
3471 0652 0D93 str r3, [sp, #52]
848:Core/Src/printf.c **** break;
3472 .loc 1 848 9 is_stmt 1 view .LVU961
846:Core/Src/printf.c **** format++;
3473 .loc 1 846 9 is_stmt 0 view .LVU962
3474 0654 2C46 mov r4, r5
3475 .loc 1 848 9 view .LVU963
3476 0656 DEE4 b .L265
ARM GAS /tmp/ccibzHy5.s page 88
3477 .LVL375:
3478 .L283:
584:Core/Src/printf.c **** }
3479 .loc 1 584 9 view .LVU964
3480 0658 074F ldr r7, .L303
3481 065a DBE4 b .L188
3482 .LVL376:
3483 .L284:
849:Core/Src/printf.c **** }
850:Core/Src/printf.c **** }
851:Core/Src/printf.c ****
852:Core/Src/printf.c **** // termination
853:Core/Src/printf.c **** out((char)0, buffer, idx < maxlen ? idx : maxlen - 1U, maxlen);
3484 .loc 1 853 3 is_stmt 1 view .LVU965
3485 065c B442 cmp r4, r6
3486 065e 01D3 bcc .L279
3487 .loc 1 853 3 is_stmt 0 discriminator 1 view .LVU966
3488 0660 721E subs r2, r6, #1
3489 0662 00E0 b .L267
3490 .L279:
3491 .loc 1 853 3 view .LVU967
3492 0664 2246 mov r2, r4
3493 .L267:
3494 .loc 1 853 3 discriminator 4 view .LVU968
3495 0666 3346 mov r3, r6
3496 0668 4146 mov r1, r8
3497 066a 0020 movs r0, #0
3498 066c B847 blx r7
3499 .LVL377:
854:Core/Src/printf.c ****
855:Core/Src/printf.c **** // return written chars without terminating \0
856:Core/Src/printf.c **** return (int)idx;
3500 .loc 1 856 3 is_stmt 1 discriminator 4 view .LVU969
857:Core/Src/printf.c **** }
3501 .loc 1 857 1 is_stmt 0 discriminator 4 view .LVU970
3502 066e 2046 mov r0, r4
3503 0670 0FB0 add sp, sp, #60
3504 .LCFI26:
3505 .cfi_def_cfa_offset 36
3506 @ sp needed
3507 0672 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
3508 .LVL378:
3509 .L304:
3510 .loc 1 857 1 discriminator 4 view .LVU971
3511 0676 00BF .align 2
3512 .L303:
3513 0678 00000000 .word _out_null
3514 .cfi_endproc
3515 .LFE13:
3517 .section .text._out_char,"ax",%progbits
3518 .align 1
3519 .syntax unified
3520 .thumb
3521 .thumb_func
3522 .fpu fpv5-d16
3524 _out_char:
3525 .LVL379:
ARM GAS /tmp/ccibzHy5.s page 89
3526 .LFB2:
150:Core/Src/printf.c **** (void)buffer; (void)idx; (void)maxlen;
3527 .loc 1 150 1 is_stmt 1 view -0
3528 .cfi_startproc
3529 @ args = 0, pretend = 0, frame = 0
3530 @ frame_needed = 0, uses_anonymous_args = 0
151:Core/Src/printf.c **** if (character) {
3531 .loc 1 151 3 view .LVU973
151:Core/Src/printf.c **** if (character) {
3532 .loc 1 151 17 view .LVU974
151:Core/Src/printf.c **** if (character) {
3533 .loc 1 151 28 view .LVU975
152:Core/Src/printf.c **** _putchar(character);
3534 .loc 1 152 3 view .LVU976
152:Core/Src/printf.c **** _putchar(character);
3535 .loc 1 152 6 is_stmt 0 view .LVU977
3536 0000 00B9 cbnz r0, .L311
3537 0002 7047 bx lr
3538 .L311:
150:Core/Src/printf.c **** (void)buffer; (void)idx; (void)maxlen;
3539 .loc 1 150 1 view .LVU978
3540 0004 08B5 push {r3, lr}
3541 .LCFI27:
3542 .cfi_def_cfa_offset 8
3543 .cfi_offset 3, -8
3544 .cfi_offset 14, -4
153:Core/Src/printf.c **** }
3545 .loc 1 153 5 is_stmt 1 view .LVU979
3546 0006 FFF7FEFF bl _putchar
3547 .LVL380:
155:Core/Src/printf.c ****
3548 .loc 1 155 1 is_stmt 0 view .LVU980
3549 000a 08BD pop {r3, pc}
3550 .cfi_endproc
3551 .LFE2:
3553 .section .text.printf_,"ax",%progbits
3554 .align 1
3555 .global printf_
3556 .syntax unified
3557 .thumb
3558 .thumb_func
3559 .fpu fpv5-d16
3561 printf_:
3562 .LVL381:
3563 .LFB14:
858:Core/Src/printf.c ****
859:Core/Src/printf.c ****
860:Core/Src/printf.c **** ///////////////////////////////////////////////////////////////////////////////
861:Core/Src/printf.c ****
862:Core/Src/printf.c **** int printf_(const char* format, ...)
863:Core/Src/printf.c **** {
3564 .loc 1 863 1 is_stmt 1 view -0
3565 .cfi_startproc
3566 @ args = 4, pretend = 16, frame = 8
3567 @ frame_needed = 0, uses_anonymous_args = 1
3568 .loc 1 863 1 is_stmt 0 view .LVU982
3569 0000 0FB4 push {r0, r1, r2, r3}
ARM GAS /tmp/ccibzHy5.s page 90
3570 .LCFI28:
3571 .cfi_def_cfa_offset 16
3572 .cfi_offset 0, -16
3573 .cfi_offset 1, -12
3574 .cfi_offset 2, -8
3575 .cfi_offset 3, -4
3576 0002 00B5 push {lr}
3577 .LCFI29:
3578 .cfi_def_cfa_offset 20
3579 .cfi_offset 14, -20
3580 0004 85B0 sub sp, sp, #20
3581 .LCFI30:
3582 .cfi_def_cfa_offset 40
3583 0006 06AA add r2, sp, #24
3584 0008 52F8043B ldr r3, [r2], #4
864:Core/Src/printf.c **** va_list va;
3585 .loc 1 864 3 is_stmt 1 view .LVU983
865:Core/Src/printf.c **** va_start(va, format);
3586 .loc 1 865 3 view .LVU984
3587 000c 0392 str r2, [sp, #12]
866:Core/Src/printf.c **** char buffer[1];
3588 .loc 1 866 3 view .LVU985
867:Core/Src/printf.c **** const int ret = _vsnprintf(_out_char, buffer, (size_t)-1, format, va);
3589 .loc 1 867 3 view .LVU986
3590 .loc 1 867 19 is_stmt 0 view .LVU987
3591 000e 0092 str r2, [sp]
3592 0010 4FF0FF32 mov r2, #-1
3593 0014 02A9 add r1, sp, #8
3594 0016 0448 ldr r0, .L314
3595 0018 FFF7FEFF bl _vsnprintf
3596 .LVL382:
868:Core/Src/printf.c **** va_end(va);
3597 .loc 1 868 3 is_stmt 1 view .LVU988
869:Core/Src/printf.c **** return ret;
3598 .loc 1 869 3 view .LVU989
870:Core/Src/printf.c **** }
3599 .loc 1 870 1 is_stmt 0 view .LVU990
3600 001c 05B0 add sp, sp, #20
3601 .LCFI31:
3602 .cfi_def_cfa_offset 20
3603 @ sp needed
3604 001e 5DF804EB ldr lr, [sp], #4
3605 .LCFI32:
3606 .cfi_restore 14
3607 .cfi_def_cfa_offset 16
3608 0022 04B0 add sp, sp, #16
3609 .LCFI33:
3610 .cfi_restore 3
3611 .cfi_restore 2
3612 .cfi_restore 1
3613 .cfi_restore 0
3614 .cfi_def_cfa_offset 0
3615 0024 7047 bx lr
3616 .L315:
3617 0026 00BF .align 2
3618 .L314:
3619 0028 00000000 .word _out_char
ARM GAS /tmp/ccibzHy5.s page 91
3620 .cfi_endproc
3621 .LFE14:
3623 .section .text.sprintf_,"ax",%progbits
3624 .align 1
3625 .global sprintf_
3626 .syntax unified
3627 .thumb
3628 .thumb_func
3629 .fpu fpv5-d16
3631 sprintf_:
3632 .LVL383:
3633 .LFB15:
871:Core/Src/printf.c ****
872:Core/Src/printf.c ****
873:Core/Src/printf.c **** int sprintf_(char* buffer, const char* format, ...)
874:Core/Src/printf.c **** {
3634 .loc 1 874 1 is_stmt 1 view -0
3635 .cfi_startproc
3636 @ args = 4, pretend = 12, frame = 8
3637 @ frame_needed = 0, uses_anonymous_args = 1
3638 .loc 1 874 1 is_stmt 0 view .LVU992
3639 0000 0EB4 push {r1, r2, r3}
3640 .LCFI34:
3641 .cfi_def_cfa_offset 12
3642 .cfi_offset 1, -12
3643 .cfi_offset 2, -8
3644 .cfi_offset 3, -4
3645 0002 00B5 push {lr}
3646 .LCFI35:
3647 .cfi_def_cfa_offset 16
3648 .cfi_offset 14, -16
3649 0004 84B0 sub sp, sp, #16
3650 .LCFI36:
3651 .cfi_def_cfa_offset 32
3652 0006 0146 mov r1, r0
3653 0008 05AA add r2, sp, #20
3654 000a 52F8043B ldr r3, [r2], #4
875:Core/Src/printf.c **** va_list va;
3655 .loc 1 875 3 is_stmt 1 view .LVU993
876:Core/Src/printf.c **** va_start(va, format);
3656 .loc 1 876 3 view .LVU994
3657 000e 0392 str r2, [sp, #12]
877:Core/Src/printf.c **** const int ret = _vsnprintf(_out_buffer, buffer, (size_t)-1, format, va);
3658 .loc 1 877 3 view .LVU995
3659 .loc 1 877 19 is_stmt 0 view .LVU996
3660 0010 0092 str r2, [sp]
3661 0012 4FF0FF32 mov r2, #-1
3662 0016 0448 ldr r0, .L318
3663 .LVL384:
3664 .loc 1 877 19 view .LVU997
3665 0018 FFF7FEFF bl _vsnprintf
3666 .LVL385:
878:Core/Src/printf.c **** va_end(va);
3667 .loc 1 878 3 is_stmt 1 view .LVU998
879:Core/Src/printf.c **** return ret;
3668 .loc 1 879 3 view .LVU999
880:Core/Src/printf.c **** }
ARM GAS /tmp/ccibzHy5.s page 92
3669 .loc 1 880 1 is_stmt 0 view .LVU1000
3670 001c 04B0 add sp, sp, #16
3671 .LCFI37:
3672 .cfi_def_cfa_offset 16
3673 @ sp needed
3674 001e 5DF804EB ldr lr, [sp], #4
3675 .LCFI38:
3676 .cfi_restore 14
3677 .cfi_def_cfa_offset 12
3678 0022 03B0 add sp, sp, #12
3679 .LCFI39:
3680 .cfi_restore 3
3681 .cfi_restore 2
3682 .cfi_restore 1
3683 .cfi_def_cfa_offset 0
3684 0024 7047 bx lr
3685 .L319:
3686 0026 00BF .align 2
3687 .L318:
3688 0028 00000000 .word _out_buffer
3689 .cfi_endproc
3690 .LFE15:
3692 .section .text.snprintf_,"ax",%progbits
3693 .align 1
3694 .global snprintf_
3695 .syntax unified
3696 .thumb
3697 .thumb_func
3698 .fpu fpv5-d16
3700 snprintf_:
3701 .LVL386:
3702 .LFB16:
881:Core/Src/printf.c ****
882:Core/Src/printf.c ****
883:Core/Src/printf.c **** int snprintf_(char* buffer, size_t count, const char* format, ...)
884:Core/Src/printf.c **** {
3703 .loc 1 884 1 is_stmt 1 view -0
3704 .cfi_startproc
3705 @ args = 4, pretend = 8, frame = 8
3706 @ frame_needed = 0, uses_anonymous_args = 1
3707 .loc 1 884 1 is_stmt 0 view .LVU1002
3708 0000 0CB4 push {r2, r3}
3709 .LCFI40:
3710 .cfi_def_cfa_offset 8
3711 .cfi_offset 2, -8
3712 .cfi_offset 3, -4
3713 0002 10B5 push {r4, lr}
3714 .LCFI41:
3715 .cfi_def_cfa_offset 16
3716 .cfi_offset 4, -16
3717 .cfi_offset 14, -12
3718 0004 84B0 sub sp, sp, #16
3719 .LCFI42:
3720 .cfi_def_cfa_offset 32
3721 0006 0A46 mov r2, r1
3722 0008 06AC add r4, sp, #24
3723 000a 54F8043B ldr r3, [r4], #4
ARM GAS /tmp/ccibzHy5.s page 93
885:Core/Src/printf.c **** va_list va;
3724 .loc 1 885 3 is_stmt 1 view .LVU1003
886:Core/Src/printf.c **** va_start(va, format);
3725 .loc 1 886 3 view .LVU1004
3726 000e 0394 str r4, [sp, #12]
887:Core/Src/printf.c **** const int ret = _vsnprintf(_out_buffer, buffer, count, format, va);
3727 .loc 1 887 3 view .LVU1005
3728 .loc 1 887 19 is_stmt 0 view .LVU1006
3729 0010 0094 str r4, [sp]
3730 0012 0146 mov r1, r0
3731 .LVL387:
3732 .loc 1 887 19 view .LVU1007
3733 0014 0348 ldr r0, .L322
3734 .LVL388:
3735 .loc 1 887 19 view .LVU1008
3736 0016 FFF7FEFF bl _vsnprintf
3737 .LVL389:
888:Core/Src/printf.c **** va_end(va);
3738 .loc 1 888 3 is_stmt 1 view .LVU1009
889:Core/Src/printf.c **** return ret;
3739 .loc 1 889 3 view .LVU1010
890:Core/Src/printf.c **** }
3740 .loc 1 890 1 is_stmt 0 view .LVU1011
3741 001a 04B0 add sp, sp, #16
3742 .LCFI43:
3743 .cfi_def_cfa_offset 16
3744 @ sp needed
3745 001c BDE81040 pop {r4, lr}
3746 .LCFI44:
3747 .cfi_restore 14
3748 .cfi_restore 4
3749 .cfi_def_cfa_offset 8
3750 0020 02B0 add sp, sp, #8
3751 .LCFI45:
3752 .cfi_restore 3
3753 .cfi_restore 2
3754 .cfi_def_cfa_offset 0
3755 0022 7047 bx lr
3756 .L323:
3757 .align 2
3758 .L322:
3759 0024 00000000 .word _out_buffer
3760 .cfi_endproc
3761 .LFE16:
3763 .section .text.vprintf_,"ax",%progbits
3764 .align 1
3765 .global vprintf_
3766 .syntax unified
3767 .thumb
3768 .thumb_func
3769 .fpu fpv5-d16
3771 vprintf_:
3772 .LVL390:
3773 .LFB17:
891:Core/Src/printf.c ****
892:Core/Src/printf.c ****
893:Core/Src/printf.c **** int vprintf_(const char* format, va_list va)
ARM GAS /tmp/ccibzHy5.s page 94
894:Core/Src/printf.c **** {
3774 .loc 1 894 1 is_stmt 1 view -0
3775 .cfi_startproc
3776 @ args = 0, pretend = 0, frame = 8
3777 @ frame_needed = 0, uses_anonymous_args = 0
3778 .loc 1 894 1 is_stmt 0 view .LVU1013
3779 0000 00B5 push {lr}
3780 .LCFI46:
3781 .cfi_def_cfa_offset 4
3782 .cfi_offset 14, -4
3783 0002 85B0 sub sp, sp, #20
3784 .LCFI47:
3785 .cfi_def_cfa_offset 24
3786 0004 0346 mov r3, r0
895:Core/Src/printf.c **** char buffer[1];
3787 .loc 1 895 3 is_stmt 1 view .LVU1014
896:Core/Src/printf.c **** return _vsnprintf(_out_char, buffer, (size_t)-1, format, va);
3788 .loc 1 896 3 view .LVU1015
3789 .loc 1 896 10 is_stmt 0 view .LVU1016
3790 0006 0091 str r1, [sp]
3791 0008 4FF0FF32 mov r2, #-1
3792 000c 03A9 add r1, sp, #12
3793 .LVL391:
3794 .loc 1 896 10 view .LVU1017
3795 000e 0348 ldr r0, .L326
3796 .LVL392:
3797 .loc 1 896 10 view .LVU1018
3798 0010 FFF7FEFF bl _vsnprintf
3799 .LVL393:
897:Core/Src/printf.c **** }
3800 .loc 1 897 1 view .LVU1019
3801 0014 05B0 add sp, sp, #20
3802 .LCFI48:
3803 .cfi_def_cfa_offset 4
3804 @ sp needed
3805 0016 5DF804FB ldr pc, [sp], #4
3806 .L327:
3807 001a 00BF .align 2
3808 .L326:
3809 001c 00000000 .word _out_char
3810 .cfi_endproc
3811 .LFE17:
3813 .section .text.vsnprintf_,"ax",%progbits
3814 .align 1
3815 .global vsnprintf_
3816 .syntax unified
3817 .thumb
3818 .thumb_func
3819 .fpu fpv5-d16
3821 vsnprintf_:
3822 .LVL394:
3823 .LFB18:
898:Core/Src/printf.c ****
899:Core/Src/printf.c ****
900:Core/Src/printf.c **** int vsnprintf_(char* buffer, size_t count, const char* format, va_list va)
901:Core/Src/printf.c **** {
3824 .loc 1 901 1 is_stmt 1 view -0
ARM GAS /tmp/ccibzHy5.s page 95
3825 .cfi_startproc
3826 @ args = 0, pretend = 0, frame = 0
3827 @ frame_needed = 0, uses_anonymous_args = 0
3828 .loc 1 901 1 is_stmt 0 view .LVU1021
3829 0000 00B5 push {lr}
3830 .LCFI49:
3831 .cfi_def_cfa_offset 4
3832 .cfi_offset 14, -4
3833 0002 83B0 sub sp, sp, #12
3834 .LCFI50:
3835 .cfi_def_cfa_offset 16
902:Core/Src/printf.c **** return _vsnprintf(_out_buffer, buffer, count, format, va);
3836 .loc 1 902 3 is_stmt 1 view .LVU1022
3837 .loc 1 902 10 is_stmt 0 view .LVU1023
3838 0004 0093 str r3, [sp]
3839 0006 1346 mov r3, r2
3840 .LVL395:
3841 .loc 1 902 10 view .LVU1024
3842 0008 0A46 mov r2, r1
3843 .LVL396:
3844 .loc 1 902 10 view .LVU1025
3845 000a 0146 mov r1, r0
3846 .LVL397:
3847 .loc 1 902 10 view .LVU1026
3848 000c 0248 ldr r0, .L330
3849 .LVL398:
3850 .loc 1 902 10 view .LVU1027
3851 000e FFF7FEFF bl _vsnprintf
3852 .LVL399:
903:Core/Src/printf.c **** }
3853 .loc 1 903 1 view .LVU1028
3854 0012 03B0 add sp, sp, #12
3855 .LCFI51:
3856 .cfi_def_cfa_offset 4
3857 @ sp needed
3858 0014 5DF804FB ldr pc, [sp], #4
3859 .L331:
3860 .align 2
3861 .L330:
3862 0018 00000000 .word _out_buffer
3863 .cfi_endproc
3864 .LFE18:
3866 .section .text.fctprintf,"ax",%progbits
3867 .align 1
3868 .global fctprintf
3869 .syntax unified
3870 .thumb
3871 .thumb_func
3872 .fpu fpv5-d16
3874 fctprintf:
3875 .LVL400:
3876 .LFB19:
904:Core/Src/printf.c ****
905:Core/Src/printf.c ****
906:Core/Src/printf.c **** int fctprintf(void (*out)(char character, void* arg), void* arg, const char* format, ...)
907:Core/Src/printf.c **** {
3877 .loc 1 907 1 is_stmt 1 view -0
ARM GAS /tmp/ccibzHy5.s page 96
3878 .cfi_startproc
3879 @ args = 4, pretend = 8, frame = 16
3880 @ frame_needed = 0, uses_anonymous_args = 1
3881 .loc 1 907 1 is_stmt 0 view .LVU1030
3882 0000 0CB4 push {r2, r3}
3883 .LCFI52:
3884 .cfi_def_cfa_offset 8
3885 .cfi_offset 2, -8
3886 .cfi_offset 3, -4
3887 0002 00B5 push {lr}
3888 .LCFI53:
3889 .cfi_def_cfa_offset 12
3890 .cfi_offset 14, -12
3891 0004 87B0 sub sp, sp, #28
3892 .LCFI54:
3893 .cfi_def_cfa_offset 40
3894 0006 08AA add r2, sp, #32
3895 0008 52F8043B ldr r3, [r2], #4
908:Core/Src/printf.c **** va_list va;
3896 .loc 1 908 3 is_stmt 1 view .LVU1031
909:Core/Src/printf.c **** va_start(va, format);
3897 .loc 1 909 3 view .LVU1032
3898 000c 0592 str r2, [sp, #20]
910:Core/Src/printf.c **** const out_fct_wrap_type out_fct_wrap = { out, arg };
3899 .loc 1 910 3 view .LVU1033
3900 .loc 1 910 27 is_stmt 0 view .LVU1034
3901 000e 0390 str r0, [sp, #12]
3902 0010 0491 str r1, [sp, #16]
911:Core/Src/printf.c **** const int ret = _vsnprintf(_out_fct, (char*)(uintptr_t)&out_fct_wrap, (size_t)-1, format, va);
3903 .loc 1 911 3 is_stmt 1 view .LVU1035
3904 .loc 1 911 19 is_stmt 0 view .LVU1036
3905 0012 0092 str r2, [sp]
3906 0014 4FF0FF32 mov r2, #-1
3907 0018 03A9 add r1, sp, #12
3908 001a 0448 ldr r0, .L334
3909 .LVL401:
3910 .loc 1 911 19 view .LVU1037
3911 001c FFF7FEFF bl _vsnprintf
3912 .LVL402:
912:Core/Src/printf.c **** va_end(va);
3913 .loc 1 912 3 is_stmt 1 view .LVU1038
913:Core/Src/printf.c **** return ret;
3914 .loc 1 913 3 view .LVU1039
914:Core/Src/printf.c **** }
3915 .loc 1 914 1 is_stmt 0 view .LVU1040
3916 0020 07B0 add sp, sp, #28
3917 .LCFI55:
3918 .cfi_def_cfa_offset 12
3919 @ sp needed
3920 0022 5DF804EB ldr lr, [sp], #4
3921 .LCFI56:
3922 .cfi_restore 14
3923 .cfi_def_cfa_offset 8
3924 0026 02B0 add sp, sp, #8
3925 .LCFI57:
3926 .cfi_restore 3
3927 .cfi_restore 2
ARM GAS /tmp/ccibzHy5.s page 97
3928 .cfi_def_cfa_offset 0
3929 0028 7047 bx lr
3930 .L335:
3931 002a 00BF .align 2
3932 .L334:
3933 002c 00000000 .word _out_fct
3934 .cfi_endproc
3935 .LFE19:
3937 .section .rodata.pow10.0,"a"
3938 .align 3
3939 .set .LANCHOR0,. + 0
3942 pow10.0:
3943 0000 00000000 .word 0
3944 0004 0000F03F .word 1072693248
3945 0008 00000000 .word 0
3946 000c 00002440 .word 1076101120
3947 0010 00000000 .word 0
3948 0014 00005940 .word 1079574528
3949 0018 00000000 .word 0
3950 001c 00408F40 .word 1083129856
3951 0020 00000000 .word 0
3952 0024 0088C340 .word 1086556160
3953 0028 00000000 .word 0
3954 002c 006AF840 .word 1090021888
3955 0030 00000000 .word 0
3956 0034 80842E41 .word 1093567616
3957 0038 00000000 .word 0
3958 003c D0126341 .word 1097011920
3959 0040 00000000 .word 0
3960 0044 84D79741 .word 1100470148
3961 0048 00000000 .word 0
3962 004c 65CDCD41 .word 1104006501
3963 .text
3964 .Letext0:
3965 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h"
3966 .file 3 "/usr/arm-none-eabi/include/sys/_stdint.h"
3967 .file 4 "/usr/lib/gcc/arm-none-eabi/10.2.0/include/stdarg.h"
3968 .file 5 "/usr/lib/gcc/arm-none-eabi/10.2.0/include/stddef.h"
3969 .file 6 "<built-in>"
3970 .file 7 "Core/Inc/printf.h"
ARM GAS /tmp/ccibzHy5.s page 98
DEFINED SYMBOLS
*ABS*:0000000000000000 printf.c
/tmp/ccibzHy5.s:17 .text._out_buffer:0000000000000000 $t
/tmp/ccibzHy5.s:24 .text._out_buffer:0000000000000000 _out_buffer
/tmp/ccibzHy5.s:47 .text._out_null:0000000000000000 $t
/tmp/ccibzHy5.s:53 .text._out_null:0000000000000000 _out_null
/tmp/ccibzHy5.s:71 .text._out_fct:0000000000000000 $t
/tmp/ccibzHy5.s:77 .text._out_fct:0000000000000000 _out_fct
/tmp/ccibzHy5.s:119 .text._atoi:0000000000000000 $t
/tmp/ccibzHy5.s:125 .text._atoi:0000000000000000 _atoi
/tmp/ccibzHy5.s:190 .text._out_rev:0000000000000000 $t
/tmp/ccibzHy5.s:196 .text._out_rev:0000000000000000 _out_rev
/tmp/ccibzHy5.s:330 .text._ntoa_format:0000000000000000 $t
/tmp/ccibzHy5.s:336 .text._ntoa_format:0000000000000000 _ntoa_format
/tmp/ccibzHy5.s:616 .text._ntoa_long:0000000000000000 $t
/tmp/ccibzHy5.s:622 .text._ntoa_long:0000000000000000 _ntoa_long
/tmp/ccibzHy5.s:777 .text._ntoa_long_long:0000000000000000 $t
/tmp/ccibzHy5.s:783 .text._ntoa_long_long:0000000000000000 _ntoa_long_long
/tmp/ccibzHy5.s:960 .text._etoa:0000000000000000 $t
/tmp/ccibzHy5.s:966 .text._etoa:0000000000000000 _etoa
/tmp/ccibzHy5.s:1456 .text._ftoa:0000000000000000 _ftoa
/tmp/ccibzHy5.s:1413 .text._etoa:0000000000000280 $d
/tmp/ccibzHy5.s:1437 .rodata._ftoa.str1.4:0000000000000000 $d
/tmp/ccibzHy5.s:1450 .text._ftoa:0000000000000000 $t
/tmp/ccibzHy5.s:1999 .text._ftoa:00000000000002c8 $d
/tmp/ccibzHy5.s:2020 .text._vsnprintf:0000000000000000 $t
/tmp/ccibzHy5.s:2026 .text._vsnprintf:0000000000000000 _vsnprintf
/tmp/ccibzHy5.s:2121 .text._vsnprintf:000000000000004e $d
/tmp/ccibzHy5.s:2189 .text._vsnprintf:000000000000008c $d
/tmp/ccibzHy5.s:2477 .text._vsnprintf:000000000000018a $d
/tmp/ccibzHy5.s:2561 .text._vsnprintf:0000000000000232 $t
/tmp/ccibzHy5.s:3513 .text._vsnprintf:0000000000000678 $d
/tmp/ccibzHy5.s:3518 .text._out_char:0000000000000000 $t
/tmp/ccibzHy5.s:3524 .text._out_char:0000000000000000 _out_char
/tmp/ccibzHy5.s:3554 .text.printf_:0000000000000000 $t
/tmp/ccibzHy5.s:3561 .text.printf_:0000000000000000 printf_
/tmp/ccibzHy5.s:3619 .text.printf_:0000000000000028 $d
/tmp/ccibzHy5.s:3624 .text.sprintf_:0000000000000000 $t
/tmp/ccibzHy5.s:3631 .text.sprintf_:0000000000000000 sprintf_
/tmp/ccibzHy5.s:3688 .text.sprintf_:0000000000000028 $d
/tmp/ccibzHy5.s:3693 .text.snprintf_:0000000000000000 $t
/tmp/ccibzHy5.s:3700 .text.snprintf_:0000000000000000 snprintf_
/tmp/ccibzHy5.s:3759 .text.snprintf_:0000000000000024 $d
/tmp/ccibzHy5.s:3764 .text.vprintf_:0000000000000000 $t
/tmp/ccibzHy5.s:3771 .text.vprintf_:0000000000000000 vprintf_
/tmp/ccibzHy5.s:3809 .text.vprintf_:000000000000001c $d
/tmp/ccibzHy5.s:3814 .text.vsnprintf_:0000000000000000 $t
/tmp/ccibzHy5.s:3821 .text.vsnprintf_:0000000000000000 vsnprintf_
/tmp/ccibzHy5.s:3862 .text.vsnprintf_:0000000000000018 $d
/tmp/ccibzHy5.s:3867 .text.fctprintf:0000000000000000 $t
/tmp/ccibzHy5.s:3874 .text.fctprintf:0000000000000000 fctprintf
/tmp/ccibzHy5.s:3933 .text.fctprintf:000000000000002c $d
/tmp/ccibzHy5.s:3938 .rodata.pow10.0:0000000000000000 $d
/tmp/ccibzHy5.s:3942 .rodata.pow10.0:0000000000000000 pow10.0
/tmp/ccibzHy5.s:2138 .text._vsnprintf:000000000000005f $d
/tmp/ccibzHy5.s:2138 .text._vsnprintf:0000000000000060 $t
/tmp/ccibzHy5.s:2209 .text._vsnprintf:000000000000009f $d
ARM GAS /tmp/ccibzHy5.s page 99
/tmp/ccibzHy5.s:2209 .text._vsnprintf:00000000000000a0 $t
UNDEFINED SYMBOLS
__aeabi_uldivmod
_putchar
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