Fixed #2, fixed unstable initializatio by setting `SPI keep IO state'
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17F01E106F9F5E0A
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@ -74,7 +74,7 @@
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#define HAL_SPI_MODULE_ENABLED
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/* #define HAL_SWPMI_MODULE_ENABLED */
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#define HAL_TIM_MODULE_ENABLED
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/* #define HAL_UART_MODULE_ENABLED */
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#define HAL_UART_MODULE_ENABLED
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/* #define HAL_USART_MODULE_ENABLED */
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/* #define HAL_IRDA_MODULE_ENABLED */
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/* #define HAL_SMARTCARD_MODULE_ENABLED */
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@ -49,6 +49,8 @@ RTC_HandleTypeDef hrtc;
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SPI_HandleTypeDef hspi2;
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DMA_HandleTypeDef hdma_spi2_tx;
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UART_HandleTypeDef huart1;
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/* Definitions for defaultTask */
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osThreadId_t defaultTaskHandle;
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const osThreadAttr_t defaultTask_attributes = {
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@ -68,6 +70,7 @@ static void MX_DMA_Init(void);
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static void MX_QUADSPI_Init(void);
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static void MX_SPI2_Init(void);
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static void MX_RTC_Init(void);
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static void MX_USART1_UART_Init(void);
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void StartDefaultTask(void *argument);
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/* USER CODE BEGIN PFP */
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@ -125,6 +128,7 @@ int main(void)
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MX_QUADSPI_Init();
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MX_SPI2_Init();
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MX_RTC_Init();
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MX_USART1_UART_Init();
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/* USER CODE BEGIN 2 */
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/* USER CODE END 2 */
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@ -236,10 +240,11 @@ void SystemClock_Config(void)
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{
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Error_Handler();
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}
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PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_SPI2
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|RCC_PERIPHCLK_QSPI;
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PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_USART1
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|RCC_PERIPHCLK_SPI2|RCC_PERIPHCLK_QSPI;
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PeriphClkInitStruct.QspiClockSelection = RCC_QSPICLKSOURCE_PLL;
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PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL;
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PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
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PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
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{
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@ -352,13 +357,13 @@ static void MX_SPI2_Init(void)
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hspi2.Init.CRCPolynomial = 0x0;
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hspi2.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
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hspi2.Init.NSSPolarity = SPI_NSS_POLARITY_LOW;
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hspi2.Init.FifoThreshold = SPI_FIFO_THRESHOLD_01DATA;
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hspi2.Init.FifoThreshold = SPI_FIFO_THRESHOLD_16DATA;
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hspi2.Init.TxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
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hspi2.Init.RxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
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hspi2.Init.MasterSSIdleness = SPI_MASTER_SS_IDLENESS_00CYCLE;
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hspi2.Init.MasterInterDataIdleness = SPI_MASTER_INTERDATA_IDLENESS_00CYCLE;
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hspi2.Init.MasterReceiverAutoSusp = SPI_MASTER_RX_AUTOSUSP_DISABLE;
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hspi2.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_DISABLE;
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hspi2.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_ENABLE;
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hspi2.Init.IOSwap = SPI_IO_SWAP_DISABLE;
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if (HAL_SPI_Init(&hspi2) != HAL_OK)
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{
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@ -370,6 +375,54 @@ static void MX_SPI2_Init(void)
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}
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/**
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* @brief USART1 Initialization Function
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* @param None
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* @retval None
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*/
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static void MX_USART1_UART_Init(void)
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{
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/* USER CODE BEGIN USART1_Init 0 */
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/* USER CODE END USART1_Init 0 */
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/* USER CODE BEGIN USART1_Init 1 */
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/* USER CODE END USART1_Init 1 */
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huart1.Instance = USART1;
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huart1.Init.BaudRate = 115200;
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huart1.Init.WordLength = UART_WORDLENGTH_8B;
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huart1.Init.StopBits = UART_STOPBITS_1;
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huart1.Init.Parity = UART_PARITY_NONE;
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huart1.Init.Mode = UART_MODE_TX_RX;
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huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
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huart1.Init.OverSampling = UART_OVERSAMPLING_16;
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huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
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huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
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huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
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if (HAL_UART_Init(&huart1) != HAL_OK)
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{
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Error_Handler();
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}
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if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
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{
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Error_Handler();
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}
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if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
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{
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Error_Handler();
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}
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if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK)
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{
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Error_Handler();
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}
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/* USER CODE BEGIN USART1_Init 2 */
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/* USER CODE END USART1_Init 2 */
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}
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/**
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* Enable DMA controller clock
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*/
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@ -521,6 +574,21 @@ void MPU_Config(void)
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MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;
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MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
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HAL_MPU_ConfigRegion(&MPU_InitStruct);
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/** Initializes and configures the Region and the memory to be protected
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*/
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MPU_InitStruct.Enable = MPU_REGION_ENABLE;
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MPU_InitStruct.Number = MPU_REGION_NUMBER3;
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MPU_InitStruct.BaseAddress = 0x24000000;
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MPU_InitStruct.Size = MPU_REGION_SIZE_512KB;
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MPU_InitStruct.SubRegionDisable = 0x0;
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MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
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MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
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MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
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MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
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MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;
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MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
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HAL_MPU_ConfigRegion(&MPU_InitStruct);
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/* Enables the MPU */
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HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
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@ -349,6 +349,71 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
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}
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/**
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* @brief UART MSP Initialization
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* This function configures the hardware resources used in this example
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* @param huart: UART handle pointer
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* @retval None
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*/
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void HAL_UART_MspInit(UART_HandleTypeDef* huart)
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{
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GPIO_InitTypeDef GPIO_InitStruct = {0};
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if(huart->Instance==USART1)
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{
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/* USER CODE BEGIN USART1_MspInit 0 */
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/* USER CODE END USART1_MspInit 0 */
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/* Peripheral clock enable */
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__HAL_RCC_USART1_CLK_ENABLE();
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__HAL_RCC_GPIOA_CLK_ENABLE();
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/**USART1 GPIO Configuration
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PA9 ------> USART1_TX
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PA10 ------> USART1_RX
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*/
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GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
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GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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/* USER CODE BEGIN USART1_MspInit 1 */
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/* USER CODE END USART1_MspInit 1 */
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}
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}
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/**
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* @brief UART MSP De-Initialization
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* This function freeze the hardware resources used in this example
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* @param huart: UART handle pointer
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* @retval None
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*/
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void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
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{
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if(huart->Instance==USART1)
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{
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/* USER CODE BEGIN USART1_MspDeInit 0 */
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/* USER CODE END USART1_MspDeInit 0 */
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/* Peripheral clock disable */
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__HAL_RCC_USART1_CLK_DISABLE();
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/**USART1 GPIO Configuration
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PA9 ------> USART1_TX
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PA10 ------> USART1_RX
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*/
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HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
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/* USER CODE BEGIN USART1_MspDeInit 1 */
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/* USER CODE END USART1_MspDeInit 1 */
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}
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}
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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@ -30,7 +30,7 @@ osThreadId_t g_flush_epd_task_handle;
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const osThreadAttr_t g_flush_epd_task_attributes = {
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.name = "flushEPD",
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.priority = (osPriority_t) osPriorityNormal,
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.stack_size = 128 * 4
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.stack_size = 512 * 4
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};
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uint8_t frame_buffer_wb[212 * 104 / 8];
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@ -55,7 +55,7 @@ void user_task_flush_epd(void *arguments) {
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memset(frame_buffer_rd, 0x00, 212 * 104 / 8);
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depg0213_epd_load(&g_epd, frame_buffer_wb, frame_buffer_rd);
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depg0213_epd_deepsleep(&g_epd);
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osDelay(60000);
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osDelay(300000);
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}
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}
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@ -1 +1 @@
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Subproject commit b60a55be73dd6f1951f65ce0ab98404260d39ae9
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Subproject commit 8abed07c233edb7fd2379eb5cc23d15abb10bcbe
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6
Makefile
6
Makefile
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@ -1,5 +1,5 @@
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##########################################################################################################################
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# File automatically-generated by tool: [projectgenerator] version: [3.11.2] date: [Thu Jan 14 23:18:36 CST 2021]
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# File automatically-generated by tool: [projectgenerator] version: [3.11.2] date: [Fri Jan 15 00:23:26 CST 2021]
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##########################################################################################################################
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# ------------------------------------------------
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@ -189,7 +189,9 @@ Middlewares/Third_Party/LittleVGL/src/lv_widgets/lv_slider.c \
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Middlewares/Third_Party/LittleVGL/src/lv_widgets/lv_roller.c \
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Middlewares/Third_Party/LittleVGL/src/lv_widgets/lv_img.c \
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Middlewares/Third_Party/LittleVGL/src/lv_widgets/lv_chart.c \
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Middlewares/Third_Party/LittleVGL/src/lv_widgets/lv_linemeter.c
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Middlewares/Third_Party/LittleVGL/src/lv_widgets/lv_linemeter.c \
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Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.c \
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Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.c
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# ASM sources
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@ -12,6 +12,7 @@ Mcu.UserName=STM32H750VBTx
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PD9.GPIOParameters=GPIO_Label,GPIO_ModeDefaultEXTI
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SPI2.VirtualType=VM_MASTER
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PB10.Mode=Single Bank 1
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CORTEX_M7.BaseAddress-Cortex_Memory_Protection_Unit_Region3_Settings=0x24000000
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RCC.HPRE=RCC_HCLK_DIV2
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PH0-OSC_IN\ (PH0).Signal=RCC_OSC_IN
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SH.GPXTI9.0=GPIO_EXTI9
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@ -28,11 +29,13 @@ CORTEX_M7.AccessPermission-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_RE
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RCC.CpuClockFreq_Value=240000000
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RCC.VCO2OutputFreq_Value=32250000
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Dma.SPI2_TX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
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USART1.IPParameters=VirtualMode-Asynchronous
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PD8.GPIO_PuPd=GPIO_PULLUP
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PB13.Signal=SPI2_SCK
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PB15.Signal=SPI2_MOSI
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Dma.SPI2_TX.0.Instance=DMA1_Stream0
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PinOutPanel.RotationAngle=0
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CORTEX_M7.IsBufferable-Cortex_Memory_Protection_Unit_Region3_Settings=MPU_ACCESS_BUFFERABLE
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RCC.MCO1PinFreq_Value=64000000
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RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
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ProjectManager.StackSize=0x400
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@ -62,9 +65,10 @@ Dma.SPI2_TX.0.SyncSignalID=NONE
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RCC.HCLKFreq_Value=120000000
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RCC.I2C4Freq_Value=120000000
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PE2.Mode=Single Bank 1
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Mcu.IPNb=10
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Mcu.IPNb=11
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ProjectManager.PreviousToolchain=
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RCC.SPDIFRXFreq_Value=60000000
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CORTEX_M7.TypeExtField-Cortex_Memory_Protection_Unit_Region3_Settings=MPU_TEX_LEVEL1
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PD8.GPIOParameters=GPIO_Label,GPIO_ModeDefaultOutputPP,PinState,GPIO_PuPd
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RCC.DIVQ3Freq_Value=16125000
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Mcu.Pin6=PB2
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@ -92,6 +96,7 @@ NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
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NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
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PB2.Signal=QUADSPI_CLK
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CORTEX_M7.Size-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_REGION_SIZE_128KB
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Mcu.IP10=USART1
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NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:true
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RCC.DIVM1=4
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RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE
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@ -124,6 +129,7 @@ ProjectManager.ProjectName=STM32H750_EPD
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RCC.APB3Freq_Value=120000000
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RCC.MCO2PinFreq_Value=240000000
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Mcu.Package=LQFP100
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SPI2.FifoThreshold=SPI_FIFO_THRESHOLD_16DATA
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PB12.Mode=NSS_Signal_Hard_Output
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NVIC.TimeBase=TIM7_IRQn
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SPI2.Mode=SPI_MODE_MASTER
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@ -131,6 +137,7 @@ CORTEX_M7.BaseAddress-Cortex_Memory_Protection_Unit_Region1_Settings=0x90000000
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RCC.EnbaleCSS=true
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ProjectManager.ToolChainLocation=
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NVIC.TimeBaseIP=TIM7
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PA10.Signal=USART1_RX
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RCC.DFSDMFreq_Value=120000000
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RCC.DIVR1Freq_Value=240000000
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PB14.GPIOParameters=GPIO_Label
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@ -157,9 +164,11 @@ NVIC.RCC_IRQn=true\:6\:0\:true\:false\:true\:true\:true\:false
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RCC.DFSDMACLkFreq_Value=60000000
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PB15.Locked=true
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RCC.VCO3OutputFreq_Value=32250000
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SPI2.MasterKeepIOState=SPI_MASTER_KEEP_IO_STATE_ENABLE
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PD8.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD
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VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate
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RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
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CORTEX_M7.AccessPermission-Cortex_Memory_Protection_Unit_Region3_Settings=MPU_REGION_FULL_ACCESS
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NVIC.QUADSPI_IRQn=true\:6\:0\:true\:false\:true\:true\:true\:true
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ProjectManager.ProjectFileName=STM32H750_EPD.ioc
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CORTEX_M7.CPU_ICache=Enabled
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@ -168,7 +177,8 @@ Dma.SPI2_TX.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
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FREERTOS.Tasks01=defaultTask,24,128,StartDefaultTask,Default,NULL,Dynamic,NULL,NULL
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PA13\ (JTMS/SWDIO).Mode=Serial_Wire
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PD9.GPIO_Label=SPI2_BUSY
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Mcu.PinsNb=22
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PA10.Mode=Asynchronous
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Mcu.PinsNb=24
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ProjectManager.NoMain=false
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PC11.Locked=true
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NVIC.SavedSvcallIrqHandlerGenerated=true
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@ -193,8 +203,10 @@ PH1-OSC_OUT\ (PH1).Signal=RCC_OSC_OUT
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PD8.GPIO_Label=SPI2_RES
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RCC.SPI6Freq_Value=120000000
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RCC.D1CPREFreq_Value=240000000
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USART1.VirtualMode-Asynchronous=VM_ASYNC
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CORTEX_M7.MPU_Control=MPU_PRIVILEGED_DEFAULT
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RCC.USART234578Freq_Value=120000000
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PA9.Mode=Asynchronous
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RCC.SPI45Freq_Value=120000000
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RCC.Tim1OutputFreq_Value=120000000
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RCC.SPI123Freq_Value=60000000
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@ -203,9 +215,12 @@ ProjectManager.TargetToolchain=Makefile
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PC15-OSC32_OUT\ (OSC32_OUT).Signal=RCC_OSC32_OUT
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CORTEX_M7.TypeExtField-Cortex_Memory_Protection_Unit_Region1_Settings=MPU_TEX_LEVEL1
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RCC.VCO1OutputFreq_Value=480000000
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PA9.Signal=USART1_TX
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RCC.AXIClockFreq_Value=120000000
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CORTEX_M7.IsCacheable-Cortex_Memory_Protection_Unit_Region3_Settings=MPU_ACCESS_CACHEABLE
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RCC.DIVN1=240
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SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,VirtualNSS,BaudRatePrescaler,DataSize,NSSPMode
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CORTEX_M7.DisableExec-Cortex_Memory_Protection_Unit_Region3_Settings=MPU_INSTRUCTION_ACCESS_DISABLE
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SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,VirtualNSS,BaudRatePrescaler,DataSize,NSSPMode,MasterKeepIOState,FifoThreshold
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Dma.SPI2_TX.0.SyncEnable=DISABLE
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ProjectManager.RegisterCallBack=
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RCC.USBFreq_Value=60000000
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@ -245,7 +260,7 @@ NVIC.SavedPendsvIrqHandlerGenerated=true
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|||
CORTEX_M7.AccessPermission-Cortex_Memory_Protection_Unit_Region1_Settings=MPU_REGION_FULL_ACCESS
|
||||
ProjectManager.UnderRoot=false
|
||||
CORTEX_M7.IsCacheable-Cortex_Memory_Protection_Unit_Region1_Settings=MPU_ACCESS_CACHEABLE
|
||||
CORTEX_M7.IPParameters=CPU_ICache,CPU_DCache,MPU_Control,Enable-Cortex_Memory_Protection_Unit_Region0_Settings,Size-Cortex_Memory_Protection_Unit_Region0_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region0_Settings,DisableExec-Cortex_Memory_Protection_Unit_Region0_Settings,IsShareable-Cortex_Memory_Protection_Unit_Region0_Settings,IsCacheable-Cortex_Memory_Protection_Unit_Region0_Settings,IsBufferable-Cortex_Memory_Protection_Unit_Region0_Settings,Enable-Cortex_Memory_Protection_Unit_Region1_Settings,BaseAddress-Cortex_Memory_Protection_Unit_Region1_Settings,Size-Cortex_Memory_Protection_Unit_Region1_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region1_Settings,IsCacheable-Cortex_Memory_Protection_Unit_Region1_Settings,IsBufferable-Cortex_Memory_Protection_Unit_Region1_Settings,TypeExtField-Cortex_Memory_Protection_Unit_Region1_Settings,Enable-Cortex_Memory_Protection_Unit_Region2_Settings,BaseAddress-Cortex_Memory_Protection_Unit_Region2_Settings,Size-Cortex_Memory_Protection_Unit_Region2_Settings,TypeExtField-Cortex_Memory_Protection_Unit_Region2_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region2_Settings,DisableExec-Cortex_Memory_Protection_Unit_Region2_Settings,IsCacheable-Cortex_Memory_Protection_Unit_Region2_Settings,IsBufferable-Cortex_Memory_Protection_Unit_Region2_Settings
|
||||
CORTEX_M7.IPParameters=CPU_ICache,CPU_DCache,MPU_Control,Enable-Cortex_Memory_Protection_Unit_Region0_Settings,Size-Cortex_Memory_Protection_Unit_Region0_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region0_Settings,DisableExec-Cortex_Memory_Protection_Unit_Region0_Settings,IsShareable-Cortex_Memory_Protection_Unit_Region0_Settings,IsCacheable-Cortex_Memory_Protection_Unit_Region0_Settings,IsBufferable-Cortex_Memory_Protection_Unit_Region0_Settings,Enable-Cortex_Memory_Protection_Unit_Region1_Settings,BaseAddress-Cortex_Memory_Protection_Unit_Region1_Settings,Size-Cortex_Memory_Protection_Unit_Region1_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region1_Settings,IsCacheable-Cortex_Memory_Protection_Unit_Region1_Settings,IsBufferable-Cortex_Memory_Protection_Unit_Region1_Settings,TypeExtField-Cortex_Memory_Protection_Unit_Region1_Settings,Enable-Cortex_Memory_Protection_Unit_Region2_Settings,BaseAddress-Cortex_Memory_Protection_Unit_Region2_Settings,Size-Cortex_Memory_Protection_Unit_Region2_Settings,TypeExtField-Cortex_Memory_Protection_Unit_Region2_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region2_Settings,DisableExec-Cortex_Memory_Protection_Unit_Region2_Settings,IsCacheable-Cortex_Memory_Protection_Unit_Region2_Settings,IsBufferable-Cortex_Memory_Protection_Unit_Region2_Settings,Enable-Cortex_Memory_Protection_Unit_Region3_Settings,BaseAddress-Cortex_Memory_Protection_Unit_Region3_Settings,Size-Cortex_Memory_Protection_Unit_Region3_Settings,TypeExtField-Cortex_Memory_Protection_Unit_Region3_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region3_Settings,DisableExec-Cortex_Memory_Protection_Unit_Region3_Settings,IsCacheable-Cortex_Memory_Protection_Unit_Region3_Settings,IsBufferable-Cortex_Memory_Protection_Unit_Region3_Settings
|
||||
Mcu.IP8=SPI2
|
||||
VP_FREERTOS_VS_CMSIS_V2.Signal=FREERTOS_VS_CMSIS_V2
|
||||
Mcu.IP9=SYS
|
||||
|
|
@ -254,10 +269,12 @@ Mcu.IP7=RTC
|
|||
ProjectManager.CoupleFile=false
|
||||
Dma.SPI2_TX.0.Priority=DMA_PRIORITY_LOW
|
||||
RCC.SYSCLKFreq_VALUE=240000000
|
||||
Mcu.Pin22=VP_RTC_VS_RTC_Activate
|
||||
RCC.I2C123Freq_Value=120000000
|
||||
Mcu.Pin23=VP_SYS_VS_tim7
|
||||
PA1.Locked=true
|
||||
Mcu.Pin20=VP_RTC_VS_RTC_Activate
|
||||
Mcu.Pin21=VP_SYS_VS_tim7
|
||||
Mcu.Pin20=PC11
|
||||
Mcu.Pin21=VP_FREERTOS_VS_CMSIS_V2
|
||||
NVIC.ForceEnableDMAVector=true
|
||||
KeepUserPlacement=false
|
||||
PC14-OSC32_IN\ (OSC32_IN).Signal=RCC_OSC32_IN
|
||||
|
|
@ -268,16 +285,18 @@ RCC.QSPICLockSelection=RCC_QSPICLKSOURCE_PLL
|
|||
SH.GPXTI9.ConfNb=1
|
||||
NVIC.EXTI9_5_IRQn=true\:5\:0\:true\:false\:true\:true\:true\:true
|
||||
ProjectManager.HeapSize=0x200
|
||||
Mcu.Pin15=PA13 (JTMS/SWDIO)
|
||||
Mcu.Pin15=PA9
|
||||
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
Mcu.Pin16=PA14 (JTCK/SWCLK)
|
||||
Mcu.Pin16=PA10
|
||||
Mcu.Pin13=PD9
|
||||
Mcu.Pin14=PC9
|
||||
Mcu.Pin19=VP_FREERTOS_VS_CMSIS_V2
|
||||
CORTEX_M7.Enable-Cortex_Memory_Protection_Unit_Region3_Settings=MPU_REGION_ENABLE
|
||||
Mcu.Pin19=PC10
|
||||
CORTEX_M7.Size-Cortex_Memory_Protection_Unit_Region3_Settings=MPU_REGION_SIZE_512KB
|
||||
RCC.LPTIM345Freq_Value=120000000
|
||||
ProjectManager.ComputerToolchain=false
|
||||
Mcu.Pin17=PC10
|
||||
Mcu.Pin18=PC11
|
||||
Mcu.Pin17=PA13 (JTMS/SWDIO)
|
||||
Mcu.Pin18=PA14 (JTCK/SWCLK)
|
||||
CORTEX_M7.DisableExec-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_INSTRUCTION_ACCESS_DISABLE
|
||||
RCC.LTDCFreq_Value=16125000
|
||||
RCC.SAI4AFreq_Value=60000000
|
||||
|
|
|
|||
Loading…
Reference in New Issue