From 3874c51ebeea5437cadbfe72a82903bc4ba6c27b Mon Sep 17 00:00:00 2001 From: imi415 Date: Fri, 15 Jan 2021 00:31:47 +0800 Subject: [PATCH] Fixed #2, fixed unstable initializatio by setting `SPI keep IO state' option. --- Core/Inc/stm32h7xx_hal_conf.h | 2 +- Core/Src/main.c | 76 ++++++++++++++++++++++++++++++-- Core/Src/stm32h7xx_hal_msp.c | 65 +++++++++++++++++++++++++++ Core/Src/user_tasks.c | 4 +- Drivers/Third_Party/depg0213_epd | 2 +- Makefile | 6 ++- STM32H750_EPD.ioc | 41 ++++++++++++----- 7 files changed, 175 insertions(+), 21 deletions(-) diff --git a/Core/Inc/stm32h7xx_hal_conf.h b/Core/Inc/stm32h7xx_hal_conf.h index f5f34a5..3841068 100644 --- a/Core/Inc/stm32h7xx_hal_conf.h +++ b/Core/Inc/stm32h7xx_hal_conf.h @@ -74,7 +74,7 @@ #define HAL_SPI_MODULE_ENABLED /* #define HAL_SWPMI_MODULE_ENABLED */ #define HAL_TIM_MODULE_ENABLED -/* #define HAL_UART_MODULE_ENABLED */ +#define HAL_UART_MODULE_ENABLED /* #define HAL_USART_MODULE_ENABLED */ /* #define HAL_IRDA_MODULE_ENABLED */ /* #define HAL_SMARTCARD_MODULE_ENABLED */ diff --git a/Core/Src/main.c b/Core/Src/main.c index cf4fe8b..6fcdffa 100644 --- a/Core/Src/main.c +++ b/Core/Src/main.c @@ -49,6 +49,8 @@ RTC_HandleTypeDef hrtc; SPI_HandleTypeDef hspi2; DMA_HandleTypeDef hdma_spi2_tx; +UART_HandleTypeDef huart1; + /* Definitions for defaultTask */ osThreadId_t defaultTaskHandle; const osThreadAttr_t defaultTask_attributes = { @@ -68,6 +70,7 @@ static void MX_DMA_Init(void); static void MX_QUADSPI_Init(void); static void MX_SPI2_Init(void); static void MX_RTC_Init(void); +static void MX_USART1_UART_Init(void); void StartDefaultTask(void *argument); /* USER CODE BEGIN PFP */ @@ -125,6 +128,7 @@ int main(void) MX_QUADSPI_Init(); MX_SPI2_Init(); MX_RTC_Init(); + MX_USART1_UART_Init(); /* USER CODE BEGIN 2 */ /* USER CODE END 2 */ @@ -236,10 +240,11 @@ void SystemClock_Config(void) { Error_Handler(); } - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_SPI2 - |RCC_PERIPHCLK_QSPI; + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_USART1 + |RCC_PERIPHCLK_SPI2|RCC_PERIPHCLK_QSPI; PeriphClkInitStruct.QspiClockSelection = RCC_QSPICLKSOURCE_PLL; PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL; + PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2; PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { @@ -352,13 +357,13 @@ static void MX_SPI2_Init(void) hspi2.Init.CRCPolynomial = 0x0; hspi2.Init.NSSPMode = SPI_NSS_PULSE_ENABLE; hspi2.Init.NSSPolarity = SPI_NSS_POLARITY_LOW; - hspi2.Init.FifoThreshold = SPI_FIFO_THRESHOLD_01DATA; + hspi2.Init.FifoThreshold = SPI_FIFO_THRESHOLD_16DATA; hspi2.Init.TxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN; hspi2.Init.RxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN; hspi2.Init.MasterSSIdleness = SPI_MASTER_SS_IDLENESS_00CYCLE; hspi2.Init.MasterInterDataIdleness = SPI_MASTER_INTERDATA_IDLENESS_00CYCLE; hspi2.Init.MasterReceiverAutoSusp = SPI_MASTER_RX_AUTOSUSP_DISABLE; - hspi2.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_DISABLE; + hspi2.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_ENABLE; hspi2.Init.IOSwap = SPI_IO_SWAP_DISABLE; if (HAL_SPI_Init(&hspi2) != HAL_OK) { @@ -370,6 +375,54 @@ static void MX_SPI2_Init(void) } +/** + * @brief USART1 Initialization Function + * @param None + * @retval None + */ +static void MX_USART1_UART_Init(void) +{ + + /* USER CODE BEGIN USART1_Init 0 */ + + /* USER CODE END USART1_Init 0 */ + + /* USER CODE BEGIN USART1_Init 1 */ + + /* USER CODE END USART1_Init 1 */ + huart1.Instance = USART1; + huart1.Init.BaudRate = 115200; + huart1.Init.WordLength = UART_WORDLENGTH_8B; + huart1.Init.StopBits = UART_STOPBITS_1; + huart1.Init.Parity = UART_PARITY_NONE; + huart1.Init.Mode = UART_MODE_TX_RX; + huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart1.Init.OverSampling = UART_OVERSAMPLING_16; + huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1; + huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + if (HAL_UART_Init(&huart1) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN USART1_Init 2 */ + + /* USER CODE END USART1_Init 2 */ + +} + /** * Enable DMA controller clock */ @@ -521,6 +574,21 @@ void MPU_Config(void) MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE; MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE; + HAL_MPU_ConfigRegion(&MPU_InitStruct); + /** Initializes and configures the Region and the memory to be protected + */ + MPU_InitStruct.Enable = MPU_REGION_ENABLE; + MPU_InitStruct.Number = MPU_REGION_NUMBER3; + MPU_InitStruct.BaseAddress = 0x24000000; + MPU_InitStruct.Size = MPU_REGION_SIZE_512KB; + MPU_InitStruct.SubRegionDisable = 0x0; + MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1; + MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS; + MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE; + MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE; + MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE; + MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE; + HAL_MPU_ConfigRegion(&MPU_InitStruct); /* Enables the MPU */ HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT); diff --git a/Core/Src/stm32h7xx_hal_msp.c b/Core/Src/stm32h7xx_hal_msp.c index b910f86..19eebaf 100644 --- a/Core/Src/stm32h7xx_hal_msp.c +++ b/Core/Src/stm32h7xx_hal_msp.c @@ -349,6 +349,71 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) } +/** +* @brief UART MSP Initialization +* This function configures the hardware resources used in this example +* @param huart: UART handle pointer +* @retval None +*/ +void HAL_UART_MspInit(UART_HandleTypeDef* huart) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(huart->Instance==USART1) + { + /* USER CODE BEGIN USART1_MspInit 0 */ + + /* USER CODE END USART1_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_USART1_CLK_ENABLE(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**USART1 GPIO Configuration + PA9 ------> USART1_TX + PA10 ------> USART1_RX + */ + GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF7_USART1; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN USART1_MspInit 1 */ + + /* USER CODE END USART1_MspInit 1 */ + } + +} + +/** +* @brief UART MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param huart: UART handle pointer +* @retval None +*/ +void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) +{ + if(huart->Instance==USART1) + { + /* USER CODE BEGIN USART1_MspDeInit 0 */ + + /* USER CODE END USART1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_USART1_CLK_DISABLE(); + + /**USART1 GPIO Configuration + PA9 ------> USART1_TX + PA10 ------> USART1_RX + */ + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10); + + /* USER CODE BEGIN USART1_MspDeInit 1 */ + + /* USER CODE END USART1_MspDeInit 1 */ + } + +} + /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ diff --git a/Core/Src/user_tasks.c b/Core/Src/user_tasks.c index 6809060..5e740e8 100644 --- a/Core/Src/user_tasks.c +++ b/Core/Src/user_tasks.c @@ -30,7 +30,7 @@ osThreadId_t g_flush_epd_task_handle; const osThreadAttr_t g_flush_epd_task_attributes = { .name = "flushEPD", .priority = (osPriority_t) osPriorityNormal, - .stack_size = 128 * 4 + .stack_size = 512 * 4 }; uint8_t frame_buffer_wb[212 * 104 / 8]; @@ -55,7 +55,7 @@ void user_task_flush_epd(void *arguments) { memset(frame_buffer_rd, 0x00, 212 * 104 / 8); depg0213_epd_load(&g_epd, frame_buffer_wb, frame_buffer_rd); depg0213_epd_deepsleep(&g_epd); - osDelay(60000); + osDelay(300000); } } diff --git a/Drivers/Third_Party/depg0213_epd b/Drivers/Third_Party/depg0213_epd index b60a55b..8abed07 160000 --- a/Drivers/Third_Party/depg0213_epd +++ b/Drivers/Third_Party/depg0213_epd @@ -1 +1 @@ -Subproject commit b60a55be73dd6f1951f65ce0ab98404260d39ae9 +Subproject commit 8abed07c233edb7fd2379eb5cc23d15abb10bcbe diff --git a/Makefile b/Makefile index d67fdb1..52d3c69 100644 --- a/Makefile +++ b/Makefile @@ -1,5 +1,5 @@ ########################################################################################################################## -# File automatically-generated by tool: [projectgenerator] version: [3.11.2] date: [Thu Jan 14 23:18:36 CST 2021] +# File automatically-generated by tool: [projectgenerator] version: [3.11.2] date: [Fri Jan 15 00:23:26 CST 2021] ########################################################################################################################## # ------------------------------------------------ @@ -189,7 +189,9 @@ Middlewares/Third_Party/LittleVGL/src/lv_widgets/lv_slider.c \ Middlewares/Third_Party/LittleVGL/src/lv_widgets/lv_roller.c \ Middlewares/Third_Party/LittleVGL/src/lv_widgets/lv_img.c \ Middlewares/Third_Party/LittleVGL/src/lv_widgets/lv_chart.c \ -Middlewares/Third_Party/LittleVGL/src/lv_widgets/lv_linemeter.c +Middlewares/Third_Party/LittleVGL/src/lv_widgets/lv_linemeter.c \ +Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.c \ +Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.c # ASM sources diff --git a/STM32H750_EPD.ioc b/STM32H750_EPD.ioc index cc89b85..d54c589 100644 --- a/STM32H750_EPD.ioc +++ b/STM32H750_EPD.ioc @@ -12,6 +12,7 @@ Mcu.UserName=STM32H750VBTx PD9.GPIOParameters=GPIO_Label,GPIO_ModeDefaultEXTI SPI2.VirtualType=VM_MASTER PB10.Mode=Single Bank 1 +CORTEX_M7.BaseAddress-Cortex_Memory_Protection_Unit_Region3_Settings=0x24000000 RCC.HPRE=RCC_HCLK_DIV2 PH0-OSC_IN\ (PH0).Signal=RCC_OSC_IN SH.GPXTI9.0=GPIO_EXTI9 @@ -28,11 +29,13 @@ CORTEX_M7.AccessPermission-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_RE RCC.CpuClockFreq_Value=240000000 RCC.VCO2OutputFreq_Value=32250000 Dma.SPI2_TX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber +USART1.IPParameters=VirtualMode-Asynchronous PD8.GPIO_PuPd=GPIO_PULLUP PB13.Signal=SPI2_SCK PB15.Signal=SPI2_MOSI Dma.SPI2_TX.0.Instance=DMA1_Stream0 PinOutPanel.RotationAngle=0 +CORTEX_M7.IsBufferable-Cortex_Memory_Protection_Unit_Region3_Settings=MPU_ACCESS_BUFFERABLE RCC.MCO1PinFreq_Value=64000000 RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK ProjectManager.StackSize=0x400 @@ -62,9 +65,10 @@ Dma.SPI2_TX.0.SyncSignalID=NONE RCC.HCLKFreq_Value=120000000 RCC.I2C4Freq_Value=120000000 PE2.Mode=Single Bank 1 -Mcu.IPNb=10 +Mcu.IPNb=11 ProjectManager.PreviousToolchain= RCC.SPDIFRXFreq_Value=60000000 +CORTEX_M7.TypeExtField-Cortex_Memory_Protection_Unit_Region3_Settings=MPU_TEX_LEVEL1 PD8.GPIOParameters=GPIO_Label,GPIO_ModeDefaultOutputPP,PinState,GPIO_PuPd RCC.DIVQ3Freq_Value=16125000 Mcu.Pin6=PB2 @@ -92,6 +96,7 @@ NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false PB2.Signal=QUADSPI_CLK CORTEX_M7.Size-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_REGION_SIZE_128KB +Mcu.IP10=USART1 NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:true RCC.DIVM1=4 RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE @@ -124,6 +129,7 @@ ProjectManager.ProjectName=STM32H750_EPD RCC.APB3Freq_Value=120000000 RCC.MCO2PinFreq_Value=240000000 Mcu.Package=LQFP100 +SPI2.FifoThreshold=SPI_FIFO_THRESHOLD_16DATA PB12.Mode=NSS_Signal_Hard_Output NVIC.TimeBase=TIM7_IRQn SPI2.Mode=SPI_MODE_MASTER @@ -131,6 +137,7 @@ CORTEX_M7.BaseAddress-Cortex_Memory_Protection_Unit_Region1_Settings=0x90000000 RCC.EnbaleCSS=true ProjectManager.ToolChainLocation= NVIC.TimeBaseIP=TIM7 +PA10.Signal=USART1_RX RCC.DFSDMFreq_Value=120000000 RCC.DIVR1Freq_Value=240000000 PB14.GPIOParameters=GPIO_Label @@ -157,9 +164,11 @@ NVIC.RCC_IRQn=true\:6\:0\:true\:false\:true\:true\:true\:false RCC.DFSDMACLkFreq_Value=60000000 PB15.Locked=true RCC.VCO3OutputFreq_Value=32250000 +SPI2.MasterKeepIOState=SPI_MASTER_KEEP_IO_STATE_ENABLE PD8.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE +CORTEX_M7.AccessPermission-Cortex_Memory_Protection_Unit_Region3_Settings=MPU_REGION_FULL_ACCESS NVIC.QUADSPI_IRQn=true\:6\:0\:true\:false\:true\:true\:true\:true ProjectManager.ProjectFileName=STM32H750_EPD.ioc CORTEX_M7.CPU_ICache=Enabled @@ -168,7 +177,8 @@ Dma.SPI2_TX.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING FREERTOS.Tasks01=defaultTask,24,128,StartDefaultTask,Default,NULL,Dynamic,NULL,NULL PA13\ (JTMS/SWDIO).Mode=Serial_Wire PD9.GPIO_Label=SPI2_BUSY -Mcu.PinsNb=22 +PA10.Mode=Asynchronous +Mcu.PinsNb=24 ProjectManager.NoMain=false PC11.Locked=true NVIC.SavedSvcallIrqHandlerGenerated=true @@ -193,8 +203,10 @@ PH1-OSC_OUT\ (PH1).Signal=RCC_OSC_OUT PD8.GPIO_Label=SPI2_RES RCC.SPI6Freq_Value=120000000 RCC.D1CPREFreq_Value=240000000 +USART1.VirtualMode-Asynchronous=VM_ASYNC CORTEX_M7.MPU_Control=MPU_PRIVILEGED_DEFAULT RCC.USART234578Freq_Value=120000000 +PA9.Mode=Asynchronous RCC.SPI45Freq_Value=120000000 RCC.Tim1OutputFreq_Value=120000000 RCC.SPI123Freq_Value=60000000 @@ -203,9 +215,12 @@ ProjectManager.TargetToolchain=Makefile PC15-OSC32_OUT\ (OSC32_OUT).Signal=RCC_OSC32_OUT CORTEX_M7.TypeExtField-Cortex_Memory_Protection_Unit_Region1_Settings=MPU_TEX_LEVEL1 RCC.VCO1OutputFreq_Value=480000000 +PA9.Signal=USART1_TX RCC.AXIClockFreq_Value=120000000 +CORTEX_M7.IsCacheable-Cortex_Memory_Protection_Unit_Region3_Settings=MPU_ACCESS_CACHEABLE RCC.DIVN1=240 -SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,VirtualNSS,BaudRatePrescaler,DataSize,NSSPMode +CORTEX_M7.DisableExec-Cortex_Memory_Protection_Unit_Region3_Settings=MPU_INSTRUCTION_ACCESS_DISABLE +SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,VirtualNSS,BaudRatePrescaler,DataSize,NSSPMode,MasterKeepIOState,FifoThreshold Dma.SPI2_TX.0.SyncEnable=DISABLE ProjectManager.RegisterCallBack= RCC.USBFreq_Value=60000000 @@ -245,7 +260,7 @@ NVIC.SavedPendsvIrqHandlerGenerated=true CORTEX_M7.AccessPermission-Cortex_Memory_Protection_Unit_Region1_Settings=MPU_REGION_FULL_ACCESS ProjectManager.UnderRoot=false CORTEX_M7.IsCacheable-Cortex_Memory_Protection_Unit_Region1_Settings=MPU_ACCESS_CACHEABLE -CORTEX_M7.IPParameters=CPU_ICache,CPU_DCache,MPU_Control,Enable-Cortex_Memory_Protection_Unit_Region0_Settings,Size-Cortex_Memory_Protection_Unit_Region0_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region0_Settings,DisableExec-Cortex_Memory_Protection_Unit_Region0_Settings,IsShareable-Cortex_Memory_Protection_Unit_Region0_Settings,IsCacheable-Cortex_Memory_Protection_Unit_Region0_Settings,IsBufferable-Cortex_Memory_Protection_Unit_Region0_Settings,Enable-Cortex_Memory_Protection_Unit_Region1_Settings,BaseAddress-Cortex_Memory_Protection_Unit_Region1_Settings,Size-Cortex_Memory_Protection_Unit_Region1_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region1_Settings,IsCacheable-Cortex_Memory_Protection_Unit_Region1_Settings,IsBufferable-Cortex_Memory_Protection_Unit_Region1_Settings,TypeExtField-Cortex_Memory_Protection_Unit_Region1_Settings,Enable-Cortex_Memory_Protection_Unit_Region2_Settings,BaseAddress-Cortex_Memory_Protection_Unit_Region2_Settings,Size-Cortex_Memory_Protection_Unit_Region2_Settings,TypeExtField-Cortex_Memory_Protection_Unit_Region2_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region2_Settings,DisableExec-Cortex_Memory_Protection_Unit_Region2_Settings,IsCacheable-Cortex_Memory_Protection_Unit_Region2_Settings,IsBufferable-Cortex_Memory_Protection_Unit_Region2_Settings +CORTEX_M7.IPParameters=CPU_ICache,CPU_DCache,MPU_Control,Enable-Cortex_Memory_Protection_Unit_Region0_Settings,Size-Cortex_Memory_Protection_Unit_Region0_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region0_Settings,DisableExec-Cortex_Memory_Protection_Unit_Region0_Settings,IsShareable-Cortex_Memory_Protection_Unit_Region0_Settings,IsCacheable-Cortex_Memory_Protection_Unit_Region0_Settings,IsBufferable-Cortex_Memory_Protection_Unit_Region0_Settings,Enable-Cortex_Memory_Protection_Unit_Region1_Settings,BaseAddress-Cortex_Memory_Protection_Unit_Region1_Settings,Size-Cortex_Memory_Protection_Unit_Region1_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region1_Settings,IsCacheable-Cortex_Memory_Protection_Unit_Region1_Settings,IsBufferable-Cortex_Memory_Protection_Unit_Region1_Settings,TypeExtField-Cortex_Memory_Protection_Unit_Region1_Settings,Enable-Cortex_Memory_Protection_Unit_Region2_Settings,BaseAddress-Cortex_Memory_Protection_Unit_Region2_Settings,Size-Cortex_Memory_Protection_Unit_Region2_Settings,TypeExtField-Cortex_Memory_Protection_Unit_Region2_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region2_Settings,DisableExec-Cortex_Memory_Protection_Unit_Region2_Settings,IsCacheable-Cortex_Memory_Protection_Unit_Region2_Settings,IsBufferable-Cortex_Memory_Protection_Unit_Region2_Settings,Enable-Cortex_Memory_Protection_Unit_Region3_Settings,BaseAddress-Cortex_Memory_Protection_Unit_Region3_Settings,Size-Cortex_Memory_Protection_Unit_Region3_Settings,TypeExtField-Cortex_Memory_Protection_Unit_Region3_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region3_Settings,DisableExec-Cortex_Memory_Protection_Unit_Region3_Settings,IsCacheable-Cortex_Memory_Protection_Unit_Region3_Settings,IsBufferable-Cortex_Memory_Protection_Unit_Region3_Settings Mcu.IP8=SPI2 VP_FREERTOS_VS_CMSIS_V2.Signal=FREERTOS_VS_CMSIS_V2 Mcu.IP9=SYS @@ -254,10 +269,12 @@ Mcu.IP7=RTC ProjectManager.CoupleFile=false Dma.SPI2_TX.0.Priority=DMA_PRIORITY_LOW RCC.SYSCLKFreq_VALUE=240000000 +Mcu.Pin22=VP_RTC_VS_RTC_Activate RCC.I2C123Freq_Value=120000000 +Mcu.Pin23=VP_SYS_VS_tim7 PA1.Locked=true -Mcu.Pin20=VP_RTC_VS_RTC_Activate -Mcu.Pin21=VP_SYS_VS_tim7 +Mcu.Pin20=PC11 +Mcu.Pin21=VP_FREERTOS_VS_CMSIS_V2 NVIC.ForceEnableDMAVector=true KeepUserPlacement=false PC14-OSC32_IN\ (OSC32_IN).Signal=RCC_OSC32_IN @@ -268,16 +285,18 @@ RCC.QSPICLockSelection=RCC_QSPICLKSOURCE_PLL SH.GPXTI9.ConfNb=1 NVIC.EXTI9_5_IRQn=true\:5\:0\:true\:false\:true\:true\:true\:true ProjectManager.HeapSize=0x200 -Mcu.Pin15=PA13 (JTMS/SWDIO) +Mcu.Pin15=PA9 NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false -Mcu.Pin16=PA14 (JTCK/SWCLK) +Mcu.Pin16=PA10 Mcu.Pin13=PD9 Mcu.Pin14=PC9 -Mcu.Pin19=VP_FREERTOS_VS_CMSIS_V2 +CORTEX_M7.Enable-Cortex_Memory_Protection_Unit_Region3_Settings=MPU_REGION_ENABLE +Mcu.Pin19=PC10 +CORTEX_M7.Size-Cortex_Memory_Protection_Unit_Region3_Settings=MPU_REGION_SIZE_512KB RCC.LPTIM345Freq_Value=120000000 ProjectManager.ComputerToolchain=false -Mcu.Pin17=PC10 -Mcu.Pin18=PC11 +Mcu.Pin17=PA13 (JTMS/SWDIO) +Mcu.Pin18=PA14 (JTCK/SWCLK) CORTEX_M7.DisableExec-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_INSTRUCTION_ACCESS_DISABLE RCC.LTDCFreq_Value=16125000 RCC.SAI4AFreq_Value=60000000