diff --git a/Core/Inc/FreeRTOSConfig.h b/Core/Inc/FreeRTOSConfig.h
index 1e803aa..bde8cb5 100644
--- a/Core/Inc/FreeRTOSConfig.h
+++ b/Core/Inc/FreeRTOSConfig.h
@@ -64,7 +64,7 @@
 #define configTICK_RATE_HZ                       ((TickType_t)1000)
 #define configMAX_PRIORITIES                     ( 56 )
 #define configMINIMAL_STACK_SIZE                 ((uint16_t)128)
-#define configTOTAL_HEAP_SIZE                    ((size_t)81920)
+#define configTOTAL_HEAP_SIZE                    ((size_t)262144)
 #define configMAX_TASK_NAME_LEN                  ( 16 )
 #define configUSE_TRACE_FACILITY                 1
 #define configUSE_16_BIT_TICKS                   0
diff --git a/Core/Inc/lv_conf.h b/Core/Inc/lv_conf.h
index 2959117..d091eed 100644
--- a/Core/Inc/lv_conf.h
+++ b/Core/Inc/lv_conf.h
@@ -48,7 +48,7 @@
 
 /* Default display refresh period.
  * Can be changed in the display driver (`lv_disp_drv_t`).*/
-#define LV_DISP_DEF_REFR_PERIOD      30      /*[ms]*/
+#define LV_DISP_DEF_REFR_PERIOD      60000      /*[ms]*/
 
 /* Dot Per Inch: used to initialize default sizes.
  * E.g. a button with width = LV_DPI / 2 -> half inch wide
diff --git a/Core/Src/main.c b/Core/Src/main.c
index 3711db5..4e8243d 100644
--- a/Core/Src/main.c
+++ b/Core/Src/main.c
@@ -355,9 +355,9 @@ static void MX_SPI2_Init(void)
   hspi2.Init.TIMode = SPI_TIMODE_DISABLE;
   hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
   hspi2.Init.CRCPolynomial = 0x0;
-  hspi2.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
+  hspi2.Init.NSSPMode = SPI_NSS_PULSE_DISABLE;
   hspi2.Init.NSSPolarity = SPI_NSS_POLARITY_LOW;
-  hspi2.Init.FifoThreshold = SPI_FIFO_THRESHOLD_16DATA;
+  hspi2.Init.FifoThreshold = SPI_FIFO_THRESHOLD_01DATA;
   hspi2.Init.TxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
   hspi2.Init.RxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
   hspi2.Init.MasterSSIdleness = SPI_MASTER_SS_IDLENESS_00CYCLE;
diff --git a/Core/Src/stm32h7xx_hal_msp.c b/Core/Src/stm32h7xx_hal_msp.c
index aa68839..427fc1c 100644
--- a/Core/Src/stm32h7xx_hal_msp.c
+++ b/Core/Src/stm32h7xx_hal_msp.c
@@ -379,7 +379,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 
     /* USART1 interrupt Init */
-    HAL_NVIC_SetPriority(USART1_IRQn, 5, 0);
+    HAL_NVIC_SetPriority(USART1_IRQn, 6, 0);
     HAL_NVIC_EnableIRQ(USART1_IRQn);
   /* USER CODE BEGIN USART1_MspInit 1 */
 
diff --git a/Core/Src/user_irq_handlers.c b/Core/Src/user_irq_handlers.c
index 06a0282..42f503c 100644
--- a/Core/Src/user_irq_handlers.c
+++ b/Core/Src/user_irq_handlers.c
@@ -8,7 +8,6 @@ extern osSemaphoreId_t g_epd_busy_semphr;
 extern osSemaphoreId_t g_spi2_semphr;
 
 void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) {
-    // FIXME
     if(GPIO_Pin == SPI2_BUSY_Pin) {
         if(osKernelGetState() == osKernelRunning) { // Kernel has started, release semaphore.
             osSemaphoreRelease(g_epd_busy_semphr);
diff --git a/Core/Src/user_lvgl_disp.c b/Core/Src/user_lvgl_disp.c
index 6be03f7..e0aa276 100644
--- a/Core/Src/user_lvgl_disp.c
+++ b/Core/Src/user_lvgl_disp.c
@@ -7,18 +7,8 @@ void _epd_set_px_cb(lv_disp_drv_t *disp_drv, uint8_t *buf,
     uint16_t byte_index;
     uint8_t bit_index;
 
-    if(epd->direction == DEPG0213_HORIZONTAL) {
-        byte_index = x + (y / 8) * buf_w;
-        bit_index = y & 7;
-    }
-    else if(epd->direction == DEPG0213_HORIZONTAL_INVERSE) {
-        byte_index = x + (y / 8) * buf_w;
-        bit_index = 7 - (y & 7);
-    }
-    else {
-        byte_index = y + (x / 8) * buf_w;
-        bit_index = x & 7;
-    }
+    byte_index = x + (y / 8) * buf_w;
+    bit_index = 7 - (y & 7);
 
     if(color.full) {
         buf[byte_index] |= 1U << bit_index;
@@ -35,7 +25,7 @@ void _epd_rounder_cb(lv_disp_drv_t *disp_drv, lv_area_t *area) {
         area->y1 = (area->y1 / 8) * 8;
         area->y2 = (area->y2 / 8) * 8 + 7;
     }
-    else {
+    else { // Vertical mode
         area->x1 = (area->x1 / 8) * 8;
         area->x2 = (area->x2 / 8) * 8 + 7;
     }
@@ -44,7 +34,7 @@ void _epd_rounder_cb(lv_disp_drv_t *disp_drv, lv_area_t *area) {
 void _epd_flush_cb(lv_disp_drv_t *disp_drv, const lv_area_t *area, lv_color_t *color_p) {
     depg0213_epd_t *epd = disp_drv->user_data;
 
-    if(depg0213_epd_load(epd, color_p, color_p, area->x1, area->x2, area->y1, area->y2) != DEPG0213_OK) {
+    if(depg0213_epd_load(epd, color_p, NULL, area->x1, area->x2, area->y1, area->y2) != DEPG0213_OK) {
         return;
     }
 
diff --git a/Core/Src/user_tasks.c b/Core/Src/user_tasks.c
index eb6325a..c80526c 100644
--- a/Core/Src/user_tasks.c
+++ b/Core/Src/user_tasks.c
@@ -1,3 +1,5 @@
+#include <stdio.h>
+
 #include "cmsis_os2.h"
 
 #include "lvgl.h"
@@ -16,7 +18,7 @@ void user_task_hello(void *arguments);
 uint8_t _user_tasks_init_epd(void);
 uint8_t _user_tasks_init_lvgl(void);
 
-#define FRAME_BUFFER_SIZE (212 * 10 / 8)
+#define FRAME_BUFFER_SIZE (212 * 10)
 
 // Globals
 depg0213_epd_t g_epd = {
@@ -40,14 +42,14 @@ osSemaphoreId_t g_lvgl_semphr;
 osThreadId_t g_flush_epd_task_handle;
 const osThreadAttr_t g_flush_epd_task_attributes = {
     .name = "flushEPD",
-    .priority = (osPriority_t) osPriorityNormal,
+    .priority = (osPriority_t) osPriorityBelowNormal,
     .stack_size = 2048 * 4
 };
 
 osThreadId_t g_lvgl_tick_handle;
 const osThreadAttr_t g_lvgl_tick_attributes = {
     .name = "lvglTICK",
-    .priority = (osPriority_t) osPriorityNormal,
+    .priority = (osPriority_t) osPriorityBelowNormal,
     .stack_size = 1024 * 4
 };
 
@@ -55,7 +57,7 @@ osThreadId_t g_task_hello_handle;
 const osThreadAttr_t g_task_hello_attributes = {
     .name = "HELLO",
     .priority = (osPriority_t) osPriorityNormal,
-    .stack_size = 2048 * 4
+    .stack_size = 1024 * 4
 };
 
 void user_tasks_initialize(void) {
@@ -65,31 +67,30 @@ void user_tasks_initialize(void) {
     if(_user_tasks_init_epd()) return;
     if(_user_tasks_init_lvgl()) return;
 
-    uint8_t bw_1[512];
-    uint8_t rd_1[512];
-    memset(bw_1, 0xFF, 512);
-    memset(rd_1, 0xFF, 512);
-    depg0213_epd_window(&g_epd, DEPG0213_HORIZONTAL, 0, 211, 0, 103);
-    depg0213_epd_load(&g_epd, bw_1, rd_1, 0, 31, 0, 103);
-    depg0213_epd_update(&g_epd);
-
     HAL_NVIC_SetPriority(EXTI9_5_IRQn, 5, 0);
     HAL_NVIC_SetPriority(SPI2_IRQn, 6, 0);
 
-    //g_flush_epd_task_handle = osThreadNew(user_task_flush_epd, NULL, &g_flush_epd_task_attributes);
-    //g_lvgl_tick_handle = osThreadNew(user_task_lvgl_tick, NULL, &g_lvgl_tick_attributes);
-    //g_task_hello_handle = osThreadNew(user_task_hello, NULL, &g_task_hello_attributes);
+    g_flush_epd_task_handle = osThreadNew(user_task_flush_epd, NULL, &g_flush_epd_task_attributes);
+    g_lvgl_tick_handle = osThreadNew(user_task_lvgl_tick, NULL, &g_lvgl_tick_attributes);
+    g_task_hello_handle = osThreadNew(user_task_hello, NULL, &g_task_hello_attributes);
 }
 
 void user_task_hello(void *arguments) {
+    lv_obj_t *hello_label;
+    char buf[32];
     osSemaphoreAcquire(g_lvgl_semphr, osWaitForever);
-    lv_obj_t *hello_label = lv_label_create(lv_scr_act(), NULL);
+    hello_label = lv_label_create(lv_scr_act(), NULL);
     lv_label_set_align(hello_label, LV_LABEL_ALIGN_CENTER);
     lv_label_set_text(hello_label, "Hello LVGL!!");
     osSemaphoreRelease(g_lvgl_semphr);
 
     for(;;) {
         osDelay(10000);
+        snprintf(buf, 32, "LVGL@%ld", osKernelGetTickCount());
+        osSemaphoreAcquire(g_lvgl_semphr, osWaitForever);
+        lv_label_set_align(hello_label, LV_LABEL_ALIGN_CENTER);
+        lv_label_set_text(hello_label, buf);
+        osSemaphoreRelease(g_lvgl_semphr);
     }
 }
 
@@ -123,9 +124,21 @@ uint8_t _user_tasks_init_epd(void) {
     ret = depg0213_epd_init(&g_epd);
     if(ret != DEPG0213_OK) return -2;
 
-    ret = depg0213_epd_window(&g_epd, DEPG0213_HORIZONTAL_INVERSE, 0, 211, 0, 103);
+    ret = depg0213_epd_window(&g_epd, DEPG0213_HORIZONTAL, 0, 211, 0, 103);
     if(ret != DEPG0213_OK) return -3;
 
+    uint8_t buffer = 0x00;
+    for(uint16_t i = 0; i < 212; i++) {
+        for(uint16_t j = 0; j < 13; j++) {
+            depg0213_epd_load(&g_epd, NULL, &buffer, i, i, j * 8, j * 8 + 7);
+        }
+    }
+    buffer = 0xFF;
+    for(uint16_t i = 0; i < 212; i++) {
+        for(uint16_t j = 0; j < 13; j++) {
+            depg0213_epd_load(&g_epd, &buffer, NULL, i, i, j * 8, j * 8 + 7);
+        }
+    }
     ret = depg0213_epd_deepsleep(&g_epd);
     if(ret != DEPG0213_OK) return -6;
 
@@ -137,10 +150,10 @@ uint8_t _user_tasks_init_lvgl(void) {
     if(g_lvgl_semphr == NULL) return -1;
 
     lv_init();
+
     lv_disp_buf_init(&g_disp_buf, g_epd_frame, NULL, FRAME_BUFFER_SIZE);
 
     lv_disp_drv_t disp_drv;
-    /*
     lv_disp_drv_init(&disp_drv);
     disp_drv.buffer = &g_disp_buf;
     disp_drv.set_px_cb = _epd_set_px_cb;
@@ -155,7 +168,6 @@ uint8_t _user_tasks_init_lvgl(void) {
             //
          }
     }
-    */
 
     return 0;
 }
\ No newline at end of file
diff --git a/Drivers/Third_Party/depg0213_epd b/Drivers/Third_Party/depg0213_epd
index 4c31481..77b9c80 160000
--- a/Drivers/Third_Party/depg0213_epd
+++ b/Drivers/Third_Party/depg0213_epd
@@ -1 +1 @@
-Subproject commit 4c31481910fbecf61528f1857db5a76efbc4749c
+Subproject commit 77b9c803d81d5b7a5fd9cf2bcb13f4df1a545dc7
diff --git a/Makefile b/Makefile
index 68e96d4..51b1c50 100644
--- a/Makefile
+++ b/Makefile
@@ -1,5 +1,5 @@
 ##########################################################################################################################
-# File automatically-generated by tool: [projectgenerator] version: [3.11.2] date: [Sun Jan 17 20:33:52 CST 2021] 
+# File automatically-generated by tool: [projectgenerator] version: [3.11.2] date: [Sun Jan 17 23:36:54 CST 2021] 
 ##########################################################################################################################
 
 # ------------------------------------------------
diff --git a/STM32H750_EPD.ioc b/STM32H750_EPD.ioc
index d33d935..1806c5c 100644
--- a/STM32H750_EPD.ioc
+++ b/STM32H750_EPD.ioc
@@ -1,7 +1,7 @@
 #MicroXplorer Configuration settings - do not modify
 Mcu.Family=STM32H7
 NVIC.FLASH_IRQn=true\:6\:0\:true\:false\:true\:true\:true\:true
-RCC.DIVQ2Freq_Value=16125000
+RCC.DIVQ2Freq_Value=100000000
 ProjectManager.MainLocation=Core/Src
 Dma.SPI2_TX.0.MemInc=DMA_MINC_ENABLE
 SPI2.VirtualNSS=VM_NSSHARD
@@ -27,7 +27,7 @@ RCC.RTCFreq_Value=32768
 PC9.Locked=true
 CORTEX_M7.AccessPermission-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_REGION_FULL_ACCESS
 RCC.CpuClockFreq_Value=240000000
-RCC.VCO2OutputFreq_Value=32250000
+RCC.VCO2OutputFreq_Value=200000000
 Dma.SPI2_TX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
 USART1.IPParameters=VirtualMode-Asynchronous
 PD8.GPIO_PuPd=GPIO_PULLUP
@@ -98,6 +98,7 @@ NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
 PB2.Signal=QUADSPI_CLK
 CORTEX_M7.Size-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_REGION_SIZE_128KB
 Mcu.IP10=USART1
+RCC.DIVM2=4
 NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:true
 RCC.DIVM1=4
 RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE
@@ -120,17 +121,17 @@ PA14\ (JTCK/SWCLK).Mode=Serial_Wire
 NVIC.SPI2_IRQn=true\:6\:0\:true\:false\:true\:true\:true\:true
 NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false
 Dma.SPI2_TX.0.RequestNumber=1
-RCC.DIVR2Freq_Value=16125000
+RCC.DIVR2Freq_Value=100000000
 CORTEX_M7.DisableExec-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_INSTRUCTION_ACCESS_ENABLE
 Dma.RequestsNb=1
 ProjectManager.HalAssertFull=false
-FREERTOS.configTOTAL_HEAP_SIZE=81920
-RCC.DIVP2Freq_Value=16125000
+FREERTOS.configTOTAL_HEAP_SIZE=262144
+RCC.DIVP2Freq_Value=25000000
 ProjectManager.ProjectName=STM32H750_EPD
 RCC.APB3Freq_Value=120000000
 RCC.MCO2PinFreq_Value=240000000
 Mcu.Package=LQFP100
-SPI2.FifoThreshold=SPI_FIFO_THRESHOLD_16DATA
+SPI2.FifoThreshold=SPI_FIFO_THRESHOLD_01DATA
 PB12.Mode=NSS_Signal_Hard_Output
 NVIC.TimeBase=TIM7_IRQn
 SPI2.Mode=SPI_MODE_MASTER
@@ -155,7 +156,7 @@ RCC.LPUART1Freq_Value=120000000
 NVIC.DMA1_Stream0_IRQn=true\:6\:0\:true\:false\:true\:true\:false\:true
 SPI2.Direction=SPI_DIRECTION_2LINES_TXONLY
 PB13.Mode=TX_Only_Simplex_Unidirect_Master
-NVIC.USART1_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true
+NVIC.USART1_IRQn=true\:6\:0\:true\:false\:true\:true\:true\:true
 Dma.Request0=SPI2_TX
 PH0-OSC_IN\ (PH0).Mode=HSE-External-Oscillator
 NVIC.TIM7_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
@@ -191,9 +192,10 @@ CORTEX_M7.IsBufferable-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_ACCESS
 RCC.SWPMI1Freq_Value=120000000
 CORTEX_M7.IsCacheable-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_ACCESS_NOT_CACHEABLE
 RCC.SAI4BFreq_Value=60000000
-SPI2.NSSPMode=SPI_NSS_PULSE_ENABLE
+SPI2.NSSPMode=SPI_NSS_PULSE_DISABLE
 PC10.Mode=Single Bank 1
 ProjectManager.DefaultFWLocation=true
+RCC.DIVP2=8
 PD9.Signal=GPXTI9
 ProjectManager.DeletePrevious=true
 PB14.Locked=true
@@ -220,6 +222,7 @@ CORTEX_M7.TypeExtField-Cortex_Memory_Protection_Unit_Region1_Settings=MPU_TEX_LE
 RCC.VCO1OutputFreq_Value=480000000
 PA9.Signal=USART1_TX
 RCC.AXIClockFreq_Value=120000000
+RCC.DIVN2=100
 CORTEX_M7.IsCacheable-Cortex_Memory_Protection_Unit_Region3_Settings=MPU_ACCESS_CACHEABLE
 RCC.DIVN1=240
 CORTEX_M7.DisableExec-Cortex_Memory_Protection_Unit_Region3_Settings=MPU_INSTRUCTION_ACCESS_DISABLE
@@ -248,12 +251,12 @@ RCC.FDCANFreq_Value=60000000
 Dma.SPI2_TX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
 RCC.RNGFreq_Value=48000000
 CORTEX_M7.IsShareable-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_ACCESS_NOT_SHAREABLE
-RCC.ADCFreq_Value=16125000
+RCC.ADCFreq_Value=25000000
 CORTEX_M7.AccessPermission-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_REGION_FULL_ACCESS
 NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
 NVIC.HSEM1_IRQn=true\:6\:0\:true\:false\:true\:true\:true\:true
 ProjectManager.FreePins=false
-RCC.IPParameters=ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,APB1Freq_Value,APB2Freq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CECFreq_Value,CKPERFreq_Value,CortexFreq_Value,CpuClockFreq_Value,D1CPREFreq_Value,DFSDMACLkFreq_Value,DFSDMFreq_Value,DIVM1,DIVN1,DIVP1Freq_Value,DIVP2Freq_Value,DIVP3Freq_Value,DIVQ1,DIVQ1Freq_Value,DIVQ2Freq_Value,DIVQ3Freq_Value,DIVR1Freq_Value,DIVR2Freq_Value,DIVR3Freq_Value,EnbaleCSS,FDCANFreq_Value,FMCFreq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HPRE,HRTIMFreq_Value,HSE_VALUE,I2C123Freq_Value,I2C4Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM345Freq_Value,LPUART1Freq_Value,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,PLLSourceVirtual,QSPICLockSelection,QSPIFreq_Value,RNGFreq_Value,RTCClockSelection,RTCFreq_Value,SAI1Freq_Value,SAI23Freq_Value,SAI4AFreq_Value,SAI4BFreq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SPI123Freq_Value,SPI45Freq_Value,SPI6Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,USART16Freq_Value,USART234578Freq_Value,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value
+RCC.IPParameters=ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,APB1Freq_Value,APB2Freq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CECFreq_Value,CKPERFreq_Value,CortexFreq_Value,CpuClockFreq_Value,D1CPREFreq_Value,DFSDMACLkFreq_Value,DFSDMFreq_Value,DIVM1,DIVM2,DIVN1,DIVN2,DIVP1Freq_Value,DIVP2,DIVP2Freq_Value,DIVP3Freq_Value,DIVQ1,DIVQ1Freq_Value,DIVQ2Freq_Value,DIVQ3Freq_Value,DIVR1Freq_Value,DIVR2Freq_Value,DIVR3Freq_Value,EnbaleCSS,FDCANFreq_Value,FMCFreq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HPRE,HRTIMFreq_Value,HSE_VALUE,I2C123Freq_Value,I2C4Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM345Freq_Value,LPUART1Freq_Value,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,PLLSourceVirtual,QSPICLockSelection,QSPIFreq_Value,RNGFreq_Value,RTCClockSelection,RTCFreq_Value,SAI1Freq_Value,SAI23Freq_Value,SAI4AFreq_Value,SAI4BFreq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SPI123Freq_Value,SPI45Freq_Value,SPI6Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,USART16Freq_Value,USART234578Freq_Value,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value
 ProjectManager.AskForMigrate=true
 Mcu.Name=STM32H750VBTx
 RCC.LPTIM2Freq_Value=120000000
@@ -315,7 +318,7 @@ CORTEX_M7.CPU_DCache=Enabled
 RCC.HCLK3ClockFreq_Value=120000000
 PB12.GPIO_PuPd=GPIO_PULLUP
 Dma.SPI2_TX.0.Direction=DMA_MEMORY_TO_PERIPH
-RCC.VCOInput2Freq_Value=250000
+RCC.VCOInput2Freq_Value=2000000
 PD9.Locked=true
 RCC.APB1Freq_Value=120000000
 PD8.PinState=GPIO_PIN_SET