diff --git a/Core/Src/main.c b/Core/Src/main.c
index eac552a..3711db5 100644
--- a/Core/Src/main.c
+++ b/Core/Src/main.c
@@ -567,12 +567,12 @@ void MPU_Config(void)
   MPU_InitStruct.BaseAddress = 0x20000000;
   MPU_InitStruct.Size = MPU_REGION_SIZE_128KB;
   MPU_InitStruct.SubRegionDisable = 0x0;
-  MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
+  MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
   MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
   MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
-  MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
+  MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
   MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;
-  MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
+  MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
 
   HAL_MPU_ConfigRegion(&MPU_InitStruct);
   /** Initializes and configures the Region and the memory to be protected
diff --git a/Makefile b/Makefile
index 54ba517..68e96d4 100644
--- a/Makefile
+++ b/Makefile
@@ -1,5 +1,5 @@
 ##########################################################################################################################
-# File automatically-generated by tool: [projectgenerator] version: [3.11.2] date: [Sun Jan 17 19:15:28 CST 2021] 
+# File automatically-generated by tool: [projectgenerator] version: [3.11.2] date: [Sun Jan 17 20:33:52 CST 2021] 
 ##########################################################################################################################
 
 # ------------------------------------------------
diff --git a/STM32H750_EPD.ioc b/STM32H750_EPD.ioc
index ef6e96b..d33d935 100644
--- a/STM32H750_EPD.ioc
+++ b/STM32H750_EPD.ioc
@@ -43,7 +43,7 @@ RCC.AHB4Freq_Value=120000000
 VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2
 Dma.SPI2_TX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE
 RCC.VCOInput3Freq_Value=250000
-CORTEX_M7.IsShareable-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_ACCESS_SHAREABLE
+CORTEX_M7.IsShareable-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_ACCESS_NOT_SHAREABLE
 RCC.LPTIM1Freq_Value=120000000
 Mcu.IP4=NVIC
 Mcu.IP5=QUADSPI
@@ -106,7 +106,7 @@ ProjectManager.FirmwarePackage=STM32Cube FW_H7 V1.8.0
 MxDb.Version=DB.6.0.10
 CORTEX_M7.IsCacheable-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_ACCESS_CACHEABLE
 RCC.DIVP1Freq_Value=240000000
-CORTEX_M7.TypeExtField-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_TEX_LEVEL0
+CORTEX_M7.TypeExtField-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_TEX_LEVEL1
 ProjectManager.BackupPrevious=false
 RCC.FMCFreq_Value=120000000
 PC11.GPIO_Label=LED1
@@ -187,7 +187,7 @@ NVIC.SavedSvcallIrqHandlerGenerated=true
 CORTEX_M7.IsShareable-Cortex_Memory_Protection_Unit_Region3_Settings=MPU_ACCESS_NOT_SHAREABLE
 PC11.Signal=GPIO_Output
 VP_SYS_VS_tim7.Mode=TIM7
-CORTEX_M7.IsBufferable-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_ACCESS_NOT_BUFFERABLE
+CORTEX_M7.IsBufferable-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_ACCESS_BUFFERABLE
 RCC.SWPMI1Freq_Value=120000000
 CORTEX_M7.IsCacheable-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_ACCESS_NOT_CACHEABLE
 RCC.SAI4BFreq_Value=60000000