diff --git a/Core/Inc/FreeRTOSConfig.h b/Core/Inc/FreeRTOSConfig.h
index 7729ba5..1e803aa 100644
--- a/Core/Inc/FreeRTOSConfig.h
+++ b/Core/Inc/FreeRTOSConfig.h
@@ -52,7 +52,7 @@
   #include <stdint.h>
   extern uint32_t SystemCoreClock;
 #endif
-#define configENABLE_FPU                         0
+#define configENABLE_FPU                         1
 #define configENABLE_MPU                         0
 
 #define configUSE_PREEMPTION                     1
diff --git a/Core/Inc/main.h b/Core/Inc/main.h
index abecf69..086a277 100644
--- a/Core/Inc/main.h
+++ b/Core/Inc/main.h
@@ -60,13 +60,13 @@ void Error_Handler(void);
 /* Private defines -----------------------------------------------------------*/
 #define SPI2_DC_Pin GPIO_PIN_14
 #define SPI2_DC_GPIO_Port GPIOB
+#define SPI2_RES_Pin GPIO_PIN_8
+#define SPI2_RES_GPIO_Port GPIOD
 #define SPI2_BUSY_Pin GPIO_PIN_9
 #define SPI2_BUSY_GPIO_Port GPIOD
 #define SPI2_BUSY_EXTI_IRQn EXTI9_5_IRQn
 #define LED1_Pin GPIO_PIN_11
 #define LED1_GPIO_Port GPIOC
-#define SPI2_RES_Pin GPIO_PIN_6
-#define SPI2_RES_GPIO_Port GPIOD
 /* USER CODE BEGIN Private defines */
 
 /* USER CODE END Private defines */
diff --git a/Core/Inc/stm32h7xx_it.h b/Core/Inc/stm32h7xx_it.h
index 024d3e8..ecbbdb4 100644
--- a/Core/Inc/stm32h7xx_it.h
+++ b/Core/Inc/stm32h7xx_it.h
@@ -56,6 +56,7 @@ void DebugMon_Handler(void);
 void PVD_AVD_IRQHandler(void);
 void FLASH_IRQHandler(void);
 void RCC_IRQHandler(void);
+void DMA1_Stream0_IRQHandler(void);
 void EXTI9_5_IRQHandler(void);
 void SPI2_IRQHandler(void);
 void TIM7_IRQHandler(void);
diff --git a/Core/Src/main.c b/Core/Src/main.c
index ac3e177..cf4fe8b 100644
--- a/Core/Src/main.c
+++ b/Core/Src/main.c
@@ -47,6 +47,7 @@ QSPI_HandleTypeDef hqspi;
 RTC_HandleTypeDef hrtc;
 
 SPI_HandleTypeDef hspi2;
+DMA_HandleTypeDef hdma_spi2_tx;
 
 /* Definitions for defaultTask */
 osThreadId_t defaultTaskHandle;
@@ -63,6 +64,7 @@ const osThreadAttr_t defaultTask_attributes = {
 void SystemClock_Config(void);
 static void MPU_Config(void);
 static void MX_GPIO_Init(void);
+static void MX_DMA_Init(void);
 static void MX_QUADSPI_Init(void);
 static void MX_SPI2_Init(void);
 static void MX_RTC_Init(void);
@@ -119,6 +121,7 @@ int main(void)
 
   /* Initialize all configured peripherals */
   MX_GPIO_Init();
+  MX_DMA_Init();
   MX_QUADSPI_Init();
   MX_SPI2_Init();
   MX_RTC_Init();
@@ -367,6 +370,22 @@ static void MX_SPI2_Init(void)
 
 }
 
+/**
+  * Enable DMA controller clock
+  */
+static void MX_DMA_Init(void)
+{
+
+  /* DMA controller clock enable */
+  __HAL_RCC_DMA1_CLK_ENABLE();
+
+  /* DMA interrupt init */
+  /* DMA1_Stream0_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Stream0_IRQn, 6, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Stream0_IRQn);
+
+}
+
 /**
   * @brief GPIO Initialization Function
   * @param None
@@ -388,10 +407,10 @@ static void MX_GPIO_Init(void)
   HAL_GPIO_WritePin(SPI2_DC_GPIO_Port, SPI2_DC_Pin, GPIO_PIN_RESET);
 
   /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin, GPIO_PIN_RESET);
+  HAL_GPIO_WritePin(SPI2_RES_GPIO_Port, SPI2_RES_Pin, GPIO_PIN_SET);
 
   /*Configure GPIO pin Output Level */
-  HAL_GPIO_WritePin(SPI2_RES_GPIO_Port, SPI2_RES_Pin, GPIO_PIN_SET);
+  HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin, GPIO_PIN_RESET);
 
   /*Configure GPIO pin : SPI2_DC_Pin */
   GPIO_InitStruct.Pin = SPI2_DC_Pin;
@@ -400,6 +419,13 @@ static void MX_GPIO_Init(void)
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
   HAL_GPIO_Init(SPI2_DC_GPIO_Port, &GPIO_InitStruct);
 
+  /*Configure GPIO pin : SPI2_RES_Pin */
+  GPIO_InitStruct.Pin = SPI2_RES_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD;
+  GPIO_InitStruct.Pull = GPIO_PULLUP;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(SPI2_RES_GPIO_Port, &GPIO_InitStruct);
+
   /*Configure GPIO pin : SPI2_BUSY_Pin */
   GPIO_InitStruct.Pin = SPI2_BUSY_Pin;
   GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
@@ -413,13 +439,6 @@ static void MX_GPIO_Init(void)
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
   HAL_GPIO_Init(LED1_GPIO_Port, &GPIO_InitStruct);
 
-  /*Configure GPIO pin : SPI2_RES_Pin */
-  GPIO_InitStruct.Pin = SPI2_RES_Pin;
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD;
-  GPIO_InitStruct.Pull = GPIO_PULLUP;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-  HAL_GPIO_Init(SPI2_RES_GPIO_Port, &GPIO_InitStruct);
-
   /* EXTI interrupt init*/
   HAL_NVIC_SetPriority(EXTI9_5_IRQn, 5, 0);
   HAL_NVIC_EnableIRQ(EXTI9_5_IRQn);
diff --git a/Core/Src/stm32h7xx_hal_msp.c b/Core/Src/stm32h7xx_hal_msp.c
index 1b5b241..b910f86 100644
--- a/Core/Src/stm32h7xx_hal_msp.c
+++ b/Core/Src/stm32h7xx_hal_msp.c
@@ -24,6 +24,7 @@
 /* USER CODE BEGIN Includes */
 
 /* USER CODE END Includes */
+extern DMA_HandleTypeDef hdma_spi2_tx;
 
 /* Private typedef -----------------------------------------------------------*/
 /* USER CODE BEGIN TD */
@@ -75,19 +76,19 @@ void HAL_MspInit(void)
 
   /* Peripheral interrupt init */
   /* PVD_AVD_IRQn interrupt configuration */
-  HAL_NVIC_SetPriority(PVD_AVD_IRQn, 5, 0);
+  HAL_NVIC_SetPriority(PVD_AVD_IRQn, 6, 0);
   HAL_NVIC_EnableIRQ(PVD_AVD_IRQn);
   /* FLASH_IRQn interrupt configuration */
-  HAL_NVIC_SetPriority(FLASH_IRQn, 5, 0);
+  HAL_NVIC_SetPriority(FLASH_IRQn, 6, 0);
   HAL_NVIC_EnableIRQ(FLASH_IRQn);
   /* RCC_IRQn interrupt configuration */
-  HAL_NVIC_SetPriority(RCC_IRQn, 5, 0);
+  HAL_NVIC_SetPriority(RCC_IRQn, 6, 0);
   HAL_NVIC_EnableIRQ(RCC_IRQn);
   /* FPU_IRQn interrupt configuration */
-  HAL_NVIC_SetPriority(FPU_IRQn, 5, 0);
+  HAL_NVIC_SetPriority(FPU_IRQn, 6, 0);
   HAL_NVIC_EnableIRQ(FPU_IRQn);
   /* HSEM1_IRQn interrupt configuration */
-  HAL_NVIC_SetPriority(HSEM1_IRQn, 5, 0);
+  HAL_NVIC_SetPriority(HSEM1_IRQn, 6, 0);
   HAL_NVIC_EnableIRQ(HSEM1_IRQn);
 
   /* USER CODE BEGIN MspInit 1 */
@@ -153,7 +154,7 @@ void HAL_QSPI_MspInit(QSPI_HandleTypeDef* hqspi)
     HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 
     /* QUADSPI interrupt Init */
-    HAL_NVIC_SetPriority(QUADSPI_IRQn, 5, 0);
+    HAL_NVIC_SetPriority(QUADSPI_IRQn, 6, 0);
     HAL_NVIC_EnableIRQ(QUADSPI_IRQn);
   /* USER CODE BEGIN QUADSPI_MspInit 1 */
 
@@ -284,8 +285,27 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
     GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
     HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 
+    /* SPI2 DMA Init */
+    /* SPI2_TX Init */
+    hdma_spi2_tx.Instance = DMA1_Stream0;
+    hdma_spi2_tx.Init.Request = DMA_REQUEST_SPI2_TX;
+    hdma_spi2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
+    hdma_spi2_tx.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_spi2_tx.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_spi2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
+    hdma_spi2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
+    hdma_spi2_tx.Init.Mode = DMA_NORMAL;
+    hdma_spi2_tx.Init.Priority = DMA_PRIORITY_LOW;
+    hdma_spi2_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
+    if (HAL_DMA_Init(&hdma_spi2_tx) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(hspi,hdmatx,hdma_spi2_tx);
+
     /* SPI2 interrupt Init */
-    HAL_NVIC_SetPriority(SPI2_IRQn, 5, 0);
+    HAL_NVIC_SetPriority(SPI2_IRQn, 6, 0);
     HAL_NVIC_EnableIRQ(SPI2_IRQn);
   /* USER CODE BEGIN SPI2_MspInit 1 */
 
@@ -317,6 +337,9 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
     */
     HAL_GPIO_DeInit(GPIOB, GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_15);
 
+    /* SPI2 DMA DeInit */
+    HAL_DMA_DeInit(hspi->hdmatx);
+
     /* SPI2 interrupt DeInit */
     HAL_NVIC_DisableIRQ(SPI2_IRQn);
   /* USER CODE BEGIN SPI2_MspDeInit 1 */
diff --git a/Core/Src/stm32h7xx_it.c b/Core/Src/stm32h7xx_it.c
index f221d1e..8378df5 100644
--- a/Core/Src/stm32h7xx_it.c
+++ b/Core/Src/stm32h7xx_it.c
@@ -57,6 +57,7 @@
 
 /* External variables --------------------------------------------------------*/
 extern QSPI_HandleTypeDef hqspi;
+extern DMA_HandleTypeDef hdma_spi2_tx;
 extern SPI_HandleTypeDef hspi2;
 extern TIM_HandleTypeDef htim7;
 
@@ -204,6 +205,20 @@ void RCC_IRQHandler(void)
   /* USER CODE END RCC_IRQn 1 */
 }
 
+/**
+  * @brief This function handles DMA1 stream0 global interrupt.
+  */
+void DMA1_Stream0_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA1_Stream0_IRQn 0 */
+
+  /* USER CODE END DMA1_Stream0_IRQn 0 */
+  HAL_DMA_IRQHandler(&hdma_spi2_tx);
+  /* USER CODE BEGIN DMA1_Stream0_IRQn 1 */
+
+  /* USER CODE END DMA1_Stream0_IRQn 1 */
+}
+
 /**
   * @brief This function handles EXTI line[9:5] interrupts.
   */
diff --git a/Core/Src/user_epd_impl.c b/Core/Src/user_epd_impl.c
index 2050d8b..c1aa32d 100644
--- a/Core/Src/user_epd_impl.c
+++ b/Core/Src/user_epd_impl.c
@@ -4,11 +4,11 @@
 
 #include "user_epd_impl.h"
 
-#define BUSY_MAX_POLLING_TIME 5000 // 5s
-
-uint8_t g_epd_busy_irq_flag = 0;
+#define BUSY_MAX_POLLING_TIME 30000 // 30s
+#define SPI_MAX_TRANSFER_TIME 1000 // 1s
 
 extern osSemaphoreId_t g_epd_busy_semphr;
+extern osSemaphoreId_t g_spi2_semphr;
 
 depg0213_ret_t _epd_reset_cb(void *handle) {
     SPI_HandleTypeDef *hspi = handle;
@@ -27,12 +27,11 @@ depg0213_ret_t _epd_poll_busy(void *handle) {
     if (hspi->Instance == SPI2) {
         if (osKernelGetState() != osKernelRunning) { // Kernel has not started, use flag polling instead.
             uint32_t tick_start = HAL_GetTick();
-            while (!g_epd_busy_irq_flag) {
+            while (HAL_GPIO_ReadPin(SPI2_BUSY_GPIO_Port, SPI2_BUSY_Pin) != GPIO_PIN_RESET) {
                 if (HAL_GetTick() - tick_start > BUSY_MAX_POLLING_TIME) {
                     return DEPG0213_ERROR;
                 }
             }
-            g_epd_busy_irq_flag = 0;
         } else { // Kernel has started, use semaphore.
             if(osSemaphoreAcquire(g_epd_busy_semphr, BUSY_MAX_POLLING_TIME) != osOK) {
                 return DEPG0213_ERROR;
@@ -49,10 +48,26 @@ depg0213_ret_t _epd_write_cmd_cb(void *handle, uint8_t *cmd, uint8_t len) {
 
     if (hspi->Instance == SPI2) {
         HAL_GPIO_WritePin(SPI2_DC_GPIO_Port, SPI2_DC_Pin, GPIO_PIN_RESET);
-        ret = HAL_SPI_Transmit(hspi, cmd, 0x01, 1000);
+        if(osKernelGetState() == osKernelRunning) {
+            ret = HAL_SPI_Transmit_IT(hspi, cmd, 0x01);
+            if(osSemaphoreAcquire(g_spi2_semphr, SPI_MAX_TRANSFER_TIME) != osOK) {
+                return DEPG0213_ERROR;
+            }
+        }
+        else {
+            ret = HAL_SPI_Transmit(hspi, cmd, 0x01, SPI_MAX_TRANSFER_TIME);
+        }
         if (len > 1) {
             HAL_GPIO_WritePin(SPI2_DC_GPIO_Port, SPI2_DC_Pin, GPIO_PIN_SET);
-            ret = HAL_SPI_Transmit(hspi, &cmd[1], len - 1, 1000);
+            if(osKernelGetState() == osKernelRunning) {
+                ret = HAL_SPI_Transmit_IT(hspi, &cmd[1], len - 1);
+                if(osSemaphoreAcquire(g_spi2_semphr, SPI_MAX_TRANSFER_TIME) != osOK) {
+                    return DEPG0213_ERROR;
+                }
+            }
+            else {
+                ret = HAL_SPI_Transmit(hspi, &cmd[1], len - 1, SPI_MAX_TRANSFER_TIME);
+            }
         }
     }
     if (ret != HAL_OK) return DEPG0213_ERROR;
@@ -66,7 +81,15 @@ depg0213_ret_t _epd_write_data_cb(void *handle, uint8_t *data, uint16_t len) {
 
     if (hspi->Instance == SPI2) {
         HAL_GPIO_WritePin(SPI2_DC_GPIO_Port, SPI2_DC_Pin, GPIO_PIN_SET);
-        ret = HAL_SPI_Transmit(hspi, data, len, 1000);
+        if(osKernelGetState() == osKernelRunning) {
+            ret = HAL_SPI_Transmit_IT(hspi, data, len);
+            if(osSemaphoreAcquire(g_spi2_semphr, SPI_MAX_TRANSFER_TIME) != osOK) {
+                return DEPG0213_ERROR;
+            }
+        }
+        else {
+            ret = HAL_SPI_Transmit(hspi, data, len, SPI_MAX_TRANSFER_TIME);
+        }
     }
     if (ret != HAL_OK) return DEPG0213_ERROR;
     return DEPG0213_OK;
diff --git a/Core/Src/user_irq_handlers.c b/Core/Src/user_irq_handlers.c
index 13ba7c4..06a0282 100644
--- a/Core/Src/user_irq_handlers.c
+++ b/Core/Src/user_irq_handlers.c
@@ -4,18 +4,23 @@
 
 #include "user_epd_impl.h"
 
-extern uint8_t g_epd_busy_irq_flag;
 extern osSemaphoreId_t g_epd_busy_semphr;
+extern osSemaphoreId_t g_spi2_semphr;
 
 void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) {
     // FIXME
     if(GPIO_Pin == SPI2_BUSY_Pin) {
-        if(osKernelGetState() != osKernelRunning) { // Kernel has not started, write poll variable
-            g_epd_busy_irq_flag = 1;
-        }
-        else { // Kernel has started, release semaphore.
+        if(osKernelGetState() == osKernelRunning) { // Kernel has started, release semaphore.
             osSemaphoreRelease(g_epd_busy_semphr);
             // CMSIS-OS2 wraps FreeRTOS call, no need to use __xxFromISR functions here.
         }
     }
+}
+
+void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi) {
+    if(hspi->Instance == SPI2) {
+        if(osKernelGetState() == osKernelRunning) {
+            osSemaphoreRelease(g_spi2_semphr);
+        }
+    }
 }
\ No newline at end of file
diff --git a/Core/Src/user_tasks.c b/Core/Src/user_tasks.c
index 51c9458..6809060 100644
--- a/Core/Src/user_tasks.c
+++ b/Core/Src/user_tasks.c
@@ -8,6 +8,7 @@
 extern SPI_HandleTypeDef hspi2;
 
 // Private function prototypes
+void user_task_flush_epd(void *arguments);
 uint8_t _user_tasks_init_epd(void);
 void _user_tasks_init_lvgl(void);
 
@@ -21,24 +22,51 @@ depg0213_epd_t g_epd = {
         .write_data_cb = _epd_write_data_cb
       }
 };
+
 osSemaphoreId_t g_epd_busy_semphr;
+osSemaphoreId_t g_spi2_semphr;
+
+osThreadId_t g_flush_epd_task_handle;
+const osThreadAttr_t g_flush_epd_task_attributes = {
+    .name = "flushEPD",
+    .priority = (osPriority_t) osPriorityNormal,
+    .stack_size = 128 * 4
+};
+
+uint8_t frame_buffer_wb[212 * 104 / 8];
+uint8_t frame_buffer_rd[212 * 104 / 8];
 
 void user_tasks_initialize(void) {
+    HAL_NVIC_SetPriority(EXTI9_5_IRQn, 4, 0);
+    HAL_NVIC_SetPriority(SPI2_IRQn, 4, 0);
+
     if(_user_tasks_init_epd()) return;
     _user_tasks_init_lvgl();
+
+    HAL_NVIC_SetPriority(EXTI9_5_IRQn, 5, 0);
+    HAL_NVIC_SetPriority(SPI2_IRQn, 6, 0);
+
+    g_flush_epd_task_handle = osThreadNew(user_task_flush_epd, NULL, &g_flush_epd_task_attributes);
 }
 
 void user_task_flush_epd(void *arguments) {
     for(;;) {
-        //
+        memset(frame_buffer_wb, 0xFF, 212 * 104 / 8);
+        memset(frame_buffer_rd, 0x00, 212 * 104 / 8);
+        depg0213_epd_load(&g_epd, frame_buffer_wb, frame_buffer_rd);
+        depg0213_epd_deepsleep(&g_epd);
+        osDelay(60000);
     }
 }
 
 uint8_t _user_tasks_init_epd(void) {
     depg0213_ret_t ret;
 
-    g_epd_busy_semphr = osSemaphoreNew(1U, 0U, NULL); // Max: 1, initial 1, attr NULL
-  if(g_epd_busy_semphr == NULL) return -1;
+    g_epd_busy_semphr = osSemaphoreNew(1U, 0U, NULL); // Max: 1, initial 0, attr NULL
+    if(g_epd_busy_semphr == NULL) return -1;
+
+    g_spi2_semphr = osSemaphoreNew(1U, 0U, NULL);
+    if(g_spi2_semphr == NULL) return -1;
 
     ret = depg0213_epd_init(&g_epd);
     if(ret != DEPG0213_OK) return -2;
diff --git a/Drivers/Third_Party/depg0213_epd b/Drivers/Third_Party/depg0213_epd
index 59c7cbd..b60a55b 160000
--- a/Drivers/Third_Party/depg0213_epd
+++ b/Drivers/Third_Party/depg0213_epd
@@ -1 +1 @@
-Subproject commit 59c7cbd27680c2dd1f836343bbb4f89680264c5e
+Subproject commit b60a55be73dd6f1951f65ce0ab98404260d39ae9
diff --git a/Makefile b/Makefile
index e45bada..d67fdb1 100644
--- a/Makefile
+++ b/Makefile
@@ -1,5 +1,5 @@
 ##########################################################################################################################
-# File automatically-generated by tool: [projectgenerator] version: [3.11.2] date: [Thu Jan 14 02:27:39 CST 2021] 
+# File automatically-generated by tool: [projectgenerator] version: [3.11.2] date: [Thu Jan 14 23:18:36 CST 2021] 
 ##########################################################################################################################
 
 # ------------------------------------------------
diff --git a/STM32H750_EPD.ioc b/STM32H750_EPD.ioc
index 9e2a1ec..cc89b85 100644
--- a/STM32H750_EPD.ioc
+++ b/STM32H750_EPD.ioc
@@ -1,8 +1,9 @@
 #MicroXplorer Configuration settings - do not modify
 Mcu.Family=STM32H7
-NVIC.FLASH_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true
+NVIC.FLASH_IRQn=true\:6\:0\:true\:false\:true\:true\:true\:true
 RCC.DIVQ2Freq_Value=16125000
 ProjectManager.MainLocation=Core/Src
+Dma.SPI2_TX.0.MemInc=DMA_MINC_ENABLE
 SPI2.VirtualNSS=VM_NSSHARD
 RCC.SAI1Freq_Value=60000000
 RCC.CortexFreq_Value=240000000
@@ -18,52 +19,61 @@ PC10.Locked=true
 PC10.Signal=QUADSPI_BK1_IO1
 PB14.GPIO_Label=SPI2_DC
 PC15-OSC32_OUT\ (OSC32_OUT).Mode=LSE-External-Oscillator
-ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_QUADSPI_Init-QUADSPI-false-HAL-true,4-MX_SPI2_Init-SPI2-false-HAL-true,5-MX_RTC_Init-RTC-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_QUADSPI_Init-QUADSPI-false-HAL-true,5-MX_SPI2_Init-SPI2-false-HAL-true,6-MX_RTC_Init-RTC-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
+PD8.Locked=true
 VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled
 RCC.RTCFreq_Value=32768
 PC9.Locked=true
 CORTEX_M7.AccessPermission-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_REGION_FULL_ACCESS
-PD6.Locked=true
 RCC.CpuClockFreq_Value=240000000
 RCC.VCO2OutputFreq_Value=32250000
+Dma.SPI2_TX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+PD8.GPIO_PuPd=GPIO_PULLUP
 PB13.Signal=SPI2_SCK
 PB15.Signal=SPI2_MOSI
-PD6.GPIO_Label=SPI2_RES
+Dma.SPI2_TX.0.Instance=DMA1_Stream0
 PinOutPanel.RotationAngle=0
 RCC.MCO1PinFreq_Value=64000000
 RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
 ProjectManager.StackSize=0x400
 RCC.AHB4Freq_Value=120000000
 VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2
+Dma.SPI2_TX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE
 RCC.VCOInput3Freq_Value=250000
 RCC.LPTIM1Freq_Value=120000000
-Mcu.IP4=QUADSPI
-Mcu.IP5=RCC
-Mcu.IP2=FREERTOS
+Mcu.IP4=NVIC
+Mcu.IP5=QUADSPI
+Mcu.IP2=DMA
 NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false
-Mcu.IP3=NVIC
+Mcu.IP3=FREERTOS
 PC11.GPIO_PuPd=GPIO_PULLDOWN
 Mcu.IP0=CORTEX_M7
+FREERTOS.configENABLE_FPU=1
 PA14\ (JTCK/SWCLK).Signal=DEBUG_JTCK-SWCLK
 CORTEX_M7.Enable-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_REGION_ENABLE
 Mcu.IP1=DEBUG
 CORTEX_M7.IsBufferable-Cortex_Memory_Protection_Unit_Region1_Settings=MPU_ACCESS_BUFFERABLE
 Mcu.UserConstants=
+Dma.SPI2_TX.0.SignalID=NONE
 RCC.DIVP3Freq_Value=16125000
 RCC.SDMMCFreq_Value=60000000
 Mcu.ThirdPartyNb=0
+Dma.SPI2_TX.0.SyncSignalID=NONE
 RCC.HCLKFreq_Value=120000000
 RCC.I2C4Freq_Value=120000000
 PE2.Mode=Single Bank 1
-Mcu.IPNb=9
+Mcu.IPNb=10
 ProjectManager.PreviousToolchain=
 RCC.SPDIFRXFreq_Value=60000000
+PD8.GPIOParameters=GPIO_Label,GPIO_ModeDefaultOutputPP,PinState,GPIO_PuPd
 RCC.DIVQ3Freq_Value=16125000
 Mcu.Pin6=PB2
+PD8.Signal=GPIO_Output
 Mcu.Pin7=PB10
 Mcu.Pin8=PB12
 Mcu.Pin9=PB13
-FREERTOS.IPParameters=Tasks01,configTOTAL_HEAP_SIZE
+Dma.SPI2_TX.0.Mode=DMA_NORMAL
+FREERTOS.IPParameters=Tasks01,configTOTAL_HEAP_SIZE,configENABLE_FPU
 SPI2.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_4
 PB13.Locked=true
 Mcu.Pin0=PE2
@@ -85,6 +95,7 @@ CORTEX_M7.Size-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_REGION_SIZE_12
 NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:true
 RCC.DIVM1=4
 RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE
+Dma.SPI2_TX.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
 ProjectManager.FirmwarePackage=STM32Cube FW_H7 V1.8.0
 MxDb.Version=DB.6.0.10
 CORTEX_M7.IsCacheable-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_ACCESS_CACHEABLE
@@ -97,13 +108,15 @@ RCC.USART16Freq_Value=120000000
 File.Version=6
 PC9.Mode=Single Bank 1
 SPI2.CalculateBaudRate=15.0 MBits/s
-PD6.PinState=GPIO_PIN_SET
+Dma.SPI2_TX.0.EventEnable=DISABLE
 PE2.Signal=QUADSPI_BK1_IO2
 PA14\ (JTCK/SWCLK).Mode=Serial_Wire
-NVIC.SPI2_IRQn=true\:5\:0\:true\:false\:true\:true\:true\:true
+NVIC.SPI2_IRQn=true\:6\:0\:true\:false\:true\:true\:true\:true
 NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false
+Dma.SPI2_TX.0.RequestNumber=1
 RCC.DIVR2Freq_Value=16125000
 CORTEX_M7.DisableExec-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_INSTRUCTION_ACCESS_ENABLE
+Dma.RequestsNb=1
 ProjectManager.HalAssertFull=false
 FREERTOS.configTOTAL_HEAP_SIZE=81920
 RCC.DIVP2Freq_Value=16125000
@@ -122,6 +135,7 @@ RCC.DFSDMFreq_Value=120000000
 RCC.DIVR1Freq_Value=240000000
 PB14.GPIOParameters=GPIO_Label
 CORTEX_M7.Size-Cortex_Memory_Protection_Unit_Region1_Settings=MPU_REGION_SIZE_16MB
+Dma.SPI2_TX.0.PeriphInc=DMA_PINC_DISABLE
 PC14-OSC32_IN\ (OSC32_IN).Mode=LSE-External-Oscillator
 RCC.TraceFreq_Value=240000000
 RCC.APB4Freq_Value=120000000
@@ -130,26 +144,27 @@ RCC.SAI23Freq_Value=60000000
 CORTEX_M7.Enable-Cortex_Memory_Protection_Unit_Region1_Settings=MPU_REGION_ENABLE
 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
 RCC.LPUART1Freq_Value=120000000
+NVIC.DMA1_Stream0_IRQn=true\:6\:0\:true\:false\:true\:true\:false\:true
 SPI2.Direction=SPI_DIRECTION_2LINES_TXONLY
 PB13.Mode=TX_Only_Simplex_Unidirect_Master
-PD6.Signal=GPIO_Output
-PD6.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD
+Dma.Request0=SPI2_TX
 PH0-OSC_IN\ (PH0).Mode=HSE-External-Oscillator
 NVIC.TIM7_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
 ProjectManager.CustomerFirmwarePackage=
 RCC.Tim2OutputFreq_Value=120000000
 CORTEX_M7.IsBufferable-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_ACCESS_NOT_BUFFERABLE
-NVIC.RCC_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:false
+NVIC.RCC_IRQn=true\:6\:0\:true\:false\:true\:true\:true\:false
 RCC.DFSDMACLkFreq_Value=60000000
 PB15.Locked=true
 RCC.VCO3OutputFreq_Value=32250000
+PD8.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD
 VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate
 RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
-PD6.GPIOParameters=GPIO_Label,GPIO_ModeDefaultOutputPP,PinState,GPIO_PuPd
-NVIC.QUADSPI_IRQn=true\:5\:0\:true\:false\:true\:true\:true\:true
+NVIC.QUADSPI_IRQn=true\:6\:0\:true\:false\:true\:true\:true\:true
 ProjectManager.ProjectFileName=STM32H750_EPD.ioc
 CORTEX_M7.CPU_ICache=Enabled
 RCC.DIVQ1=8
+Dma.SPI2_TX.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
 FREERTOS.Tasks01=defaultTask,24,128,StartDefaultTask,Default,NULL,Dynamic,NULL,NULL
 PA13\ (JTMS/SWDIO).Mode=Serial_Wire
 PD9.GPIO_Label=SPI2_BUSY
@@ -170,11 +185,12 @@ PD9.Signal=GPXTI9
 ProjectManager.DeletePrevious=true
 PB14.Locked=true
 PB10.Locked=true
-PC11.GPIOParameters=GPIO_Label,GPIO_PuPd
+PC11.GPIOParameters=GPIO_PuPd,GPIO_Label
 RCC.QSPIFreq_Value=60000000
 CORTEX_M7.BaseAddress-Cortex_Memory_Protection_Unit_Region2_Settings=0x20000000
 RCC.FamilyName=M
 PH1-OSC_OUT\ (PH1).Signal=RCC_OSC_OUT
+PD8.GPIO_Label=SPI2_RES
 RCC.SPI6Freq_Value=120000000
 RCC.D1CPREFreq_Value=240000000
 CORTEX_M7.MPU_Control=MPU_PRIVILEGED_DEFAULT
@@ -182,6 +198,7 @@ RCC.USART234578Freq_Value=120000000
 RCC.SPI45Freq_Value=120000000
 RCC.Tim1OutputFreq_Value=120000000
 RCC.SPI123Freq_Value=60000000
+Dma.SPI2_TX.0.SyncRequestNumber=1
 ProjectManager.TargetToolchain=Makefile
 PC15-OSC32_OUT\ (OSC32_OUT).Signal=RCC_OSC32_OUT
 CORTEX_M7.TypeExtField-Cortex_Memory_Protection_Unit_Region1_Settings=MPU_TEX_LEVEL1
@@ -189,13 +206,14 @@ RCC.VCO1OutputFreq_Value=480000000
 RCC.AXIClockFreq_Value=120000000
 RCC.DIVN1=240
 SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,VirtualNSS,BaudRatePrescaler,DataSize,NSSPMode
+Dma.SPI2_TX.0.SyncEnable=DISABLE
 ProjectManager.RegisterCallBack=
 RCC.USBFreq_Value=60000000
 PA1.Signal=QUADSPI_BK1_IO3
 RCC.CKPERFreq_Value=64000000
 PB10.Signal=QUADSPI_BK1_NCS
 PB14.Signal=GPIO_Output
-NVIC.PVD_AVD_IRQn=true\:5\:0\:true\:false\:true\:true\:true\:true
+NVIC.PVD_AVD_IRQn=true\:6\:0\:true\:false\:true\:true\:true\:true
 CORTEX_M7.Enable-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_REGION_ENABLE
 board=custom
 ProjectManager.LastFirmware=true
@@ -209,28 +227,32 @@ RCC.APB2Freq_Value=120000000
 PA1.Mode=Single Bank 1
 MxCube.Version=6.1.1
 RCC.FDCANFreq_Value=60000000
+Dma.SPI2_TX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
 RCC.RNGFreq_Value=48000000
 CORTEX_M7.IsShareable-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_ACCESS_NOT_SHAREABLE
 RCC.ADCFreq_Value=16125000
 CORTEX_M7.AccessPermission-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_REGION_FULL_ACCESS
 NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
-NVIC.HSEM1_IRQn=true\:5\:0\:true\:false\:true\:true\:true\:true
+NVIC.HSEM1_IRQn=true\:6\:0\:true\:false\:true\:true\:true\:true
 ProjectManager.FreePins=false
 RCC.IPParameters=ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,APB1Freq_Value,APB2Freq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CECFreq_Value,CKPERFreq_Value,CortexFreq_Value,CpuClockFreq_Value,D1CPREFreq_Value,DFSDMACLkFreq_Value,DFSDMFreq_Value,DIVM1,DIVN1,DIVP1Freq_Value,DIVP2Freq_Value,DIVP3Freq_Value,DIVQ1,DIVQ1Freq_Value,DIVQ2Freq_Value,DIVQ3Freq_Value,DIVR1Freq_Value,DIVR2Freq_Value,DIVR3Freq_Value,EnbaleCSS,FDCANFreq_Value,FMCFreq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HPRE,HRTIMFreq_Value,HSE_VALUE,I2C123Freq_Value,I2C4Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM345Freq_Value,LPUART1Freq_Value,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,PLLSourceVirtual,QSPICLockSelection,QSPIFreq_Value,RNGFreq_Value,RTCClockSelection,RTCFreq_Value,SAI1Freq_Value,SAI23Freq_Value,SAI4AFreq_Value,SAI4BFreq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SPI123Freq_Value,SPI45Freq_Value,SPI6Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,USART16Freq_Value,USART234578Freq_Value,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value
 ProjectManager.AskForMigrate=true
 Mcu.Name=STM32H750VBTx
 RCC.LPTIM2Freq_Value=120000000
 CORTEX_M7.Size-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_REGION_SIZE_4GB
+Dma.SPI2_TX.0.FIFOMode=DMA_FIFOMODE_DISABLE
 NVIC.SavedPendsvIrqHandlerGenerated=true
 CORTEX_M7.AccessPermission-Cortex_Memory_Protection_Unit_Region1_Settings=MPU_REGION_FULL_ACCESS
 ProjectManager.UnderRoot=false
 CORTEX_M7.IsCacheable-Cortex_Memory_Protection_Unit_Region1_Settings=MPU_ACCESS_CACHEABLE
 CORTEX_M7.IPParameters=CPU_ICache,CPU_DCache,MPU_Control,Enable-Cortex_Memory_Protection_Unit_Region0_Settings,Size-Cortex_Memory_Protection_Unit_Region0_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region0_Settings,DisableExec-Cortex_Memory_Protection_Unit_Region0_Settings,IsShareable-Cortex_Memory_Protection_Unit_Region0_Settings,IsCacheable-Cortex_Memory_Protection_Unit_Region0_Settings,IsBufferable-Cortex_Memory_Protection_Unit_Region0_Settings,Enable-Cortex_Memory_Protection_Unit_Region1_Settings,BaseAddress-Cortex_Memory_Protection_Unit_Region1_Settings,Size-Cortex_Memory_Protection_Unit_Region1_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region1_Settings,IsCacheable-Cortex_Memory_Protection_Unit_Region1_Settings,IsBufferable-Cortex_Memory_Protection_Unit_Region1_Settings,TypeExtField-Cortex_Memory_Protection_Unit_Region1_Settings,Enable-Cortex_Memory_Protection_Unit_Region2_Settings,BaseAddress-Cortex_Memory_Protection_Unit_Region2_Settings,Size-Cortex_Memory_Protection_Unit_Region2_Settings,TypeExtField-Cortex_Memory_Protection_Unit_Region2_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region2_Settings,DisableExec-Cortex_Memory_Protection_Unit_Region2_Settings,IsCacheable-Cortex_Memory_Protection_Unit_Region2_Settings,IsBufferable-Cortex_Memory_Protection_Unit_Region2_Settings
-Mcu.IP8=SYS
+Mcu.IP8=SPI2
 VP_FREERTOS_VS_CMSIS_V2.Signal=FREERTOS_VS_CMSIS_V2
-Mcu.IP6=RTC
-Mcu.IP7=SPI2
+Mcu.IP9=SYS
+Mcu.IP6=RCC
+Mcu.IP7=RTC
 ProjectManager.CoupleFile=false
+Dma.SPI2_TX.0.Priority=DMA_PRIORITY_LOW
 RCC.SYSCLKFreq_VALUE=240000000
 RCC.I2C123Freq_Value=120000000
 PA1.Locked=true
@@ -244,38 +266,39 @@ PB2.Mode=Single Bank 1
 ProjectManager.CompilerOptimize=6
 RCC.QSPICLockSelection=RCC_QSPICLKSOURCE_PLL
 SH.GPXTI9.ConfNb=1
-NVIC.EXTI9_5_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true
+NVIC.EXTI9_5_IRQn=true\:5\:0\:true\:false\:true\:true\:true\:true
 ProjectManager.HeapSize=0x200
-Mcu.Pin15=PA14 (JTCK/SWCLK)
+Mcu.Pin15=PA13 (JTMS/SWDIO)
 NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
-Mcu.Pin16=PC10
-Mcu.Pin13=PC9
-Mcu.Pin14=PA13 (JTMS/SWDIO)
+Mcu.Pin16=PA14 (JTCK/SWCLK)
+Mcu.Pin13=PD9
+Mcu.Pin14=PC9
 Mcu.Pin19=VP_FREERTOS_VS_CMSIS_V2
 RCC.LPTIM345Freq_Value=120000000
 ProjectManager.ComputerToolchain=false
-Mcu.Pin17=PC11
-Mcu.Pin18=PD6
+Mcu.Pin17=PC10
+Mcu.Pin18=PC11
 CORTEX_M7.DisableExec-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_INSTRUCTION_ACCESS_DISABLE
 RCC.LTDCFreq_Value=16125000
 RCC.SAI4AFreq_Value=60000000
 NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
 Mcu.Pin11=PB15
-Mcu.Pin12=PD9
+Mcu.Pin12=PD8
 Mcu.Pin10=PB14
 RCC.DIVQ1Freq_Value=60000000
-NVIC.FPU_IRQn=true\:5\:0\:true\:false\:true\:true\:true\:false
+NVIC.FPU_IRQn=true\:6\:0\:true\:false\:true\:true\:true\:false
 SPI2.DataSize=SPI_DATASIZE_8BIT
 PC9.Signal=QUADSPI_BK1_IO0
 CORTEX_M7.CPU_DCache=Enabled
 RCC.HCLK3ClockFreq_Value=120000000
 PB12.GPIO_PuPd=GPIO_PULLUP
+Dma.SPI2_TX.0.Direction=DMA_MEMORY_TO_PERIPH
 RCC.VCOInput2Freq_Value=250000
 PD9.Locked=true
 RCC.APB1Freq_Value=120000000
+PD8.PinState=GPIO_PIN_SET
 ProjectManager.DeviceId=STM32H750VBTx
 PB12.GPIOParameters=GPIO_PuPd
 PB12.Signal=SPI2_NSS
 ProjectManager.LibraryCopy=0
 PA13\ (JTMS/SWDIO).Signal=DEBUG_JTMS-SWDIO
-PD6.GPIO_PuPd=GPIO_PULLUP