528 lines
16 KiB
C
528 lines
16 KiB
C
/* USER CODE BEGIN Header */
|
|
/**
|
|
******************************************************************************
|
|
* @file : main.c
|
|
* @brief : Main program body
|
|
******************************************************************************
|
|
* @attention
|
|
*
|
|
* <h2><center>© Copyright (c) 2021 STMicroelectronics.
|
|
* All rights reserved.</center></h2>
|
|
*
|
|
* This software component is licensed by ST under BSD 3-Clause license,
|
|
* the "License"; You may not use this file except in compliance with the
|
|
* License. You may obtain a copy of the License at:
|
|
* opensource.org/licenses/BSD-3-Clause
|
|
*
|
|
******************************************************************************
|
|
*/
|
|
/* USER CODE END Header */
|
|
/* Includes ------------------------------------------------------------------*/
|
|
#include "main.h"
|
|
|
|
/* Private includes ----------------------------------------------------------*/
|
|
/* USER CODE BEGIN Includes */
|
|
|
|
#include <string.h>
|
|
#include "otm8009a_lcd.h"
|
|
#include "otm_lcd_impl.h"
|
|
|
|
/* USER CODE END Includes */
|
|
|
|
/* Private typedef -----------------------------------------------------------*/
|
|
/* USER CODE BEGIN PTD */
|
|
|
|
/* USER CODE END PTD */
|
|
|
|
/* Private define ------------------------------------------------------------*/
|
|
/* USER CODE BEGIN PD */
|
|
/* USER CODE END PD */
|
|
|
|
/* Private macro -------------------------------------------------------------*/
|
|
/* USER CODE BEGIN PM */
|
|
|
|
/* USER CODE END PM */
|
|
|
|
/* Private variables ---------------------------------------------------------*/
|
|
|
|
QSPI_HandleTypeDef hqspi;
|
|
|
|
RTC_HandleTypeDef hrtc;
|
|
|
|
SRAM_HandleTypeDef hsram1;
|
|
|
|
/* USER CODE BEGIN PV */
|
|
|
|
otm_t g_lcd = {
|
|
.cb = {
|
|
.delay_cb = _otm_impl_delay,
|
|
.write_data_cb = _otm_impl_write_data,
|
|
.write_reg_cb = _otm_impl_write_reg
|
|
},
|
|
.user_data = NULL
|
|
};
|
|
|
|
/* USER CODE END PV */
|
|
|
|
/* Private function prototypes -----------------------------------------------*/
|
|
void SystemClock_Config(void);
|
|
static void MPU_Config(void);
|
|
static void MX_GPIO_Init(void);
|
|
static void MX_FMC_Init(void);
|
|
static void MX_QUADSPI_Init(void);
|
|
static void MX_RTC_Init(void);
|
|
/* USER CODE BEGIN PFP */
|
|
|
|
/* USER CODE END PFP */
|
|
|
|
/* Private user code ---------------------------------------------------------*/
|
|
/* USER CODE BEGIN 0 */
|
|
|
|
/* USER CODE END 0 */
|
|
|
|
/**
|
|
* @brief The application entry point.
|
|
* @retval int
|
|
*/
|
|
int main(void)
|
|
{
|
|
/* USER CODE BEGIN 1 */
|
|
|
|
SCB->VTOR = 0x90000000;
|
|
__enable_irq();
|
|
|
|
/* USER CODE END 1 */
|
|
|
|
/* MPU Configuration--------------------------------------------------------*/
|
|
MPU_Config();
|
|
|
|
/* Enable I-Cache---------------------------------------------------------*/
|
|
SCB_EnableICache();
|
|
|
|
/* Enable D-Cache---------------------------------------------------------*/
|
|
SCB_EnableDCache();
|
|
|
|
/* MCU Configuration--------------------------------------------------------*/
|
|
|
|
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
|
|
HAL_Init();
|
|
|
|
/* USER CODE BEGIN Init */
|
|
|
|
/* USER CODE END Init */
|
|
|
|
/* Configure the system clock */
|
|
SystemClock_Config();
|
|
|
|
/* USER CODE BEGIN SysInit */
|
|
|
|
/* USER CODE END SysInit */
|
|
|
|
/* Initialize all configured peripherals */
|
|
MX_GPIO_Init();
|
|
MX_FMC_Init();
|
|
MX_QUADSPI_Init();
|
|
MX_RTC_Init();
|
|
/* USER CODE BEGIN 2 */
|
|
|
|
otm_lcd_init(&g_lcd);
|
|
otm_lcd_direction(&g_lcd, OTM_HORIZONTAL_INV);
|
|
uint32_t color[1024];
|
|
memset(color, 0xFF, 1024 * 4);
|
|
otm_lcd_upload(&g_lcd, 0, 99, 0, 9, (uint16_t *)color);
|
|
|
|
/* USER CODE END 2 */
|
|
|
|
/* Infinite loop */
|
|
/* USER CODE BEGIN WHILE */
|
|
while (1)
|
|
{
|
|
/* USER CODE END WHILE */
|
|
|
|
/* USER CODE BEGIN 3 */
|
|
}
|
|
/* USER CODE END 3 */
|
|
}
|
|
|
|
/**
|
|
* @brief System Clock Configuration
|
|
* @retval None
|
|
*/
|
|
void SystemClock_Config(void)
|
|
{
|
|
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
|
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
|
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
|
|
|
|
/** Supply configuration update enable
|
|
*/
|
|
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
|
|
/** Configure the main internal regulator output voltage
|
|
*/
|
|
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
|
|
|
|
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
|
|
/** Initializes the RCC Oscillators according to the specified parameters
|
|
* in the RCC_OscInitTypeDef structure.
|
|
*/
|
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_LSI
|
|
|RCC_OSCILLATORTYPE_HSE;
|
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
|
RCC_OscInitStruct.HSIState = RCC_HSI_DIV1;
|
|
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
|
|
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
|
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
|
RCC_OscInitStruct.PLL.PLLM = 8;
|
|
RCC_OscInitStruct.PLL.PLLN = 336;
|
|
RCC_OscInitStruct.PLL.PLLP = 2;
|
|
RCC_OscInitStruct.PLL.PLLQ = 4;
|
|
RCC_OscInitStruct.PLL.PLLR = 2;
|
|
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_0;
|
|
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
|
|
RCC_OscInitStruct.PLL.PLLFRACN = 0;
|
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
|
{
|
|
Error_Handler();
|
|
}
|
|
/** Initializes the CPU, AHB and APB buses clocks
|
|
*/
|
|
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
|
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
|
|
|RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
|
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
|
RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
|
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
|
|
RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV1;
|
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV1;
|
|
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV1;
|
|
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV1;
|
|
|
|
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
|
|
{
|
|
Error_Handler();
|
|
}
|
|
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_QSPI
|
|
|RCC_PERIPHCLK_FMC|RCC_PERIPHCLK_CKPER;
|
|
PeriphClkInitStruct.FmcClockSelection = RCC_FMCCLKSOURCE_PLL;
|
|
PeriphClkInitStruct.QspiClockSelection = RCC_QSPICLKSOURCE_CLKP;
|
|
PeriphClkInitStruct.CkperClockSelection = RCC_CLKPSOURCE_HSI;
|
|
PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI;
|
|
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
|
{
|
|
Error_Handler();
|
|
}
|
|
/** Enables the Clock Security System
|
|
*/
|
|
HAL_RCC_EnableCSS();
|
|
}
|
|
|
|
/**
|
|
* @brief QUADSPI Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_QUADSPI_Init(void)
|
|
{
|
|
|
|
/* USER CODE BEGIN QUADSPI_Init 0 */
|
|
|
|
return;
|
|
|
|
/* USER CODE END QUADSPI_Init 0 */
|
|
|
|
/* USER CODE BEGIN QUADSPI_Init 1 */
|
|
|
|
/* USER CODE END QUADSPI_Init 1 */
|
|
/* QUADSPI parameter configuration*/
|
|
hqspi.Instance = QUADSPI;
|
|
hqspi.Init.ClockPrescaler = 255;
|
|
hqspi.Init.FifoThreshold = 1;
|
|
hqspi.Init.SampleShifting = QSPI_SAMPLE_SHIFTING_NONE;
|
|
hqspi.Init.FlashSize = 1;
|
|
hqspi.Init.ChipSelectHighTime = QSPI_CS_HIGH_TIME_1_CYCLE;
|
|
hqspi.Init.ClockMode = QSPI_CLOCK_MODE_0;
|
|
hqspi.Init.FlashID = QSPI_FLASH_ID_1;
|
|
hqspi.Init.DualFlash = QSPI_DUALFLASH_DISABLE;
|
|
if (HAL_QSPI_Init(&hqspi) != HAL_OK)
|
|
{
|
|
Error_Handler();
|
|
}
|
|
/* USER CODE BEGIN QUADSPI_Init 2 */
|
|
|
|
/* USER CODE END QUADSPI_Init 2 */
|
|
|
|
}
|
|
|
|
/**
|
|
* @brief RTC Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_RTC_Init(void)
|
|
{
|
|
|
|
/* USER CODE BEGIN RTC_Init 0 */
|
|
|
|
/* USER CODE END RTC_Init 0 */
|
|
|
|
RTC_TimeTypeDef sTime = {0};
|
|
RTC_DateTypeDef sDate = {0};
|
|
|
|
/* USER CODE BEGIN RTC_Init 1 */
|
|
|
|
/* USER CODE END RTC_Init 1 */
|
|
/** Initialize RTC Only
|
|
*/
|
|
hrtc.Instance = RTC;
|
|
hrtc.Init.HourFormat = RTC_HOURFORMAT_24;
|
|
hrtc.Init.AsynchPrediv = 127;
|
|
hrtc.Init.SynchPrediv = 255;
|
|
hrtc.Init.OutPut = RTC_OUTPUT_DISABLE;
|
|
hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
|
|
hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
|
|
hrtc.Init.OutPutRemap = RTC_OUTPUT_REMAP_NONE;
|
|
if (HAL_RTC_Init(&hrtc) != HAL_OK)
|
|
{
|
|
Error_Handler();
|
|
}
|
|
|
|
/* USER CODE BEGIN Check_RTC_BKUP */
|
|
|
|
/* USER CODE END Check_RTC_BKUP */
|
|
|
|
/** Initialize RTC and set the Time and Date
|
|
*/
|
|
sTime.Hours = 0x0;
|
|
sTime.Minutes = 0x0;
|
|
sTime.Seconds = 0x0;
|
|
sTime.DayLightSaving = RTC_DAYLIGHTSAVING_NONE;
|
|
sTime.StoreOperation = RTC_STOREOPERATION_RESET;
|
|
if (HAL_RTC_SetTime(&hrtc, &sTime, RTC_FORMAT_BCD) != HAL_OK)
|
|
{
|
|
Error_Handler();
|
|
}
|
|
sDate.WeekDay = RTC_WEEKDAY_MONDAY;
|
|
sDate.Month = RTC_MONTH_JANUARY;
|
|
sDate.Date = 0x1;
|
|
sDate.Year = 0x0;
|
|
|
|
if (HAL_RTC_SetDate(&hrtc, &sDate, RTC_FORMAT_BCD) != HAL_OK)
|
|
{
|
|
Error_Handler();
|
|
}
|
|
/* USER CODE BEGIN RTC_Init 2 */
|
|
|
|
/* USER CODE END RTC_Init 2 */
|
|
|
|
}
|
|
|
|
/* FMC initialization function */
|
|
static void MX_FMC_Init(void)
|
|
{
|
|
|
|
/* USER CODE BEGIN FMC_Init 0 */
|
|
|
|
/* USER CODE END FMC_Init 0 */
|
|
|
|
FMC_NORSRAM_TimingTypeDef Timing = {0};
|
|
|
|
/* USER CODE BEGIN FMC_Init 1 */
|
|
|
|
/* USER CODE END FMC_Init 1 */
|
|
|
|
/** Perform the SRAM1 memory initialization sequence
|
|
*/
|
|
hsram1.Instance = FMC_NORSRAM_DEVICE;
|
|
hsram1.Extended = FMC_NORSRAM_EXTENDED_DEVICE;
|
|
/* hsram1.Init */
|
|
hsram1.Init.NSBank = FMC_NORSRAM_BANK1;
|
|
hsram1.Init.DataAddressMux = FMC_DATA_ADDRESS_MUX_DISABLE;
|
|
hsram1.Init.MemoryType = FMC_MEMORY_TYPE_SRAM;
|
|
hsram1.Init.MemoryDataWidth = FMC_NORSRAM_MEM_BUS_WIDTH_16;
|
|
hsram1.Init.BurstAccessMode = FMC_BURST_ACCESS_MODE_DISABLE;
|
|
hsram1.Init.WaitSignalPolarity = FMC_WAIT_SIGNAL_POLARITY_LOW;
|
|
hsram1.Init.WaitSignalActive = FMC_WAIT_TIMING_BEFORE_WS;
|
|
hsram1.Init.WriteOperation = FMC_WRITE_OPERATION_ENABLE;
|
|
hsram1.Init.WaitSignal = FMC_WAIT_SIGNAL_DISABLE;
|
|
hsram1.Init.ExtendedMode = FMC_EXTENDED_MODE_DISABLE;
|
|
hsram1.Init.AsynchronousWait = FMC_ASYNCHRONOUS_WAIT_DISABLE;
|
|
hsram1.Init.WriteBurst = FMC_WRITE_BURST_DISABLE;
|
|
hsram1.Init.ContinuousClock = FMC_CONTINUOUS_CLOCK_SYNC_ONLY;
|
|
hsram1.Init.WriteFifo = FMC_WRITE_FIFO_ENABLE;
|
|
hsram1.Init.PageSize = FMC_PAGE_SIZE_NONE;
|
|
/* Timing */
|
|
Timing.AddressSetupTime = 15;
|
|
Timing.AddressHoldTime = 15;
|
|
Timing.DataSetupTime = 255;
|
|
Timing.BusTurnAroundDuration = 15;
|
|
Timing.CLKDivision = 16;
|
|
Timing.DataLatency = 17;
|
|
Timing.AccessMode = FMC_ACCESS_MODE_A;
|
|
/* ExtTiming */
|
|
|
|
if (HAL_SRAM_Init(&hsram1, &Timing, NULL) != HAL_OK)
|
|
{
|
|
Error_Handler( );
|
|
}
|
|
|
|
/* USER CODE BEGIN FMC_Init 2 */
|
|
|
|
/* USER CODE END FMC_Init 2 */
|
|
}
|
|
|
|
/**
|
|
* @brief GPIO Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_GPIO_Init(void)
|
|
{
|
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
|
|
/* GPIO Ports Clock Enable */
|
|
__HAL_RCC_GPIOE_CLK_ENABLE();
|
|
__HAL_RCC_GPIOC_CLK_ENABLE();
|
|
__HAL_RCC_GPIOH_CLK_ENABLE();
|
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
|
__HAL_RCC_GPIOD_CLK_ENABLE();
|
|
|
|
/*Configure GPIO pin Output Level */
|
|
HAL_GPIO_WritePin(LCD_BL_GPIO_Port, LCD_BL_Pin, GPIO_PIN_SET);
|
|
|
|
/*Configure GPIO pin : LCD_BL_Pin */
|
|
GPIO_InitStruct.Pin = LCD_BL_Pin;
|
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
|
HAL_GPIO_Init(LCD_BL_GPIO_Port, &GPIO_InitStruct);
|
|
|
|
}
|
|
|
|
/* USER CODE BEGIN 4 */
|
|
|
|
/* USER CODE END 4 */
|
|
|
|
/* MPU Configuration */
|
|
|
|
void MPU_Config(void)
|
|
{
|
|
MPU_Region_InitTypeDef MPU_InitStruct = {0};
|
|
|
|
/* Disables the MPU */
|
|
HAL_MPU_Disable();
|
|
/** Initializes and configures the Region and the memory to be protected
|
|
*/
|
|
MPU_InitStruct.Enable = MPU_REGION_ENABLE;
|
|
MPU_InitStruct.Number = MPU_REGION_NUMBER0;
|
|
MPU_InitStruct.BaseAddress = 0x0;
|
|
MPU_InitStruct.Size = MPU_REGION_SIZE_4GB;
|
|
MPU_InitStruct.SubRegionDisable = 0x0;
|
|
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
|
|
MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
|
|
MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
|
|
MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
|
|
MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
|
|
MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
|
|
|
|
HAL_MPU_ConfigRegion(&MPU_InitStruct);
|
|
/** Initializes and configures the Region and the memory to be protected
|
|
*/
|
|
MPU_InitStruct.Enable = MPU_REGION_ENABLE;
|
|
MPU_InitStruct.Number = MPU_REGION_NUMBER1;
|
|
MPU_InitStruct.BaseAddress = 0x90000000;
|
|
MPU_InitStruct.Size = MPU_REGION_SIZE_16MB;
|
|
MPU_InitStruct.SubRegionDisable = 0x0;
|
|
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
|
|
MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
|
|
MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
|
|
MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
|
|
MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;
|
|
MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
|
|
|
|
HAL_MPU_ConfigRegion(&MPU_InitStruct);
|
|
/** Initializes and configures the Region and the memory to be protected
|
|
*/
|
|
MPU_InitStruct.Enable = MPU_REGION_ENABLE;
|
|
MPU_InitStruct.Number = MPU_REGION_NUMBER2;
|
|
MPU_InitStruct.BaseAddress = 0x20000000;
|
|
MPU_InitStruct.Size = MPU_REGION_SIZE_128KB;
|
|
MPU_InitStruct.SubRegionDisable = 0x0;
|
|
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
|
|
MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
|
|
MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
|
|
MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
|
|
MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;
|
|
MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
|
|
|
|
HAL_MPU_ConfigRegion(&MPU_InitStruct);
|
|
/** Initializes and configures the Region and the memory to be protected
|
|
*/
|
|
MPU_InitStruct.Enable = MPU_REGION_ENABLE;
|
|
MPU_InitStruct.Number = MPU_REGION_NUMBER3;
|
|
MPU_InitStruct.BaseAddress = 0x24000000;
|
|
MPU_InitStruct.Size = MPU_REGION_SIZE_512KB;
|
|
MPU_InitStruct.SubRegionDisable = 0x0;
|
|
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
|
|
MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
|
|
MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
|
|
MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
|
|
MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;
|
|
MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
|
|
|
|
HAL_MPU_ConfigRegion(&MPU_InitStruct);
|
|
/** Initializes and configures the Region and the memory to be protected
|
|
*/
|
|
MPU_InitStruct.Enable = MPU_REGION_ENABLE;
|
|
MPU_InitStruct.Number = MPU_REGION_NUMBER4;
|
|
MPU_InitStruct.BaseAddress = 0x60000000;
|
|
MPU_InitStruct.Size = MPU_REGION_SIZE_256MB;
|
|
MPU_InitStruct.SubRegionDisable = 0x0;
|
|
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
|
|
MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
|
|
MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
|
|
MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
|
|
MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
|
|
MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
|
|
|
|
HAL_MPU_ConfigRegion(&MPU_InitStruct);
|
|
/* Enables the MPU */
|
|
HAL_MPU_Enable(MPU_HFNMI_PRIVDEF_NONE);
|
|
|
|
}
|
|
|
|
/**
|
|
* @brief This function is executed in case of error occurrence.
|
|
* @retval None
|
|
*/
|
|
void Error_Handler(void)
|
|
{
|
|
/* USER CODE BEGIN Error_Handler_Debug */
|
|
/* User can add his own implementation to report the HAL error return state */
|
|
__disable_irq();
|
|
while (1)
|
|
{
|
|
}
|
|
/* USER CODE END Error_Handler_Debug */
|
|
}
|
|
|
|
#ifdef USE_FULL_ASSERT
|
|
/**
|
|
* @brief Reports the name of the source file and the source line number
|
|
* where the assert_param error has occurred.
|
|
* @param file: pointer to the source file name
|
|
* @param line: assert_param error line source number
|
|
* @retval None
|
|
*/
|
|
void assert_failed(uint8_t *file, uint32_t line)
|
|
{
|
|
/* USER CODE BEGIN 6 */
|
|
/* User can add his own implementation to report the file name and line number,
|
|
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
|
|
/* USER CODE END 6 */
|
|
}
|
|
#endif /* USE_FULL_ASSERT */
|
|
|
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|