Added LL.
This commit is contained in:
parent
a8b347f9b9
commit
8bbd776877
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BasedOnStyle: Google
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IndentWidth: 4
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AlignConsecutiveMacros: AcrossEmptyLines
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AlignConsecutiveDeclarations: true
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AlignConsecutiveAssignments: AcrossEmptyLinesAndComments
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BreakBeforeBraces: Custom
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BraceWrapping:
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AfterEnum: false
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AfterStruct: false
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SplitEmptyFunction: false
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ColumnLimit: 120
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[submodule "Middlewares/Third_Party/lwesp"]
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path = Middlewares/Third_Party/lwesp
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url = https://github.com/MaJerle/lwesp.git
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@ -16,6 +16,7 @@ set(TARGET_LDSCRIPT_RAM "${CMAKE_SOURCE_DIR}/STM32H750VBTx_RAM.ld")
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# Copy them from Makefile
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set(TARGET_C_SOURCES
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"Core/Src/lwesp_ll.c"
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"Core/Src/main.c"
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"Core/Src/stm32h7xx_it.c"
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"Core/Src/stm32h7xx_hal_msp.c"
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@ -58,6 +59,26 @@ set(TARGET_C_SOURCES
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"Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2/cmsis_os2.c"
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"Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c"
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"Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c"
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"Middlewares/Third_Party/lwesp/lwesp/src/lwesp/lwesp_ap.c"
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"Middlewares/Third_Party/lwesp/lwesp/src/lwesp/lwesp_buff.c"
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"Middlewares/Third_Party/lwesp/lwesp/src/lwesp/lwesp_conn.c"
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"Middlewares/Third_Party/lwesp/lwesp/src/lwesp/lwesp_debug.c"
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"Middlewares/Third_Party/lwesp/lwesp/src/lwesp/lwesp_dns.c"
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"Middlewares/Third_Party/lwesp/lwesp/src/lwesp/lwesp_evt.c"
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"Middlewares/Third_Party/lwesp/lwesp/src/lwesp/lwesp_input.c"
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"Middlewares/Third_Party/lwesp/lwesp/src/lwesp/lwesp_int.c"
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"Middlewares/Third_Party/lwesp/lwesp/src/lwesp/lwesp_mem.c"
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"Middlewares/Third_Party/lwesp/lwesp/src/lwesp/lwesp_parser.c"
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"Middlewares/Third_Party/lwesp/lwesp/src/lwesp/lwesp_pbuf.c"
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"Middlewares/Third_Party/lwesp/lwesp/src/lwesp/lwesp_sntp.c"
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"Middlewares/Third_Party/lwesp/lwesp/src/lwesp/lwesp_sta.c"
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"Middlewares/Third_Party/lwesp/lwesp/src/lwesp/lwesp_threads.c"
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"Middlewares/Third_Party/lwesp/lwesp/src/lwesp/lwesp_timeout.c"
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"Middlewares/Third_Party/lwesp/lwesp/src/lwesp/lwesp_unicode.c"
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"Middlewares/Third_Party/lwesp/lwesp/src/lwesp/lwesp_wps.c"
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"Middlewares/Third_Party/lwesp/lwesp/src/lwesp/lwesp_utils.c"
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"Middlewares/Third_Party/lwesp/lwesp/src/lwesp/lwesp.c"
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"Middlewares/Third_Party/lwesp/lwesp/src/system/lwesp_sys_freertos.c"
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)
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# Copy them from Makefile
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@ -87,6 +108,8 @@ set(TARGET_C_INCLUDES
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"Middlewares/Third_Party/FreeRTOS/Source/include"
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"Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2"
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"Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F"
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"Middlewares/Third_Party/lwesp/lwesp/src/include"
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"Middlewares/Third_Party/lwesp/lwesp/src/include/system/port/freertos"
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)
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# Shared libraries linked with application
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#ifndef LWESP_HDR_OPTS_H
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#define LWESP_HDR_OPTS_H
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/* Rename this file to "lwesp_opts.h" for your application */
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/*
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* Open "include/lwesp/lwesp_opt.h" and
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* copy & replace here settings you want to change values
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*/
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#define LWESP_CFG_AT_ECHO 1
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#define LWESP_CFG_INPUT_USE_PROCESS 1
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#define LWESP_CFG_SNTP 1
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#endif /* LWESP_HDR_OPTS_H */
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#include "system/lwesp_ll.h"
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#include "lwesp/lwesp.h"
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#include "lwesp/lwesp_input.h"
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#include "lwesp/lwesp_mem.h"
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#include "stm32h7xx_hal.h"
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#include "cmsis_os.h"
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#define UART_TIMEOUT 1000
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#define HEAP_SIZE 4096
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extern UART_HandleTypeDef huart1;
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static uint8_t s_lwesp_heap[HEAP_SIZE];
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static uint8_t s_initialized;
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static osThreadId_t usart_ll_thread_id;
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static osMessageQueueId_t usart_ll_mbox_id;
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static void usart_ll_thread(void *arg) {
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for (;;) {
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}
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}
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static void configure_uart(uint32_t baudrate) {
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//
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}
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static size_t send_data(const void *data, size_t len) {
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HAL_UART_Transmit(&huart1, (uint8_t *)data, len, 1000);
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return len;
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}
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lwespr_t lwesp_ll_init(lwesp_ll_t *ll) {
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lwesp_mem_region_t mem_regions[] = {{s_lwesp_heap, HEAP_SIZE}};
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if (!s_initialized) {
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lwesp_mem_assignmemory(mem_regions, LWESP_ARRAYSIZE(mem_regions));
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ll->send_fn = send_data;
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}
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configure_uart(ll->uart.baudrate);
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if(!s_initialized) {
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const osThreadAttr_t attr = {
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.stack_size = 1024
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};
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usart_ll_mbox_id = osMessageQueueNew(10, sizeof(void *), NULL);
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usart_ll_thread_id = osThreadNew(usart_ll_thread, usart_ll_mbox_id, &attr);
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}
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s_initialized = 1;
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return lwespOK;
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}
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lwespr_t lwesp_ll_deinit(lwesp_ll_t *ll) {
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//
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return lwespOK;
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}
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@ -0,0 +1 @@
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Subproject commit 7d1dd77fa844c382c8f65caf040eb7573aa5dc06
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@ -1,4 +1,23 @@
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#MicroXplorer Configuration settings - do not modify
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Bdma.LPUART1_RX.0.Direction=DMA_PERIPH_TO_MEMORY
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Bdma.LPUART1_RX.0.EventEnable=DISABLE
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Bdma.LPUART1_RX.0.Instance=BDMA_Channel0
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Bdma.LPUART1_RX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE
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Bdma.LPUART1_RX.0.MemInc=DMA_MINC_ENABLE
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Bdma.LPUART1_RX.0.Mode=DMA_CIRCULAR
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Bdma.LPUART1_RX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
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Bdma.LPUART1_RX.0.PeriphInc=DMA_PINC_DISABLE
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Bdma.LPUART1_RX.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
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Bdma.LPUART1_RX.0.Priority=DMA_PRIORITY_LOW
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Bdma.LPUART1_RX.0.RequestNumber=1
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Bdma.LPUART1_RX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
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Bdma.LPUART1_RX.0.SignalID=NONE
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Bdma.LPUART1_RX.0.SyncEnable=DISABLE
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Bdma.LPUART1_RX.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
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Bdma.LPUART1_RX.0.SyncRequestNumber=1
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Bdma.LPUART1_RX.0.SyncSignalID=NONE
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Bdma.Request0=LPUART1_RX
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Bdma.RequestsNb=1
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FREERTOS.IPParameters=Tasks01,configTOTAL_HEAP_SIZE,configENABLE_FPU
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FREERTOS.Tasks01=defaultTask,24,128,StartDefaultTask,Default,NULL,Dynamic,NULL,NULL
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FREERTOS.configENABLE_FPU=1
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LPUART1.BaudRate=115200
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LPUART1.IPParameters=BaudRate
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Mcu.Family=STM32H7
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Mcu.IP0=CORTEX_M7
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Mcu.IP1=FREERTOS
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Mcu.IP2=LPUART1
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Mcu.IP3=NVIC
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Mcu.IP4=RCC
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Mcu.IP5=RNG
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Mcu.IP6=SYS
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Mcu.IPNb=7
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Mcu.IP0=BDMA
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Mcu.IP1=CORTEX_M7
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Mcu.IP2=FREERTOS
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Mcu.IP3=LPUART1
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Mcu.IP4=NVIC
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Mcu.IP5=RCC
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Mcu.IP6=RNG
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Mcu.IP7=SYS
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Mcu.IPNb=8
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Mcu.Name=STM32H750VBTx
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Mcu.Package=LQFP100
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Mcu.Pin0=PC14-OSC32_IN (OSC32_IN)
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Mcu.Pin1=PC15-OSC32_OUT (OSC32_OUT)
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Mcu.Pin10=VP_SYS_VS_tim7
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Mcu.Pin2=PH0-OSC_IN (PH0)
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Mcu.Pin3=PH1-OSC_OUT (PH1)
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Mcu.Pin4=PA9
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Mcu.Pin5=PA10
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Mcu.Pin6=VP_FREERTOS_VS_CMSIS_V2
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Mcu.Pin7=VP_RNG_VS_RNG
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Mcu.Pin8=VP_SYS_VS_tim7
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Mcu.PinsNb=9
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Mcu.Pin6=PA11
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Mcu.Pin7=PA12
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Mcu.Pin8=VP_FREERTOS_VS_CMSIS_V2
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Mcu.Pin9=VP_RNG_VS_RNG
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Mcu.PinsNb=11
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Mcu.ThirdPartyNb=0
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Mcu.UserConstants=
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Mcu.UserName=STM32H750VBTx
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MxCube.Version=6.4.0
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MxDb.Version=DB.6.0.40
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NVIC.BDMA_Channel0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true
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NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
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NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
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NVIC.FLASH_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true
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NVIC.FPU_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:false
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NVIC.ForceEnableDMAVector=true
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NVIC.HASH_RNG_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true
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NVIC.HSEM1_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true
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NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
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NVIC.LPUART1_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true
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NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
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PA10.Mode=Asynchronous
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PA10.Signal=LPUART1_RX
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PA11.Mode=CTS_RTS
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PA11.Signal=LPUART1_CTS
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PA12.Mode=CTS_RTS
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PA12.Signal=LPUART1_RTS
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PA9.Mode=Asynchronous
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PA9.Signal=LPUART1_TX
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PC14-OSC32_IN\ (OSC32_IN).Mode=LSE-External-Oscillator
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ProjectManager.TargetToolchain=Makefile
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ProjectManager.ToolChainLocation=
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ProjectManager.UnderRoot=false
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ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_LPUART1_UART_Init-LPUART1-false-HAL-true,4-MX_RNG_Init-RNG-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
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ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_LPUART1_UART_Init-LPUART1-false-HAL-true,4-MX_BDMA_Init-BDMA-false-HAL-true,5-MX_RNG_Init-RNG-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
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RCC.ADCFreq_Value=16125000
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RCC.AHB12Freq_Value=150000000
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RCC.AHB4Freq_Value=150000000
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